Commit Graph

9450 Commits

Author SHA1 Message Date
Marc Schink 119a533862 target/target: Fix 'wp' command usage
While at it, fix the 'wp' command documentation.

Change-Id: I70f3110e8ce286051f8f810260f1857b2285e634
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8022
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-12-01 22:23:49 +00:00
Evgeniy Naydanov 73d62f3f0c target: clarify usage of `coreid`
By definition in `target/target.h`, `coreid` is not a unique identifier
of a target -- it can be the same for targets on different TAPs.

Change-Id: Ifce78da55fffe28dd8b6b06ecae7d8c4e305c0a2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7997
Tested-by: jenkins
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-01 22:23:13 +00:00
Walter Ji 15038ab51a target/mips32: pracc write cp0 status register first
When user requested a change on cp0 status register,
it may contain changes on EXL/ERL bits, and changes on
these bits could lead to differnt behaviours on writing
to other cp0 registers.

Change-Id: Ic83039988c29c06ee134226b52de943c46d19da2
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7914
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-01 22:21:40 +00:00
Evgeniy Naydanov 560c338526 target/riscv: avoid using VLA in `log_debug_reg()`
OpenOCD style guide(`doc/manual/style.txt`) prohibits use of VLA:

> - use malloc() to create dynamic arrays. Do @b not use @c alloca
> or variable length arrays on the stack. non-MMU hosts(uClinux) and
> pthreads require modest and predictable stack usage.

Change-Id: I12e4a5087fd056d69866137237af6deca27f5d33
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-12-01 16:45:48 +03:00
Evgeniy Naydanov f5b8862a76 target/riscv: report helpfull location during register decode
`LOG_TARGET_DEBUG()` reports file, line and function name at the call
site. This information is not helpfull if it always points to the same
location inside `log_debug_reg()`.

Change-Id: Ib73be0344fb5c80c9ac8e5fdee1084d405522eb7
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-12-01 16:45:30 +03:00
Parshintsev Anatoly 10af616067 fix erroneously-resolved merge conflict
Change-Id: I4278e3e444eec93c418dfe153f60404f9848a20a
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
2023-11-29 20:51:42 +03:00
Kirill Radkin c5185e9219 breakpoints: Fix endless loop in bp/wp_clear_target
If we can't remove bp/wp, we will stuck in endless loop

Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7940
Tested-by: jenkins
Reviewed-by: Anatoly P <kupokupokupopo@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-27 10:09:35 -08:00
Tim Newsome 84bcf9aa8b Merge commit '4b1ea8511a7da9d7201df40302e3341c6e97ffdd' into from_upstream
Change-Id: I59366e08a4ac7e443e426b5fd6727c649f1ac9d5
2023-11-27 10:04:09 -08:00
Tim Newsome 0deaa63f50 Merge commit '022e438292de992cc558f268b2679e76ad313db6' into from_upstream
There was a big conflict with this one incoming change. This version of
the code passes all the tests (which don't test for the changed behavior
at all AFAIK), and at least passes errors back everywhere.

Conflicts:
	src/target/breakpoints.c

Change-Id: I72f75a3e08deda7e624e8bb82e1a9ea07a7a9276
2023-11-27 10:03:56 -08:00
Marc Schink 1b0b07baab target: Throw error in 'debug_reason' command
Instead of returning an 'error string', throw an error. This makes it
much easier to handle errors in Tcl scripts or in tools that use Tcl RPC.

Change-Id: I75c48750cfad7430fa5e6bc88fe04ebd59d34cea
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8006
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-24 21:40:49 +00:00
Evgeniy Naydanov be5cfdc86b target: remove `target_number`
Change-Id: Id36e5ad2967303483392fd2670630289ecde2553
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7998
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-11-24 21:07:14 +00:00
Thiemo van Engelen 53e67c37ab rtt_server: Add option for a message when client connects
This is useful when using the SEGGER RTT tooling, as the SEGGER RTT
tool J-Link RTT Viewer version 7.84f requires that it receives a
messages immediately after connecting. Otherwise it will give a timeout
and it will not connect.

Change-Id: I9240a1b6a93cd5c0fbd18292afb33b89013d78bf
Signed-off-by: Thiemo van Engelen <tvanengelen@victronenergy.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7752
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-24 21:06:24 +00:00
Tim Newsome 92213132a6 Merge commit '18281b0c497694d91c5608be54583172838be75c' into from_upstream
Change-Id: I05cd5ef9b04fa61a27321ae9b6a4fecabe3dee80
2023-11-20 12:30:19 -08:00
Marc Schink acde409ba0 rtt/tcl: Fix line indentation
Change-Id: I21f8084ca648cfe35f8f4dba078b2227772578a8
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7993
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:38:27 +00:00
Marc Schink 8ccd7827be flash/nor/stmqspi: Use correct command errors
Change-Id: I796b4e350653117bf63d18ad274a1d3d3d1337db
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8004
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-11-18 11:35:13 +00:00
Marc Schink 4e5b009a72 flash/nor/pic32mx: Remove redundant error message
The correct syntax is already suggested due to the return
value used.

While at it, apply some minor code improvements.

Change-Id: I990c0f7a0871f4b1a0fcdd13afc190149302443c
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8003
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:34:49 +00:00
Marc Schink ea07b3c53a flash/nor/stm32l4x: Remove redundant error messages
The correct syntax is already suggested due to the return
value used.

While at it, apply some minor code improvements.

Change-Id: Id32440cdd531077008abd679add32246c4249eb2
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8001
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-11-18 11:33:53 +00:00
Marc Schink b310b3ba9d flash/nor/stm32h7x: Remove redundant error messages
The correct syntax is already suggested due to the return
value used.

While at it, apply some minor code improvements.

Change-Id: Idf3d7a46ddecd70823e06bc3997f41fcdb8e501f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8000
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-18 11:33:09 +00:00
Marc Schink 738f1e1f72 flash/nor/stm32f2x: Remove redundant error messages
The correct syntax is already suggested due to the return
value used.

While at it, apply some minor code improvements.

Change-Id: I676e2ebf5714c850a436854a32c2e9d2f181d537
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7999
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:32:40 +00:00
Marc Schink 1df35d92fe jtag/drivers/rshim: Remove redundant error message
The correct syntax is already suggested due to the return
value used.

Change-Id: I0f4a7f93fdf056e7517c754d6d4ecd7928f1d226
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7992
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-11-18 11:32:17 +00:00
Marc Schink dc0f79d45d jtag/drivers/jtag_vpi: Remove redundant error messages
The correct syntax is already suggested due to the return
value used.

Change-Id: I971a579014c1eaf13b1932f7fa87c020a8eba69c
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7971
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-11-18 11:31:41 +00:00
Marc Schink acc1717970 jtag/drivers/ftdi: Use correct command error
Change-Id: I625acdd8a226528de86f113582e31755d679e68e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7970
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:31:17 +00:00
Marc Schink a23c69de3d jtag/drivers/jlink: Use correct command errors
While at it, remove the syntax error messages as the correct
syntax is already suggested due to the return value used.

Change-Id: I9310ba96ed3f8a85c37cee9193e481ad3df02e77
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7969
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-11-18 11:31:02 +00:00
Tobias Diedrich 62b526dbbd mips32: MIPS32_OP_SRL was using SRA opcode.
The mips opcode macro for the SRL opcode was using the wrong constant
value:

SRA -- Shift right arithmetic
Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0011

SRL -- Shift right logical
Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0010

This corrects the opcode constant for SRL and adds the SRA opcode for
completeness.

There is only one user of MIPS32_OP_SRL in src/flash/nor/cfi.c:
Since the mask constant (0x00000080 for the DQ7 mask) shifted in this
case would never have the sign bit set, it worked fine even though it
was accidentally using the SRA opcode instead of SRL.

Change-Id: I0a80746e2075c7df1ce35b9db00d9d0b997a3feb
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/3613
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-11-18 11:29:49 +00:00
Marc Schink f55b122b42 jtag/drivers/kitprog: Restructure commands
Use a command group 'kitprog' with subcommands instead of individual
commands with 'kitprog_' prefix.

The old command is still available to ensure backwards compatibility,
but is marked as deprecated.

Change-Id: I7f0d447939819ffc488a3d7a8de672b58887127f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7967
Reviewed-by: Bohdan Tymkiv <bohdan200@gmail.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:29:06 +00:00
Tomas Vanek 1c9f4ac181 drivers/cmsis_dap: drop unused variable
The variable 'mode' was introduced in
commit 4dc8cd201c ("cmsis-dap: add initial cmsis-dap support")
but never has been used (just cleared)

Change-Id: Ia741d181ee8006bd0d872f3358a57e045235741a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7965
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-18 11:27:22 +00:00
Marc Schink ba79d503bb jtag/drivers/cmsis-dap: Return error in 'backend' command
Change-Id: Ib9bf7ab50cbe193e9e726efb3cb58e53723a6dd1
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7964
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:26:41 +00:00
Marc Schink b25e5322ee jtag/drivers/cmsis-dap: Restructure commands
Use a command group 'cmsis-dap' with subcommands instead of individual
commands with 'cmsis_dap_' prefix.

The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.

Change-Id: I75facb7572a86354c2ce6144aa7fadf3b5a6db4e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7963
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bohdan200@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:26:05 +00:00
Peter Collingbourne 393da819b1 aarch64: Use 64-bit reads/writes to access SCTLR_EL1
We were previously inadvertently clearing the top 32 bits of SCTLR_EL1
during read_memory/write_memory as a result of using 32-bit operations
to access the register and because the fields used to temporarily
store the register were 32-bit. Fix it.

Change-Id: I657d7f949e1f7ab6bf90609e3f91cae09cade31a
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7939
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:21:38 +00:00
Peter Collingbourne ee96a95d44 openocd: src/target: Correctly handle CCSIDR_EL1.Associativity=0
Associativity=0 means that only one CMO is needed for all ways.
It could also mean that the cache is 1-way, but this is less likely.

Currently Associativity=0 causes us to hang in the while loop in
decode_cache_reg. Fix it by skipping the loop in this case. We can let
way_shift be set to the arbitrary value of 0 because in the case where
Associativity=0 we only ever shift 0 by it before ORing it into the
CMO operand.

Change-Id: I7c1de68d33f6b3ed627cbb1e2401d43185e4c1e3
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:20:56 +00:00
Marek Vrbka 851d1ad87a breakpoints: Add target logging to breakpoints and watchpoints
This patch adds target logging to breakpoint
handling code. This makes it easier to
debug multicore/multithread systems.

Change-Id: I6bea8079a457070a8f63d0ce381a4ece6f5a190a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7922
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-11-18 11:20:11 +00:00
Kirill Radkin 7c60f6593e breakpoints: Fix endless loop in bp/wp_clear_target
If we can't remove bp/wp, we will stuck in endless loop

Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7940
Tested-by: jenkins
Reviewed-by: Anatoly P <kupokupokupopo@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:19:45 +00:00
ianst f8096ce687 xtensa: update XDM register map for TRAX support
- Include additional debug module registers
- Add translation function for DM reg addr -> ID
- Add DM read/write commands

Signed-off-by: ianst <ianst@cadence.com>
Change-Id: If95419d24a9f27a40fa695c8c15326cdfd127ef1
Reviewed-on: https://review.openocd.org/c/openocd/+/7973
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-18 11:18:29 +00:00
Marc Schink 3862e07688 target: Remove break/watchpoints in target_destroy()
Break- and watchpoints are not removed when a target is destroyed
which introduces a memory leak.

Change-Id: I6143d48f7efd765b7752a12fdc337da3496d896f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7956
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:16:53 +00:00
Antonio Borneo d4575b647a target: fix segmentation fault on target create
In the unusual (and even incorrect) case of running the command
target create ...
before defining an adapter and the associated transport, the
command causes a segmentation fault. E.g.:
	openocd -c 'target create cpu cortex-m -endian little'

Check that get_current_transport() returns a valid pointer before
referencing it.

Change-Id: I9796a7e92196ef3df5c7152b27c34102045dc9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7962
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-11-18 11:16:27 +00:00
Antonio Borneo b39072f2ef target: use boolean values for 'valid' and 'dirty' flags
Convert to boolean the remaining numeric assignment and comparison

Change-Id: Idc25221d93e85236185aab9ee36f0a379939c89c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7961
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2023-11-18 11:16:06 +00:00
Antonio Borneo 5587710c1a nor: rsl10: fix minor coding style
I use a script to compare the commands in the code with the ones
in the documentation.
Fix the style of the data to simplify the parsing.

Change-Id: I0f1d7e9ff5e2928312ca1a2f3424f82d2910580a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7960
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2023-11-18 11:15:47 +00:00
Tim Newsome af786c0eca
Merge pull request #963 from kr-sc/kr-sc/no-free-triggers
When an attempt to set watchpoint fails because there is no free triggers OpenOCD reports "unknown error"
2023-11-17 09:18:44 -08:00
Tim Newsome 334f690f2a
Merge pull request #958 from riscv/set_field_get_field
target/riscv: Replace [sg]et_field macros with functions.
2023-11-16 15:22:57 -08:00
Tim Newsome d5ea55cfca
Merge pull request #957 from riscv/sbbusyerror
target/riscv: Handle sbbusyerror in read_memory_bus_v1
2023-11-16 09:39:41 -08:00
Kirill Radkin fee2e04d90 When an attempt to set watchpoint fails because there is no free triggers OpenOCD reports "unknown error"
Now it returns `resource not available`

Change-Id: Ifbbd468bdf62023850690eb96fe8a16f4114e915
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
2023-11-16 17:18:22 +03:00
Tim Newsome 08182bfc6b target/riscv: Handle sbbusyerror in read_memory_bus_v1
The existing code didn't seem to work right at all. I have spike
modifications that exercise these new cases. I'll merge those once this
has merged.

Change-Id: I89bd336f34f1b208a76f25b6b41fe3877800765b
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-11-15 11:27:32 -08:00
Tim Newsome 86b430b6b4 target/riscv: Replace [sg]et_field macros with functions.
Compilers are good at optimizing, and with functions it's abundantly
clear what all the types involved are. This change means we don't have
to be super careful about the type of values because of what the macro
might do to them that might cause overflow.

The only place where the return type matters is in printf-style
functions, and I made get_value32() for those cases where a change was
needed.

This should set the stage for simply copying the latest debug_defines.h
from the debug spec build again.

Change-Id: I5fb19d0cfc1e20137832a7b344b05db215ce00e1
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-11-15 11:12:09 -08:00
Evgeniy Naydanov 00320fd198 target/riscv: replace `__PRETTY_FUNCTION__` with `__func__`
The reasoning for the change:
* `__func__` is part of C99, `__PRETTY_FUNCTION__` is GNU extension.
* `__PRETTY_FUNCTION__` is defined to be the same as `__func__` for C
  sources by GCC documentation but differ for C++ sources (full
  signature instead of just a name).
* Currently Clang does support `__PRETTY_FUNCTION__`, though it uses
  GCC's C++ variant across C and C++.

Therefore using `__PRETTY_FUNCTION__` creates confusion and does not
provide any valueble information in the logs.

Change-Id: Ie0db6d73f602784b6752a30911dcef3dd7ee4594
2023-11-15 14:06:29 +03:00
Evgeniy Naydanov 3b0c654c67 target/riscv: dump_field() shouldn't always decode
Sometimes, the value from of some DMI scans has no meaning (e.g. when
`op` is read). Such values should not be decoded. To make the dumps more
consistent, `<no decoding available>` is printed when there is no
decoding for a register.

Change-Id: I415f06a5a80f2fc8fb8ab3f79132bdf0602c8ad6
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-11-15 14:06:29 +03:00
Tim Newsome 6de536bbb8
Merge pull request #961 from en-sc/en-sc/coreid-target-riscv
target/riscv: clarify usage of `coreid`
2023-11-13 09:45:58 -08:00
Daniel Anselmi d378c3a1d6 pld/certus: fix crash when loading bitstream
Loading a bitstream to cetrus device crashed due to
missing initialization.

Change-Id: Ibd9a04b84e514f9635af01a2b73bae478e534eb7
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7908
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:47:36 +00:00
Peter Collingbourne 42441fd96c target: Add a debug_reason command
This allows programmatically determining the debug reason.

Change-Id: I0c3e85cebb6dc28fc0fc212beca84a484ac654a5
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7952
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:43:43 +00:00
Erhan Kurubas a9080087d8 target/breakpoints: make breakpoint_watchpoint_remove_all static
Fixes below Sparse tool warning.
warning: symbol 'breakpoint_watchpoint_remove_all' was not declared.
Should it be static?

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4af1d5aa54abcb45f746b877513ba0b5fccbeb47
Reviewed-on: https://review.openocd.org/c/openocd/+/7955
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-11-11 18:05:46 +00:00
Evgeniy Naydanov 0f261188f1 target: fix a memory leak in image_open
Change-Id: I629be26e7752858091ad58c2b3b07f43e22e8c23
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7935
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:05:11 +00:00
Walter Ji d209598ce9 target/mips32: update mips32 config register parsing
Enhance `mips32_read_config_regs` to better detect MIPS32 ISA,
DSP, and FPU features, allowing user to get more detailed
target information.
Most of these information will be used in MIPS m/iAptiv support.

Change-Id: I23571a626ec64fa019acac91bdbfcb434373bfc1
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7911
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-11-11 18:04:19 +00:00
Marek Vrbka 7d1f132cea target: Fix get_reg, prevent returning invalid data
This patch forces a read of register from the target
in the get_reg command in case the register cache
does not hold a valid value at that moment.

Note that the command "reg" already handles it
correctly, no fix is needed there.

Change-Id: I75fad25188e94ee4e06162ab6d600ea24dbf590a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7958
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:03:47 +00:00
Marc Schink f58b5ddaf2 target/target: Use boolean values for 'valid' flag
Change-Id: Ieaa25b9ef0997c0f75ddfb652325c1a9e53a8d8d
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7959
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-11-11 18:02:52 +00:00
Antonio Borneo 59c4d35fa4 jep106: update to revision JEP106BH September 2023
The original documents from Jedec since JEP106BG, do not report
the entry for "21  NXP (Philips)", replaced by "c".
It's clearly a typo.

Keep the line from JEP106BF.01 for "NXP (Philips)".

Change-Id: I273c8c5ecf48336ce5189b484a7236273ba90184
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7954
Tested-by: jenkins
2023-11-11 18:02:24 +00:00
Tim Newsome 1ea0e9b426
Merge pull request #928 from AnastasiyaChernikova/triggers
target/riscv: cache requests to trigger configuration
2023-11-10 12:12:03 -08:00
Evgeniy Naydanov 5ec9938c61 target/riscv: clarify usage of `coreid`
By definition in `target/target.h`, `coreid` is not a unique identifier
of a target -- it can be the same for targets on different TAPs.

Change-Id: Ifce78da55fffe28dd8b6b06ecae7d8c4e305c0a2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-11-10 13:11:12 +03:00
Marek Vrbka 2357237815 target/riscv: Replace watchpoint value mask comparison value with macro.
This patch replaces ~(typeof(watchpoint->mask))0 with
WATCHPOINT_IGNORE_DATA_VALUE_MASK. This improves
readability and moves the RISCV target in line with
other targets.

Change-Id: I15ac4d4ee76098b304d9b22f720911ba4329c190
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-11-09 10:11:22 +01:00
Tim Newsome f119c1d480
Merge pull request #954 from riscv/from_upstream
Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' from upstream
2023-11-07 09:17:37 -08:00
Tim Newsome 5653f512a2
Merge pull request #952 from MarekVCodasip/stop-caching-dpc
target/riscv: Stop caching writes to DPC
2023-11-07 09:04:58 -08:00
Anastasiya Chernikova fea20e2bf5 target/riscv: cache requests to trigger configuration
Depending on configuration, the existing implementation of watchpoints is
rather inefficient for certain scenarios. Consider HW that:

1. triggers 0-3 can be used as instruction breakpoints
2. triggers 4-7 can be used as data breakpoints (watchpoints)
3.  NAPOT triggers are not supported.

Now, consider that we have a pending watchpoint. And we perform a "step"
operation. According to the current implementation:

* OpenOCD will disable watchpoints
* Perform a single-step
* Will try to restore the original watchpoints. It will need 12 attempts
to find a suitable trigger: (8 attempts to try NAPOT, and another 4 to try
GE+LE).

This patch introduces a dedicated cache for requests to triggers. It
significantly speeds things up, since we cache failed attempts and no
additional interactions with HW is necessary.

Change-Id: Ic272895eaa763a7ae84d14f7633790afd015ca9d
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
2023-11-07 14:51:49 +03:00
Tim Newsome b5bd88441c Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' into from_upstream
Conflicts:
	src/jtag/drivers/xds110.c
	src/target/riscv/riscv.c
	src/target/riscv/riscv_semihosting.c
	tcl/target/esp_common.cfg

Change-Id: If0c02817df03b7fd700cc84b4da2c02d36737d28
2023-11-06 09:25:46 -08:00
Tim Newsome c2f544c4f6 target/riscv: gdb_regno_name takes an enum.
Otherwise it won't compile for me. Not sure why that doesn't affect the
automated builds.

Change-Id: Ic66c743e1698c4c0772e5601723cb5c711b4fa5c
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-11-03 10:48:05 -07:00
Tim Newsome b75bfab026
Merge pull request #896 from AnastasiyaChernikova/ac-sc2
target/riscv: Adding register tables to make register names consiste
2023-11-03 10:30:35 -07:00
Tim Newsome 2676f05f2f
Merge pull request #947 from riscv/from_upstream
From upstream
2023-11-03 10:13:05 -07:00
Marek Vrbka adb9c3209e target/riscv: Stop caching writes to DPC
Since DPC is WARL (same rules as MEPC according to
the specification), it is possible that
writes to it won't result in the exact value present.
Therefore, writes to it shouldn't be cached, same as
with other WARL registers.

Change-Id: I818c0cef9727b999b7d84b19f9f42cd706c99d69
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-11-03 12:11:01 +01:00
Tim Newsome 20bcd83bca
Merge pull request #945 from kr-sc/kr-sc/fix-mmu-access-upstream
target/riscv: Fix memory access when MMU is enabled and address couldn't be translated
2023-11-02 09:33:55 -07:00
Anastasiya Chernikova 805d394ff8 target/riscv: Adding register tables to make register names consistent
Added the ability to enter dimensionless registers

Change-Id: I1b781959ce4690ec65304142bd9a7c6f540b3e86
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
2023-11-02 17:21:59 +03:00
Tim Newsome 51679e3e6b
Merge pull request #948 from riscv/uninitialized_dump
target/riscv: Prevent dump_field() reading uninitialized memory
2023-10-31 09:48:17 -07:00
Tim Newsome e474d1d54a target/riscv: Prevent dump_field() reading uninitialized memory
Change-Id: I9ef8f2c2e9a824aa6595e8f20682c968ae5aed72
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-10-30 09:21:19 -07:00
Kirill Radkin 57c3f0d91c target/riscv: Fix memory access when MMU is enabled and address couldn't be translated
Now:
1) If mmu is disabled, virt2phys succeeded and returns physical address
2) If mmu is enbaled, but translation fails, read/write_memory fails

Change-Id: I312309c660239014b3278cb77cadc5618de8e4de
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
2023-10-30 15:59:41 +03:00
Jan Matyas d14b71cd36 Removed deprecated gd32vf103_flash
Removing flash driver "gd32vf103_flash".

This driver has been deprecated since June-1-2022, and was scheduled
for removal in June 2023.

Change-Id: Ib6f4dcba11e91a095b3a20eedd864589084b7fa9
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-30 07:20:35 +01:00
Tim Newsome f02fe0960c Merge commit '9f23a1d7c1e27c556ef9787b9d3f263f5c1ecf24' into from_upstream
Conflicts:
	HACKING
	src/target/riscv/riscv-013.c

Change-Id: I43ccb143cae8daa39212d66a8824ae3ad2af6fef
2023-10-27 09:00:59 -07:00
Tim Newsome 89260a5f1f
Merge pull request #942 from riscv/from_upstream
From upstream
2023-10-27 08:46:43 -07:00
Kirill Radkin b388f4805c OpenOCD memory leak in `hwthread_update_threads()`
Update `os_free()` from `rtos/rtos.c:96` to fix memory leaks

Change-Id: Id7b4c775291b735a0b4423151c2930afce6bf0bd
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7934
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-27 11:41:30 +00:00
Tomas Vanek e5d26f1546 flash/nor/spi: add guide to select proper erase cmd
Extend comments in flash_devices array.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I7ab85a2d37803b6bc9fc7a2a91ae2effb6ec288d
Reviewed-on: https://review.openocd.org/c/openocd/+/7925
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2023-10-27 11:41:11 +00:00
Tim Newsome b48636158a
Merge pull request #944 from riscv/remove_extra_kept_alive
Remove an extra call to kept_alive()
2023-10-26 09:18:47 -07:00
Evgeniy Naydanov 57b67eda38 target/riscv: update debug register printers
Change-Id: I069bbe069a3aaa7fd3a4f6eccde40f813db33cc9
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-10-25 19:16:36 +03:00
Jan Matyas a26c90f220 Remove an extra call to kept_alive()
This incorrect extra call has been removed in upstream code already
in March 2022, see https://review.openocd.org/c/openocd/+/6836 .

Remove it from riscv-openocd as well.

Change-Id: Ie341f5578c8bfdc518adf1e4bc134919ab76f803
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-25 12:44:01 +02:00
EasyDevKits a080d9795a jtag/drivers: Extension of jtag_libusb_open
In jtag_libusb_open I've added a parameter for delivering the device
description for which this function should search and adjusted all
callers of this function. A new driver for WCH CH347 JTAG chips
will use this new parameter.
See also: https://review.openocd.org/c/openocd/+/7937

Change-Id: I85e1d7b1f7912ba5e223f0f26323ff3b7600e17d
Signed-off-by: EasyDevKits <info@easydevkits.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7938
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:35:16 +00:00
Walter Ji e887cfb9e8 target/mips32: check read regs result in save context
Add result check for mips32_pracc_read_regs in mips32_save_context.

Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7932
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:34:00 +00:00
Walter Ji 18c64af135 target/mips32: rework mips core register related functions
Update mips core definitions.
Reworked mips core register structure and read/write function.
Add coprocessor0 register definitions for target configuration.

Change-Id: I59c1f4cc4020db8a78e8d79f7421b87382fa1709
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7864
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:33:10 +00:00
Tim Newsome 2d98ef5d13
Merge pull request #941 from kr-sc/kr-sc/fix-hgatp-mode-upstream
hgatp_mode in riscv_virt2phys_v defined by vsatp value
2023-10-24 07:57:37 -07:00
Tim Newsome 03fff0f86c Fix build.
Change-Id: I20bd0356c63745423e23aec71f272fe2e32db88e
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-10-23 12:35:45 -07:00
Tim Newsome af08d582b5 Merge commit 'e17fe4db0f256ee4fb97dcfd6b9f7f55c966b190' into from_upstream
Conflicts:
	src/flash/nor/drivers.c
	src/target/riscv/riscv.c

Change-Id: Ide3eded7e0d5b0b446bfd0873a32c00cc9f128bd
2023-10-23 12:29:21 -07:00
Tim Newsome 132e3faf1d
Merge pull request #940 from riscv/revert-908-disable-soft-bp-size-2-non-compressed
Revert "target/riscv: Reject size 2 soft breakpoints when C extension not supported"
2023-10-23 11:45:50 -07:00
Kirill Radkin 109772012a hgatp_mode in riscv_virt2phys_v defined by vsatp value
Replace `vsatp` with `hgatp` (how it should be)

Change-Id: Ie548467b06d1fb266ccc56cbec1aff8d9f435973
2023-10-23 18:56:40 +03:00
Tim Newsome 3b0561d081
Merge pull request #935 from riscv/from_upstream
Merge down up to 0384fe5 from upstream.
2023-10-23 08:38:48 -07:00
Tim Newsome 912de786a4
Revert "target/riscv: Reject size 2 soft breakpoints when C extension not supported" 2023-10-20 15:37:28 -07:00
Tim Newsome 2f71800cbb flash/stm32lx: Revert to upstream version.
Reintroduce checkpatch problem, because now we can handle them better.

Change-Id: Ib81b9910433ae1a240630b898edb19da8d2d5d83
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-10-17 14:22:17 -07:00
Tim Newsome a495dd854c
Merge pull request #934 from kr-sc/kr-sc/revert-commit
Revert "target: Update messages connected with `examine`"
2023-10-17 09:46:31 -07:00
Kirill Radkin 6c96b9d8c3 Revert "target: Update messages connected with `examine`"
This reverts commit a3db93b1ce.

Reason for revert: https://github.com/riscv/riscv-openocd/pull/931#issuecomment-1761550506
2023-10-17 12:57:39 +03:00
Tim Newsome 53fcf14d83 Merge commit '0384fe5d596f42388f8b84d42959d899f29388ab' into from_upstream
Conflicts:
      .github/workflows/snapshot.yml
      src/rtos/FreeRTOS.c

Change-Id: I4c9ff887b69140e0f61cb3f75a2f2c1a12071320
2023-10-16 12:30:06 -07:00
Tim Newsome e1fa78d1b3
Merge pull request #929 from aap-sc/riscv
do not assume DTM version unless dtmcontrol is read successfully
2023-10-16 12:10:25 -07:00
Parshintsev Anatoly c7d1f0ddab target: check if target is not examined on reg command
Change-Id: I46093c85374986a36d10eaac38b98bd5e05835ca
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7841
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-10-14 12:06:40 +00:00
Tim Newsome 14b1b35e42 server/gdb_server: Log gdb index in debug messages.
This makes it easier to look at log files where multiple gdb instances
are connected.

Change-Id: Ic5aca52b32ee03ac35ffbed9a2fc552abb0a1cba
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7895
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-14 12:04:02 +00:00
Marek Vrbka 7822260ed4 target: Change the watchpoint type print from number to letter
Previously, when listing the watchpoints, OpenOCD printed
numbers 0, 1 and 2 representing READ, WRITE and ACCESS type
watchpoints.

This patch changes it to 'r', 'w' and 'a'. This increases the
clarity as what type the watchpoint actually is.

Change-Id: I9eac72dfd0bb2a9596a5b0c080a3f584556ed599
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7909
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-14 12:02:57 +00:00
Marek Vrbka eba5d21193 breakpoints: add rwp all command
This patch adds the "all" option to the rwp command.
It removes all watchpoints, much like rbp all removes
all breakpoints.

Change-Id: Id58dd103085e558f17afa4a287888cf085566ca9
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7907
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14 12:01:38 +00:00
Marek Vrbka 2c8c2cb6b1 command: Prepend logs during command capture
Previously, if you ran a tcl command in capture like so:
"capture { reg 0x1000 hw }"
Such command did overwrite the tcl result if LOG_LVL_INFO or
lower was logged during it.

This patch changes it by prepending the log to the tcl result instead.
As the tcl results should not be lost during capture.

Change-Id: I37381b45e15c931ba2844d65c9d38f6ed2f6e4fd
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7902
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-14 12:00:16 +00:00
Kirill Radkin bcaac692d0 target: Fix an issue with rwp/rbp command in smp targets
If wp/bp is missing at address rwp/rbp won't return zero code (on smp).
Now it fixed.

Fixes: 022e438292 ("target: Change policy of removing watchpoints/breakpoints.")

Change-Id: I3a3c245f7088fc23227b286d2191fc7f3edba702
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7910
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14 11:59:34 +00:00
Florian Fainelli d27a3a00b8 arm_opcode: Add support for ARM MCRR/MRRC
Add support for the ARM MCRR/MRRC instructions which require the use of
two registers to transfer a 64-bit co-processor registers. We are going
to use this in a subsequent patch in order to properly dump 64-bit page
table descriptors that exist on ARMv7A with VMSA extensions.

We make use of r0 and r1 to transfer 64-bit quantities to/from DCC.

Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14 11:55:42 +00:00
Tim Newsome d454854c13 server/gdb_server: Fake resuming unavailable targets.
When asked to resume an unavailable target, resume any available targets
and report success.

Change-Id: Ieafc63794c1a6eba8948c0f9ce84fa74f9765041
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-10-13 08:32:19 -07:00
Tim Newsome 6e9514efcd
Merge pull request #926 from riscv/unavailable_events
server/gdb_server: Handle events if first target is unavailable
2023-10-11 13:00:21 -07:00
Tim Newsome 6f4b90afb7
Merge pull request #925 from riscv/unavailable_reg
gdb_server,rtos: Differentiate rtos_get_gdb_reg failing and not imple…
2023-10-11 13:00:03 -07:00
Tim Newsome beb705912b
Merge pull request #917 from kr-sc/kr-sc/disable-triggers-option
provide riscv-specific controls to disable triggers from being used for watchpoints
2023-10-11 12:34:07 -07:00
Tim Newsome 41d1ee3715
Merge pull request #931 from kr-sc/kr-sc/update-examine-messages
target: Update messages connected with `examine`
2023-10-11 12:33:38 -07:00
Tim Newsome 52c9ae0aa1 server/gdb_server: Handle events if first target is unavailable
When a target in an SMP group is unavailable, the gdb layer might get an
event for a different target in that SMP group, but not one that is the
primary target for that gdb connection. So propagate events if they're
for any of the targets in the SMP group, not just if it's for the first
one in that group.

Change-Id: I8d6738762acc7c0aef96f56ce2cb7f2eeb233b33
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-10-10 10:57:30 -07:00
Tim Newsome 969b30326c rtos: Refactor rtos_get_gdb_reg()
Exit early if conditions aren't satisfied, instead of putting the core
code inside an if().

Also return ERROR_FAIL if conditions are satisfied but no matching
registers were found.

Change-Id: I77aa63d9f707bc38d1a71899275ba603914b52c9
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-10-10 10:51:47 -07:00
Parshintsev Anatoly 2f17449dff target: return error if attempting to access non-existing registers
Change-Id: Ic22edcab46d21dbc71f78275a78bdea9c2bcc394
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7886
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-07 14:43:59 +00:00
Artemiy Volkov d20304b3fb target/arc: do not invalidate icache when (un)setting breakpoints
Currently, instruction cache is being invalidated in
arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is
HW or SW. For SW breakpoints, this has no net effect as the caches are
flushed as a by-product of overwriting instructions in main memory and
is thus merely unnecessary; but for HW breakpoints this invalidation is
not preceded by a flush and might lead to loss of data. This patch
removes the invalidate() call altogether to correct this undesired
behavior for HW breakpoints.

With this patch applied, all supported HW breakpoint tests from the gdb
testsuite are now passing with the arc-openocd backend.

Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7767
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07 14:42:13 +00:00
Antonio Borneo bdf73617e7 armv8_dpm: fix registers read at debug entry
The comment above armv8_dpm_read_current_registers() doesn't match
the implementation, as the function reads all the registers from
ARMV8_PC and above.
The registers currently read are not relevant to answer to the
usual GDB initial request through the 'g' packet. Plus the lack of
differentiation per core state (AArch32 vs AArch64) causes the
read of not existing registers in AArch32 triggering errors, as
tentatively fixed by https://review.openocd.org/5517/

Fix the code to read the registers initially required by GDB.
Modify the comment to report the register list in AArch32 and in
AArch64.
Keep the extra checks inside the read loop, even if they are
mostly irrelevant; this could prevent errors if someone needs to
extend the number of registers to read.

The current implementation of the register's description in
OpenOCD does not allow to discriminate among AArch32 and AArch64
registers. Add a TODO comment to highlight it.

Change-Id: Icd47d93c19a9e1694a7b51bbc5ca7e21a578df41
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7887
Tested-by: jenkins
2023-10-07 14:39:12 +00:00
liangzhen 3f1339f8e8 target/riscv: use cacheable read/write function to handle DCSR
Signed-off-by: liangzhen <zhen.liang@spacemit.com>
2023-10-07 09:26:31 +08:00
Parshintsev Anatoly 2c4118ecea do not assume DTM version unless dtmcontrol is read successfully
Change-Id: I5f2003b7ac5ce87af6ca9a4fcb46140682a8cfdf
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
2023-10-06 18:51:53 +03:00
Tim Newsome 28f630d245
Merge pull request #924 from riscv/unavailable_step
server/gdb_server: Step unavailable targets.
2023-10-05 12:12:16 -07:00
Tim Newsome 599e0a22e8
Merge pull request #915 from riscv/dpc_print
target/riscv: Remove duplicate read PC message
2023-10-05 12:05:16 -07:00
Kirill Radkin a3db93b1ce target: Update messages connected with `examine`
Move `examine_attempted` flag to target struct to make it target specific.
`Info` messages for retry and `Error` messages for failure added.

Change-Id: Id2fbe7dc68d746c936c8412289d0d149fbd80d71
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
2023-10-03 16:28:28 +03:00
Ahmed Boughanmi f76c8de910 target/cortex_m: support Infineon Cortex-M33 from SLx2 MCU
The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
The register CPUID reports value 0x490FDB00.

Reference link to the product:
Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html

Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
Signed-off-by: Ahmed Boughanmi <boughanmi.external@infineon.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7879
Reviewed-by: Karl Palsson <karlp@tweak.au>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-02 14:50:50 +00:00
Marek Vrbka c6ab3abeee image: log error when unknown image type is specified
This patch adds error reporting when unknown image type is specified.
Previously, OpenOCD replied with an empty string.

Change-Id: I16220b1f5deb3b966a21731f0adf7911a78e8959
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7883
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-02 14:49:57 +00:00
Kirill Radkin e76a9b799d provide riscv-specific controls to disable triggers from beeing used for watchpoints
Add a new riscv specific commands to disable triggers

Change-Id: Ic1842085aa66851c740e0abcbfbe0adbe930920e
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
2023-10-02 11:54:07 +03:00
Tim Newsome 2f1714789b
Merge pull request #921 from lz-bro/repeat_read-fix
target/riscv: support riscv repeat_read by sysbus access
2023-09-29 09:31:59 -07:00
Tim Newsome 75b5de67df
Merge pull request #918 from kr-sc/kr-sc/allow-to-query-status-dcsr-ebreak
openocd does not allow to query status of dcsr.ebreak{u,s,m}
2023-09-29 09:30:46 -07:00
Tim Newsome ef3be96ba1
Merge pull request #892 from en-sc/en-sc/register-printing
target/riscv: define register printers
2023-09-28 08:36:36 -07:00
Tim Newsome 15f399691e gdb_server,rtos: Differentiate rtos_get_gdb_reg failing and not implemented
If it fails, then pass that failure on. If it's simply not implemented,
then we can fall through and try target_get_gdb_reg_list_noread().

This difference matters when the target representing the current
hwthread is unavailable, but the target that is linked to the gdb
connection is available. In that case we want the operation to return an
error to gdb, instead of reading the register from the target that is
available.

Change-Id: I9c84ca556f818c5580e25ab349a34a226fcf0f43
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-09-27 13:52:11 -07:00
Tim Newsome 944fe66f10 server/gdb_server: Step unavailable targets.
When gdb requests to step an unavailable target, report success. When
the target becomes available, the step can complete.

Change-Id: I969ab56139f72a757552928d59edf6eabd598fa4
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-09-27 13:08:50 -07:00
Kirill Radkin ee2bc807eb openocd does not allow to query status of dcsr.ebreak{u,s,m}
Extend riscv set_ebreak* commands.
Now it can be called without args to print current value.

riscv_ebreak* flags are moved to riscv_info struct.

Change-Id: Ib46e6b6dfc0117599c7f6715c7aaf113e63bd7dc
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
2023-09-26 11:52:30 +03:00
Tim Newsome 3acc277e49 target/riscv: Remove duplicate `read PC` message
Change-Id: Ie085758e3cf193f2671ea53fb82fd401d0c52d86
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-09-25 11:41:04 -07:00
Tim Newsome b5e57e1894
Merge pull request #913 from riscv/from_upstream
From upstream
2023-09-25 09:21:09 -07:00
Vincent Fazio 21f17260d4 jtag/drivers/bcm2835gpio: fix bcm2835_peri_base output format
Previously, the bcm2835_peri_base value would be printed as a decimal
value despite having a "0x" prefix, implying it should be a hex value.

  BCM2835 GPIO: peripheral_base = 0x1056964608

Now, the value is correctly converted to hexidecimal.

  BCM2835 GPIO: peripheral_base = 0x3F000000

Change-Id: Id59185423917e6350f99ef68320e2102a3192291
Fixes: b41b368255 ("jtag/drivers/bcm2835gpio: extend peripheral_base to off_t")
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7888
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:43:26 +00:00
Tomas Vanek 5fd4f2954d target/adi_v5_xxx: use ADIV5_DP_SELECT_APBANK
and DP_SELECT_DPBANK.
Use the defined symbols instead of magic numbers.

Change-Id: I19c86b183e57e42b96f76eed180c0492cd67bee1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7539
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:37:22 +00:00
Tomas Vanek f49bf1adb4 target/arm_adi_v5,jtag/drivers: rename ADIv5 only defines
DP_SELECT_APSEL and DP_SELECT_APBANK is no more used in ADIv6.

Change-Id: I4176574d46c6dc8eb3fe3aef6daab6e33492c050
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7538
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:36:57 +00:00
Daniel Anselmi eb22a37b42 pld: harmonize refresh commands
add refresh command for lattice devices
rename gowin reprogram to refresh
rename virtex2 program to refresh

Change-Id: I9da83a614b96da3e947ac4608b0a291b1d126914
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7839
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:36:14 +00:00
Daniel Anselmi 198a914cf9 jtagspi/pld: add support from gatemate driver
Provide	jtagspi	with specific procedures to be able to
use jtagspi for	programming spi-flash devices on cologne
chip gatemate devices.

Change-Id: Ifa1c4ca6e215d7f49bd21620898991af213812e9
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7838
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-09-23 14:35:51 +00:00
Daniel Anselmi b86726b5a5 jtagspi/pld: add support from intel driver
Provide jtagspi with information to use jtagspi for
programming spi-flash devices on intel devices using
a proxy bitstream.

Change-Id: Ib947b8c0dd61e2c6fa8beeb30074606131b1480f
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7837
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:35:35 +00:00
Daniel Anselmi 2d4fd58fca jtagspi/pld: add support from xilinx driver
Provide jtagspi with information to use jtagspi for
programming spi-flash devices on xilinx devices
using a proxy bitstream.

Change-Id: I68000d71de25118ed8a8603e544cff1dc69bd9ba
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7836
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:35:20 +00:00
Daniel Anselmi b2a22943e1 jtagspi/pld: add support from efinix driver
Provide	jtagspi	with information to use jtagspi for
programming spi-flash devices on efinix trion and
titanium devices using a proxy bitstream.

Change-Id: I4a851fcaafe832c35bd7b825d95a3d08e4d57a7b
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7826
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-09-23 14:34:57 +00:00
Daniel Anselmi 302027094b jtagspi/pld: add support from lattice certus driver
Provide	jtagspi	with specific procedures to be able to
use jtagspi for	programming spi-flash devices on lattice
certus and certus po devices.

Change-Id: I6a8ec16be78f86073a4ef5302f6241185b08e1c6
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7825
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:34:40 +00:00
Daniel Anselmi 536f2a9f2a jtagspi/pld: add support from lattice ecp5 driver
Provide	jtagspi	with specific procedures to be able to
use jtagspi for	programming spi-flash devices on lattice
ecp5 devices.

Change-Id: I4a4a60f21d7e8685a5b8320b9c6ebdc2693bbd21
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7824
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-09-23 14:34:18 +00:00
Daniel Anselmi 2b99846ab6 jtagspi/pld: add support from lattice ecp2/ecp3 driver
Provide jtagspi with specific procedures to be able to
use jtagspi for programming spi-flash devices on lattice
ecp2 and ecp3 devices.

Change-Id: I39028aba47a74a0479be16d52d318f4bff7f2ed4
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7823
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:33:59 +00:00
Daniel Anselmi fe5ed48f40 jtagspi/pld: add interface to get support from pld drivers
Jtagspi is using a proxy bitstream to "connect" JTAG to the
SPI pins. This is not possible with all FPGA vendors/families.
In this cases a dedicated procedure is needed to establish such
a connection.

This patch adds a jtagspi-mode for these cases. It also adds the
needed interfaces to jtagspi and the pld-driver so the driver
can select the mode and provide the necessary procedures.

For the cases where a proxy bitstream is needed, the pld driver
will select the mode and provide instruction code needed in this
case.

Change-Id: I9563f26739589157b39a3664a73d91152cd13f77
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7822
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:33:37 +00:00
Tomas Vanek c20cb28faf flash/nor: remove useless bank->next = NULL
struct flash_bank must be zeroed anyway, calloc() is always used.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I7ab3b9c66f99688c6095a0a547a05448c9e37d68
Reviewed-on: https://review.openocd.org/c/openocd/+/7885
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:31:25 +00:00
Tomas Vanek 040757b7e6 flash/nor/at91sam7: fix flash bank allocation
at91sam7 flash driver allocates a flash bank based on detected flash
structure.
Use calloc() instead of malloc() - struct flash_bank has to be zeroed.

While on this:
Return error in case of struct flash_bank or driver_priv allocation fail.
Set default_padded_value and erased_value.
Use strdup() on bank->name, pointer is freed in flash_free_all_banks()

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Id890496bfbadb7970ef583256aa4f30a7bff832f
Reviewed-on: https://review.openocd.org/c/openocd/+/7884
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23 14:30:20 +00:00
Evgeniy Naydanov 43ebdd47a5 target/riscv: define register printers
`riscv_debug_reg_to_s()` can be used to decode register value.  If the
pointer to buffer is `NULL` it does not print anything, just returns the
length of the string.

The format is:
`<register_value> { <field_name>=<field_value_name or field_value>, ..., }`

e.g:

`0x400382 { version=2, ... ndmresetpending=false, }`

`0x321009 { regno=0x1009, ... cmdtype=0, }`

Change-Id: I63733d8d36385d89ca15de1a43139134bc488c4f
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-09-22 16:26:28 +03:00
liangzhen a8ffda6e70 target/riscv: support riscv repeat_read by sysbus access
Signed-off-by: liangzhen <zhen.liang@spacemit.com>
2023-09-21 15:33:17 +08:00
Tarek BOCHKATI 870769b0ba flash/stm32l4x: support STM32WBA5xx devices
STM32WBA5x have a single bank flash up to 1MB

Change-Id: I3d720e202f0fdd89ecd8aa7224653ca5a7ae187b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7694
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-19 05:17:09 +00:00
Fedi Bouzazi fb52ba4fa1 target/cortex_m: support DWT version 2.1 for Archv8_M
According to Arm®v8-M Architecture Reference Manual:
section D1.2.59 DWT_DEVARCH, DWT Device Architecture Register,
the field REVISION bits [19:16] defines two DWT architectures revision

Signed-off-by: Fedi Bouzazi <fedi.bouzazi@st.com>
Change-Id: I948dae0710ac921a7f0fbcef3ccacdae99184fe4
Reviewed-on: https://review.openocd.org/c/openocd/+/7800
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17 12:14:03 +00:00
Antonio Borneo 8bbbff185f flash: npcx: fix memory leak in npcx_flash_bank_command
Recent commit 62f76b2169 ("flash/nor: add support for Nuvoton
NPCX4/K3 series flash") introduces a memory leak for a missing
free() on early return for an error.

Add the free() on the return path on error.

Change-Id: Ica8568a986802e23df2ab7bed4e8cc4bbb6305a5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 62f76b2169 ("flash/nor: add support for Nuvoton NPCX4/K3 series flash")
Reviewed-on: https://review.openocd.org/c/openocd/+/7894
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-09-17 12:13:01 +00:00
Daniel Goehring 300fe1d405 target/aarch64: add AArch64 mdd and mwd support
For ARMv8, add AArch64 mdd and mwd support. AArch32 not supported.

Change-Id: I25490471e16943e5a67d7649595d77643aa9a095
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7192
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-09-17 12:07:17 +00:00
Evgeniy Naydanov 236c54c94a server/gdb_server.c: support unavailable registers
According to gdb documentation, `g` and `p` packets can report a
register being unavailable by a string of 'x' instead of register's
value.

Change-Id: I8ef279f1357c2e612f5d3290eb0022c1b47d9fa7
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7876
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Anatoly Parshintsev <kupokupokupopo@gmail.com>
Tested-by: jenkins
2023-09-17 12:01:47 +00:00
Tim Newsome 2c2135a0cb target/riscv: Don't assert in riscv013_get_register()
When the target isn't halted, simply return an error. This used to be
purely internal code so an assert was appropriate. Now after some
refactoring and with unavailable harts you could get here when the hart
is unavailable. In that case the right thing is simply to return an
error message.

Change-Id: I49d26a11fe7565c645fd2480e89a2c35ea9b1688
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-09-13 13:44:20 -07:00
Tim Newsome fb26f4f89d target/xtensa: Fix build warning.
Change-Id: I9ee69807bec729480dd94da874fe1771d8f06078
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-09-12 13:11:05 -07:00
Tim Newsome 8c1f1b77d3 Merge commit 'ee31f1578a333a75737bc5b183cd4ae98cdaf798' into from_upstream
Conflicts:
	Makefile.am
	jimtcl
	src/helper/Makefile.am
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/rtos/rtos_standard_stackings.c

Change-Id: I00c98d20089558744988184370a8cb7f95f03329
2023-09-12 12:55:10 -07:00