yosys/tests
Krystine Sherwin 5767da92d5
tests/select: Add tests for selections with boxes
2024-11-19 08:44:50 +13:00
..
aiger read_aiger: Fix incorrect read of binary Aiger without outputs 2024-04-29 14:06:58 +01:00
arch Remove references to ilang 2024-11-05 12:36:31 +13:00
asicworld tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
bind Add support for parsing the SystemVerilog 'bind' construct 2021-07-16 09:31:39 -04:00
blif tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
bram tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
cxxrtl cxxrtl: test stream operator 2024-10-01 13:25:07 +02:00
errors Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique, 2018-10-25 02:37:56 +03:00
fmt cxxrtl: always lazily format print messages. 2024-01-19 18:55:23 +00:00
fsm tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
functional functional tests: run from make tests but not smtlib/rkt tests 2024-09-04 10:30:08 +01:00
hana tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
liberty read_liberty: s/busses/buses/ 2024-11-12 13:33:41 +01:00
lut tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
memfile tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
memlib Move parameters to module declaration 2024-04-08 12:44:37 +02:00
memories rtlil: Adjust internal check for `$mem_v2` cells 2024-11-08 15:18:43 +01:00
opt Remove references to ilang 2024-11-05 12:36:31 +13:00
opt_share tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
proc Remove references to ilang 2024-11-05 12:36:31 +13:00
realmath tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
rpc Remove references to ilang 2024-11-05 12:36:31 +13:00
sat Remove references to ilang 2024-11-05 12:36:31 +13:00
select tests/select: Add tests for selections with boxes 2024-11-19 08:44:50 +13:00
share tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
sim Merge pull request #4620 from RCoeurjoly/fix-vcd-parsing-ghdl-var-spacing 2024-11-06 16:29:07 +01:00
simple write_verilog: don't `assign` to a `reg`. 2024-04-03 13:06:45 +02:00
simple_abc9 tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
smv Remove references to ilang 2024-11-05 12:36:31 +13:00
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
svtypes fix test for verific 2024-02-12 09:19:58 +01:00
techmap Merge pull request #4704 from YosysHQ/krys/drop_ilang 2024-11-08 11:28:06 +13:00
tools support file locations containing spaces 2022-08-08 20:30:50 +02:00
unit rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
various Merge pull request #4525 from georgerennie/peepopt_clock_gate 2024-11-11 14:49:09 +01:00
verific Add left and right bound properties to wire. Add test. Fix printing 2024-09-10 12:52:42 +02:00
verilog Remove references to ilang 2024-11-05 12:36:31 +13:00
vloghtb tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
xprop tests: Comment on `A[0]` 2024-02-16 11:43:28 +01:00
gen-tests-makefile.sh do not override existing shell variable 2024-02-12 12:58:13 +01:00