Commit Graph

12725 Commits

Author SHA1 Message Date
Miodrag Milanović d79b4b2218
Merge pull request #3903 from jix/dft-future_ff
Basic support for tag primitives and `$future_ff`
2023-09-13 13:40:10 +02:00
Catherine e9a11dd088 Update ABC for WASI support. 2023-09-13 11:39:30 +00:00
Jannis Harder 0e8a4adb59 verific: Update YOSYSHQ_VERIFIC_API_VERSION 2023-09-13 11:32:36 +02:00
Jannis Harder 62b4df4989 dft_tag: Implement `$overwrite_tag` and `$original_tag`
This does not correctly handle an `$overwrite_tag` on a module output,
but since we currently require the user to flatten the design for
cross-module dft, this cannot be observed from within the design, only
by manually inspecting the signals in the design.
2023-09-13 11:32:36 +02:00
Jannis Harder 78ff40d1b2 Run `future` as part of `prep` 2023-09-13 11:32:36 +02:00
Jannis Harder 46a35da28c Add `future` pass to resolve `$future_ff` cells 2023-09-13 11:32:36 +02:00
Jannis Harder 7a0c37b62d Initial dft_tag implementation
This is still missing a mode to rewrite $overwrite_tag and $original_tag
by injecting $set_tag and $get_tag in the right places. It's also
missing bit-precise propagation models for shifts and arithmetic and
requires the design to be flattened.
2023-09-13 11:32:36 +02:00
Miodrag Milanovic 27ac912709 Support import of $future_ff 2023-09-13 11:32:36 +02:00
Miodrag Milanovic 9c255c98b1 unescape string tag attribute 2023-09-13 11:32:36 +02:00
Miodrag Milanovic 54050a8c16 Basic support for tag primitives 2023-09-13 11:32:36 +02:00
github-actions[bot] 9e004426e0 Bump version 2023-09-13 00:14:55 +00:00
Martin Povišer 08f79d111e ci: Enable extra libstdc++ assertions 2023-09-12 19:45:07 +02:00
Martin Povišer 05f0262d77
Merge pull request #3929 from YosysHQ/gatecat/fmt-fix
fmt: Fix C++ string assertion when buf is empty
2023-09-12 19:44:17 +02:00
Martin Povišer b04f2352bb
Merge pull request #3928 from povik/mem-wr-merge-transpemu-fix
mem: Fix index confusion in write port merging
2023-09-12 19:43:58 +02:00
gatecat 98b9459535 fmt: Fix C++ string assertion when buf is empty
Signed-off-by: gatecat <gatecat@ds0.me>
2023-09-12 18:12:07 +02:00
Martin Povišer cbc4ec8178 mem: Fix index confusion in write port merging
Fix mistaking the read-port and write-port indices for each other when
we are adding the partial transparency emulation to be able to merge two
write ports.
2023-09-12 16:43:59 +02:00
Miodrag Milanović 88ce47e4f0
Merge pull request #3892 from QuantamHD/dont_use
abc: Exposes dont_use flag in ABC
2023-09-12 14:58:44 +02:00
Miodrag Milanović 1b5c7b8dd7
Merge pull request #3927 from YosysHQ/verific_memory
verific - respect order of read and write for rams
2023-09-12 14:58:02 +02:00
Miodrag Milanović ec75b24b8a
Merge pull request #3926 from YosysHQ/update_abc2
Update ABC to latest
2023-09-12 14:57:50 +02:00
Miodrag Milanovic 7b134c2a8c verific - respect order of read and write for rams 2023-09-12 11:56:15 +02:00
andyfox-rushc e4fe522767 MultPassWorker -> BoothPassWorker 2023-09-11 13:00:11 -07:00
andyfox-rushc eccc0ae6db Based passes/techmap/Makefile.inc changes on latest in yosys 2023-09-11 12:14:12 -07:00
andyfox-rushc a2c8e47295 multpass.cc -> booth.cc, added author/support contact info 2023-09-11 11:39:13 -07:00
Martin Povišer 31ee566ece
Merge pull request #3918 from povik/print-sampling-fix
ast: Substitute rvalues when parsing out print arguments
2023-09-11 17:08:04 +02:00
Martin Povišer 5bef9b4e75
Merge pull request #3915 from povik/sim-print
sim: Add print support
2023-09-11 17:03:59 +02:00
Miodrag Milanovic bef7ffccc1 Update ABC to latest 2023-09-11 16:25:58 +02:00
andyfox-rushc 1b5287af59 cpa_carry array added to heap 2023-09-10 14:20:30 -07:00
andyfox-rushc 8d4b6c2f69 Switched arrays for signed multiplier construction to heap 2023-09-10 13:31:47 -07:00
andyfox-rushc d77fb81507 2d array -> 1d array in module generator 2023-09-10 12:45:36 -07:00
andyfox-rushc 0fa412502c mult -> booth in synth.cc, to turn on use synth -booth 2023-09-08 16:44:59 -07:00
andyfox-rushc 1d92ea8001 Support for turning on mult pass from generic synth command 2023-09-08 16:16:24 -07:00
andyfox-rushc 6d29dc659b renamed passname to booth, replaced connect_sigSpecToWire with connect, updated test script 2023-09-08 15:34:56 -07:00
andyfox-rushc 411acc4a0a Fixed edge size cases for signed/unsigned booth generator 2023-09-08 13:41:31 -07:00
Martin Povišer 25a33d4082 techmap: Make the Booth test deterministic 2023-09-07 14:56:56 +02:00
Martin Povišer 0c2a99ca47 techmap: Test the Booth multiplier 2023-09-07 14:46:59 +02:00
github-actions[bot] 41b34a1935 Bump version 2023-09-07 00:14:30 +00:00
andyfox-rushc fedefa26bc multpass -- create Booth Encoded multipliers for 2023-09-06 16:35:17 -07:00
Jannis Harder 368f2dd618
Merge pull request #3922 from jix/xprop-fixes 2023-09-06 20:29:17 +02:00
Jannis Harder e187fc915e xprop: Fix polarity errors and generate hdlnames
* Fixes a non-deterministic polarity error for $eqx/$nex cells
* Fixes a deterministic polarity error for $_NOR_ and $_ORNOT_ cells
* Generates hdlnames when xprop is run after flatten
2023-09-06 19:25:47 +02:00
Zachary Snow 4edb1a1921 sv: support assignments within expressions
- Add support for assignments within expressions, e.g., `x[y++] = z;` or
  `x = (y *= 2) - 1;`. The logic is handled entirely within the parser
  by injecting statements into the current procedural block.
- Add support for pre-increment/decrement statements, which are
  behaviorally equivalent to post-increment/decrement statements.
- Fix non-standard attribute position used for post-increment/decrement
  statements.
2023-09-05 22:27:55 -04:00
github-actions[bot] 83b1a57eed Bump version 2023-09-06 00:14:34 +00:00
Martin Povišer 2d0fc040cf ast: Substitute rvalues when parsing out print arguments
Apply the local substitutions stemming from process context when parsing
out format arguments to `$display` or other statements.
2023-09-05 21:40:39 +02:00
Martin Povišer d4d951657f sim: Add `-assert` option to fail on failed assertions 2023-09-05 10:46:04 +02:00
Martin Povišer e995dddeaa abc: Warn about replacing undef bits 2023-09-05 10:45:30 +02:00
Miodrag Milanovic 11a2de815a Next dev cycle 2023-09-05 08:11:03 +02:00
Miodrag Milanovic 2584903a06 Release version 0.33 2023-09-05 08:08:51 +02:00
github-actions[bot] b75959f1f2 Bump version 2023-09-05 00:14:21 +00:00
Martin Povišer c6566b660f memlib.md: Fix typo 2023-09-04 17:38:35 +02:00
Martin Povišer 3de84b959f memory_libmap: Tweak whitespace 2023-09-04 17:38:35 +02:00
Martin Povišer 50d117956c sim: Add print support 2023-09-04 17:12:38 +02:00