riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #3918 from povik/print-sampling-fix 

ast: Substitute rvalues when parsing out print arguments
This commit is contained in:
Martin Povišer 2023-09-11 17:08:04 +02:00 committed by GitHub
parent 5bef9b4e75 2d0fc040cf
commit 31ee566ece
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
frontends/ast/genrtlil.cc
View File

@ -759,7 +759,7 @@ struct AST_INTERNAL::ProcessGenerator
arg.realtime = true;
} else {
arg.type = VerilogFmtArg::INTEGER;
arg.sig = node->genRTLIL();
arg.sig = node->genWidthRTLIL(-1, false, &subst_rvalue_map.stdmap());
arg.signed_ = is_signed;
}
args.push_back(arg);