Clifford Wolf
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ac2be2d892
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Fixed name resolution of local tasks and functions in generate block
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2013-11-20 11:05:58 +01:00 |
Clifford Wolf
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19dba2561e
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Implemented part/bit select on memory read
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2013-11-20 10:51:32 +01:00 |
Clifford Wolf
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4f2edcf2f9
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Fixed two bugs in mem2reg functionality in AST frontend
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2013-11-18 19:55:12 +01:00 |
Clifford Wolf
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de03184150
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Fixed mem2reg for reg usage outside always block
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2013-11-18 12:35:41 +01:00 |
Clifford Wolf
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9f49d538e1
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Fixed handling of different signedness in power operands
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2013-11-08 11:06:11 +01:00 |
Clifford Wolf
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4abc8e695a
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Implemented const folding of ternary op with undef select
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2013-11-08 04:44:09 +01:00 |
Clifford Wolf
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fc6dc0d7b8
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Fixed handling of power operator
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2013-11-07 22:20:00 +01:00 |
Clifford Wolf
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d7cb62ac96
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Fixed more extend vs. extend_u0 issues
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2013-11-07 19:20:20 +01:00 |
Clifford Wolf
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02f4f89fdb
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Disabled const folding of ternary op when select is undef
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2013-11-07 18:18:16 +01:00 |
Clifford Wolf
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ed4bcd52e5
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Fixed sign handling in constants
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2013-11-07 14:53:10 +01:00 |
Clifford Wolf
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83a8b8b5ca
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Fixed const folding in corner cases with parameters
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2013-11-07 14:08:53 +01:00 |
Clifford Wolf
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536621a98b
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Fixed at_zero evaluation of dynamic ranges
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2013-11-07 11:25:19 +01:00 |
Clifford Wolf
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f050c40519
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Various fixes for correct parameter support
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2013-11-07 10:02:11 +01:00 |
Clifford Wolf
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f2786df146
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Another fix for early width and sign detection in ast simplifier
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2013-11-04 21:29:36 +01:00 |
Clifford Wolf
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d38c67f53d
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Fixed const folding of ternary operator
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2013-11-04 16:46:14 +01:00 |
Clifford Wolf
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8d226da694
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Use proper bit width ans sign extension for const folding
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2013-11-04 15:37:09 +01:00 |
Clifford Wolf
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1325514d33
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Fixes for early width and sign detection in ast simplifier
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2013-11-04 08:28:13 +01:00 |
Clifford Wolf
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472117d532
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further improved early width and sign detection in ast simplifier
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2013-11-04 06:04:42 +01:00 |
Clifford Wolf
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ada80545fa
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Behavior should be identical now to rev. 0b4a64ac6a (next: testing before constfold fixes)
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2013-11-02 21:13:01 +01:00 |
Clifford Wolf
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943329c1dc
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Various ast changes for early expression width detection (prep for constfold fixes)
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2013-11-02 13:00:17 +01:00 |
Clifford Wolf
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23cf23418c
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Fixed handling of boolean attributes (frontends)
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2013-10-24 11:20:13 +02:00 |
Johann Glaser
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6c4cbc03c2
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Added support for notif0/notif1 primitives
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2013-08-20 11:23:59 +02:00 |
Clifford Wolf
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8656b1c08f
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Added support for bufif0/bufif1 primitives
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2013-08-19 19:50:04 +02:00 |
Clifford Wolf
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4214561890
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Improved ast dumping (ast/verilog frontend)
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2013-08-19 19:49:14 +02:00 |
Clifford Wolf
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56432a920f
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Added defparam support to Verilog/AST frontend
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2013-07-04 14:12:33 +02:00 |
Clifford Wolf
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59dd02baa2
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Fixes and improvements in AST const folding
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2013-06-10 13:56:03 +02:00 |
Clifford Wolf
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db98a18edb
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Enabled AST/Verilog front-end optimizations per default
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2013-06-10 13:19:04 +02:00 |
Clifford Wolf
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c5ee2b306a
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Merge branch 'bugfix'
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2013-05-16 16:44:45 +02:00 |
Clifford Wolf
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6cc8e848b6
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Fixed synthesis of functions in latched blocks
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2013-05-16 16:44:06 +02:00 |
Clifford Wolf
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161565be10
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Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
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2013-03-31 11:19:11 +02:00 |
Clifford Wolf
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7a99349de4
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Improvements and bugfixes for generate blocks with local signals
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2013-03-26 11:31:34 +01:00 |
Clifford Wolf
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6a382f2aba
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Fixed handling of unconditional generate blocks
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2013-03-26 09:44:54 +01:00 |
Clifford Wolf
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227520f94d
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Added nosync attribute and some async reset related fixes
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2013-03-25 17:13:14 +01:00 |
Clifford Wolf
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df9753d398
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Added mem2reg option to verilog frontend
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2013-03-24 11:13:32 +01:00 |
Clifford Wolf
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3a5244e913
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Another fix in mem2reg ast simplify logic
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2013-03-24 10:42:08 +01:00 |
Clifford Wolf
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bb3357c027
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Improved mem2reg handling in ast simplifier
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2013-03-24 09:27:01 +01:00 |
Clifford Wolf
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e45d1c8865
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Tiny fixes to verilog parser
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2013-03-23 18:54:31 +01:00 |
Clifford Wolf
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a321a5c412
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Moved stand-alone libs to libs/ directory and added libs/subcircuit
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2013-02-27 09:32:19 +01:00 |
Clifford Wolf
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4f0c2862a0
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Added support for verilog genblock[index].member syntax
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2013-02-26 13:18:22 +01:00 |
Clifford Wolf
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7764d0ba1d
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initial import
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2013-01-05 11:13:26 +01:00 |