Eddie Hung
|
c40b1aae42
|
Restore abc9 -keepff
|
2020-01-01 08:34:43 -08:00 |
Eddie Hung
|
ac808c5e2a
|
attributes.count() -> get_bool_attribute()
|
2020-01-01 08:33:32 -08:00 |
Eddie Hung
|
44d9fb0e7c
|
Re-arrange FD order
|
2019-12-31 18:47:38 -08:00 |
Eddie Hung
|
f7793a2956
|
Missing character
|
2019-12-31 18:42:11 -08:00 |
Eddie Hung
|
35c659be74
|
Cleanup xilinx boxes
|
2019-12-31 18:29:44 -08:00 |
Eddie Hung
|
2358320f51
|
Cleanup ice40 boxes
|
2019-12-31 18:29:37 -08:00 |
Eddie Hung
|
b2046a2114
|
Cleanup ecp5 boxes
|
2019-12-31 18:29:29 -08:00 |
Eddie Hung
|
96db05aaef
|
parse_xaiger to not take box_lookup
|
2019-12-31 17:06:03 -08:00 |
Eddie Hung
|
e5ed8e8e21
|
parse_xaiger to reorder ports too
|
2019-12-31 16:50:22 -08:00 |
Eddie Hung
|
ccc0a740d2
|
Add some abc9 dff tests
|
2019-12-31 16:16:05 -08:00 |
Eddie Hung
|
cac7f5d82e
|
Do not re-order carry chain ports, just precompute iteration order
|
2019-12-31 16:12:40 -08:00 |
Eddie Hung
|
6b825c719b
|
Update abc9_xc7.box comments
|
2019-12-31 15:25:46 -08:00 |
Eddie Hung
|
4cdba00e25
|
FDCE ports to be alphabetical
|
2019-12-31 15:24:02 -08:00 |
Eddie Hung
|
b4663a987b
|
Fix attributes on $__ABC9_ASYNC[01] whitebox
|
2019-12-31 11:14:11 -08:00 |
Eddie Hung
|
789211d9b3
|
Fix incorrect $__ABC9_ASYNC[01] box
|
2019-12-31 11:13:50 -08:00 |
Eddie Hung
|
134e70e8e7
|
write_xaiger: be more precise with ff_bits, remove ff_aig_map
|
2019-12-31 10:21:11 -08:00 |
Eddie Hung
|
3798fa3bea
|
Retry getting rid of write_xaiger's holes_mode
|
2019-12-31 09:59:17 -08:00 |
Eddie Hung
|
436c96e2fb
|
Revert "Get rid of holes_mode"
This reverts commit 7997e2a90f .
|
2019-12-30 23:29:14 -08:00 |
Eddie Hung
|
7997e2a90f
|
Get rid of holes_mode
|
2019-12-30 20:15:09 -08:00 |
Eddie Hung
|
0c4be94a02
|
Add -D DFF_MODE to abc9_map test
|
2019-12-30 20:13:25 -08:00 |
Eddie Hung
|
4c3f517425
|
Remove delay targets doc
|
2019-12-30 16:11:42 -08:00 |
Eddie Hung
|
0735572934
|
write_xaiger to use scratchpad for stats; cleanup abc9
|
2019-12-30 15:35:33 -08:00 |
Eddie Hung
|
fc4b8b8991
|
Remove submod changes
|
2019-12-30 14:56:14 -08:00 |
Eddie Hung
|
d1fccd5a2d
|
Remove unused
|
2019-12-30 14:35:52 -08:00 |
Eddie Hung
|
eb4e767053
|
Do not offset FD* box timings due to -46ps Tsu
|
2019-12-30 14:35:10 -08:00 |
Eddie Hung
|
3cbbae251f
|
Call "proc" if processes inside whiteboxes
|
2019-12-30 14:33:05 -08:00 |
Eddie Hung
|
405e974fe5
|
Merge remote-tracking branch 'origin/master' into xaig_dff
|
2019-12-30 14:31:42 -08:00 |
Eddie Hung
|
ece423415c
|
Add CHANGELOG entry, add abc9_{flop,keep} attr to README.md
|
2019-12-30 14:24:58 -08:00 |
Eddie Hung
|
a038294a87
|
Tidy up abc9_map.v
|
2019-12-30 14:19:29 -08:00 |
Eddie Hung
|
d7ada66497
|
Add "synth_xilinx -dff" option, cleanup abc9
|
2019-12-30 14:13:16 -08:00 |
Eddie Hung
|
52a27700e2
|
Grammar
|
2019-12-30 12:26:39 -08:00 |
Miodrag Milanović
|
c0a17c2457
|
Merge pull request #1589 from YosysHQ/iopad_default
Make iopad option default for all xilinx flows
|
2019-12-30 20:34:31 +01:00 |
Eddie Hung
|
c2c74f9bb0
|
Merge pull request #1599 from YosysHQ/eddie/retry_1588
Retry #1588 -- "write_xaiger: only instantiate each whitebox cell type once"
|
2019-12-30 10:01:02 -08:00 |
Eddie Hung
|
ce6e4f6341
|
Merge pull request #1600 from YosysHQ/eddie/cleanup_ecp5
Nitpick cleanup for ecp5
|
2019-12-30 10:00:47 -08:00 |
Miodrag Milanovic
|
f9749c202c
|
Fix new tests
|
2019-12-28 16:43:19 +01:00 |
Miodrag Milanovic
|
8c3de1d4bd
|
Merge remote-tracking branch 'origin/master' into iopad_default
|
2019-12-28 16:23:31 +01:00 |
Miodrag Milanovic
|
a82c701668
|
Make test without iopads
|
2019-12-28 16:22:24 +01:00 |
Miodrag Milanovic
|
509da7ed1a
|
Revert "Fix xilinx tests, when iopads are default"
This reverts commit 477e43d921 .
|
2019-12-28 16:12:45 +01:00 |
Eddie Hung
|
011f749ecf
|
Update resource count
|
2019-12-28 02:15:11 -08:00 |
Eddie Hung
|
71906fab51
|
Nitpick cleanup for ecp5
|
2019-12-27 16:57:08 -08:00 |
Eddie Hung
|
d45869855c
|
Add #1598 testcase
|
2019-12-27 16:44:57 -08:00 |
Eddie Hung
|
237415e78c
|
write_xaiger: inherit port ordering from original module
|
2019-12-27 16:44:18 -08:00 |
Eddie Hung
|
a56d6970f2
|
Revert "Merge pull request #1598 from YosysHQ/revert-1588-eddie/xaiger_cleanup"
This reverts commit 92654f73ea , reversing
changes made to 3e14ff1667 .
|
2019-12-27 16:05:58 -08:00 |
Eddie Hung
|
9e6632c40a
|
Merge branch 'master' of github.com:YosysHQ/yosys
|
2019-12-27 15:37:26 -08:00 |
Eddie Hung
|
3d4644804e
|
write_xaiger: simplify c{i,o}_bits
|
2019-12-27 15:37:17 -08:00 |
David Shah
|
92654f73ea
|
Merge pull request #1598 from YosysHQ/revert-1588-eddie/xaiger_cleanup
Revert "write_xaiger: only instantiate each whitebox cell type once"
|
2019-12-27 23:31:51 +00:00 |
David Shah
|
df31ade3b3
|
Revert "write_xaiger: only instantiate each whitebox cell type once"
|
2019-12-27 23:25:20 +00:00 |
Eddie Hung
|
dd503a5f3f
|
Really fix it!
|
2019-12-27 15:18:55 -08:00 |
Eddie Hung
|
49881b4468
|
write_xaiger: fix arrival times for non boxes
|
2019-12-27 11:30:18 -08:00 |
Miodrag Milanovic
|
3e14ff1667
|
fixed invalid char
|
2019-12-25 20:38:48 +01:00 |