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2030 Commits

Author SHA1 Message Date
whitequark 749ff864aa
Merge pull request #1309 from whitequark/proc_clean-fix-1268 
proc_clean: fix order of switch insertion
 2019-08-20 00:45:41 +00:00
Eddie Hung 7e010834eb Fix typo 2019-08-19 10:41:18 -07:00
Eddie Hung f42ba811b6 ID({A,B,Y}) -> ID::{A,B,Y} for opt_share.cc 2019-08-19 10:11:47 -07:00
whitequark 4a942ba7b9 proc_clean: fix order of switch insertion. 
Fixes #1268.
 2019-08-19 16:44:23 +00:00
Miodrag Milanovic dbe3cb9708 Ignore all generated headers for pmgen pass 2019-08-18 10:49:17 +02:00
whitequark 101235400c
Merge branch 'master' into eddie/pr1266_again 2019-08-18 08:04:10 +00:00
Clifford Wolf 2a78a1fd00
Merge pull request #1283 from YosysHQ/clifford/fix1255 
Fix various NDEBUG compiler warnings
 2019-08-17 15:07:16 +02:00
Clifford Wolf ae5d8dc939
Merge pull request #1303 from YosysHQ/bogdanvuk/opt_share 
Implement opt_share from @bogdanvuk
 2019-08-17 15:03:46 +02:00
Clifford Wolf 8915f496d9
Merge pull request #1300 from YosysHQ/eddie/cleanup2 
Use ID::{A,B,Y,keep,blackbox,whitebox} instead of ID()
 2019-08-17 15:01:31 +02:00
Eddie Hung 3d3779b037 Use ID() macro 2019-08-16 14:01:55 -07:00
Eddie Hung fab067cece Add 'opt_share' to 'opt -full' 2019-08-16 13:47:37 -07:00
Eddie Hung 51d28645da Merge https://github.com/bogdanvuk/yosys into bogdanvuk/opt_share 2019-08-16 13:40:29 -07:00
Eddie Hung 29e14e674e Remove `using namespace RTLIL;` 2019-08-16 19:36:45 +00:00
Clifford Wolf 958be89c47
Merge pull request #1302 from mmicko/dfflibmap_regression 
DFFLIBMAP pass regression fix
 2019-08-16 14:26:58 +02:00
Miodrag Milanovic 72eacdb9f8 Regression in abc9 2019-08-16 13:21:11 +02:00
Miodrag Milanovic bb79e050a5 Just needed IDs to be IdString 2019-08-16 11:50:34 +02:00
Clifford Wolf bb37a20e8d Add missing NMUX to "abc -g" handling 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-16 10:36:11 +02:00
Eddie Hung eae5a6b12c Use ID::keep more liberally too 2019-08-15 14:51:12 -07:00
Eddie Hung 52355f5185 Use more ID::{A,B,Y,blackbox,whitebox} 2019-08-15 14:50:10 -07:00
Clifford Wolf 49301b733e
Merge branch 'master' into clifford/fix1255 2019-08-15 22:44:38 +02:00
Eddie Hung 6cd8cace0c Fix 2019-08-15 11:25:42 -07:00
Eddie Hung 02dead2e60 ID(\\.*) -> ID(.*) 2019-08-15 10:25:54 -07:00
Eddie Hung 467c34eff0 Convert a few more to ID 2019-08-15 10:24:35 -07:00
Eddie Hung 78ba8b8574 Transform all "\\*" identifiers into ID() 2019-08-15 10:19:29 -07:00
Eddie Hung 9f98241010 Transform "$.*" to ID("$.*") in passes/techmap 2019-08-15 10:05:08 -07:00
Eddie Hung 4cfefae21e More use of IdString::in() 2019-08-15 09:23:57 -07:00
Eddie Hung 91f6cdfef6 Merge remote-tracking branch 'origin/master' into eddie/fix_1284_again 2019-08-15 06:48:40 -07:00
Clifford Wolf 85b0b2c589
Merge branch 'master' into clifford/ids 2019-08-15 10:22:59 +02:00
Eddie Hung 1551e14d2d AND with an inverted input, causes X{,N}OR output to be inverted too 2019-08-14 16:26:24 -07:00
Eddie Hung 1e47e81869 Revert "Only sort leaves on non-ANDNOT/ORNOT cells" 
This reverts commit 5ec5f6dec7.
 2019-08-14 15:23:25 -07:00
Eddie Hung 5ec5f6dec7 Only sort leaves on non-ANDNOT/ORNOT cells 2019-08-14 11:25:56 -07:00
Eddie Hung 0e128510c0
Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves" 2019-08-14 10:40:53 -07:00
Clifford Wolf 0c5db07cd6 Fix various NDEBUG compiler warnings, closes #1255 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-13 13:29:03 +02:00
Eddie Hung 12c692f6ed Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder" 
This reverts commit c851dc1310, reversing
changes made to f54bf1631f.
 2019-08-12 12:06:45 -07:00
Eddie Hung e4a0971581 Since $_ANDNOT_ is not symmetric, do not sort leaves 2019-08-12 11:17:15 -07:00
Eddie Hung 88d5185596 Merge remote-tracking branch 'origin/master' into eddie/fix_1262 2019-08-11 21:13:40 -07:00
Clifford Wolf 6995914f3f Use ID() macro in all of passes/opt/ 
This was obtained by running the following SED command in passes/opt/
and then using "meld foo.cc foo.cc.orig" to manually fix all resulting
compiler errors.

sed -i.orig -r 's/"\\\\([a-zA-Z0-9_]+)"/ID(\1)/g; s/"(\$[a-zA-Z0-9_]+)"/ID(\1)/g;' *.cc

Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-11 11:39:46 +02:00
Eddie Hung 282cc77604 Wrong way around 2019-08-10 11:55:00 -07:00
David Shah f9020ce2b3
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER" 2019-08-10 17:14:48 +01:00
Eddie Hung 02b0d328ad cover_list -> cover as per @cliffordwolf 2019-08-10 08:26:41 -07:00
Clifford Wolf f54bf1631f
Merge pull request #1258 from YosysHQ/eddie/cleanup 
Cleanup a few barnacles across codebase
 2019-08-10 09:52:14 +02:00
Clifford Wolf dad9514d86
Merge pull request #1276 from YosysHQ/clifford/fix1273 
Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib
 2019-08-10 09:38:22 +02:00
Eddie Hung 849e0eeab4 Grammar 2019-08-09 12:43:21 -07:00
Eddie Hung 31f6d74552 Separate $alu handling 2019-08-09 12:13:32 -07:00
Eddie Hung 9f1b82f594 opt_expr -fine to trim LSBs of $alu too 2019-08-09 10:32:12 -07:00
Clifford Wolf 6d0be8d206 Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib, add "abc -g all", fixes #1273 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-09 19:17:59 +02:00
whitequark 39f4c1096a
Merge pull request #1267 from whitequark/proc_prune-fix-1243 
proc_prune: fix handling of exactly identical assigns
 2019-08-09 17:10:46 +00:00
Eddie Hung ac2fc3a144
Merge pull request #1264 from YosysHQ/eddie/fix_1254 
opt_lut to ignore LUT cells, or those that drive bits, with (* keep *)
 2019-08-08 07:58:33 -07:00
whitequark 0b09a347dc proc_prune: fix handling of exactly identical assigns. 
Before this commit, in a process like:
   process $proc$bug.v:8$3
     assign $foo \bar
     switch \sel
       case 1'1
         assign $foo 1'1
         assign $foo 1'1
       case
         assign $foo 1'0
     end
   end
both of the "assign $foo 1'1" would incorrectly be removed.

Fixes #1243.
 2019-08-08 05:32:35 +00:00
Eddie Hung 675c1d4218 Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER 2019-08-07 16:29:38 -07:00