12 Commits

Author	SHA1	Message	Date
Eddie Hung	a73f96594f	Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram ... xilinx: add LUTRAM rules for RAM32M, RAM64M	2019-12-16 21:48:21 -08:00
Eddie Hung	e990c013c5	Merge blockram tests	2019-12-16 13:01:51 -08:00
Diego H	87e21b0122	Fixing compiler warning/issues. Moving test script to the correct place	2019-12-16 10:23:45 -06:00
Diego H	f3f59910eb	Removing fixed attribute value to !ramstyle rules	2019-12-15 23:51:58 -06:00
Diego H	b35559fc33	Merging attribute rules into a single match block; Adding tests	2019-12-15 23:33:09 -06:00
Diego H	1c96345587	Renaming BRAM memory tests for the sake of uniformity	2019-12-13 09:33:18 -06:00
Eddie Hung	caab66111e	Rename memory tests to lutram, add more xilinx tests	2019-12-12 17:44:37 -08:00
Diego H	937ec1ee78	Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1	2019-12-12 13:50:36 -06:00
Miodrag Milanovic	190b40341a	fixed error	2019-10-18 13:15:36 +02:00
Miodrag Milanovic	9bd9db56c8	Unify verilog style	2019-10-18 12:50:24 +02:00
Miodrag Milanovic	12383f37b2	Common memory test now shared	2019-10-18 12:33:35 +02:00
Miodrag Milanovic	5603595e5c	Share common tests	2019-10-18 12:19:59 +02:00