Eddie Hung
12c692f6ed
Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"
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This reverts commit c851dc1310
, reversing
changes made to f54bf1631f
.
2019-08-12 12:06:45 -07:00
David Shah
f9020ce2b3
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
2019-08-10 17:14:48 +01:00
Clifford Wolf
f54bf1631f
Merge pull request #1258 from YosysHQ/eddie/cleanup
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Cleanup a few barnacles across codebase
2019-08-10 09:52:14 +02:00
Eddie Hung
675c1d4218
Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER
2019-08-07 16:29:38 -07:00
Eddie Hung
6b314c8371
Wrap SB_CARRY+SB_LUT into $__ICE40_FULL_ADDER
2019-08-07 16:29:38 -07:00
Eddie Hung
48d0f99406
stoi -> atoi
2019-08-07 11:09:17 -07:00
Clifford Wolf
e66e8fb59d
Merge pull request #1184 from whitequark/synth-better-labels
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synth_{ice40,ecp5}: more sensible pass label naming
2019-07-18 15:34:28 +02:00
Sylvain Munaut
f28e38de99
ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
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The new mapping introduced in 437fec0d88
needed matching adaptation when converting and optimizing LUTs during
the relut process
Fixes #1187
(Diagnosis of the issue by @daveshah1 on IRC)
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-07-16 23:57:15 +02:00
whitequark
ba099bfe9b
synth_{ice40,ecp5}: more sensible pass label naming.
2019-07-16 20:41:51 +00:00
Eddie Hung
ba8ccbdea8
Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix
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abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
2019-07-16 08:52:14 -07:00
Eddie Hung
62ac5ebd02
Map to and from this box if -abc9
2019-07-12 00:53:01 -07:00
whitequark
b700a4b1c5
synth_ice40: switch -relut to be always on.
2019-07-11 20:18:41 +00:00
whitequark
a8c5f7f41e
synth_ice40: fix help text typo. NFC.
2019-07-11 20:18:41 +00:00
Eddie Hung
6bbd286e03
Error out if -abc9 and -retime specified
2019-07-10 12:47:48 -07:00
Eddie Hung
03705f69f4
Update synth_ice40 -device doc to be relevant for -abc9 only
2019-06-28 09:49:01 -07:00
Eddie Hung
af8a5ae5fe
Extraneous newline
2019-06-27 16:12:20 -07:00
David Shah
0dd850e655
abc9: Add wire delays to synth_ice40
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Signed-off-by: David Shah <dave@ds0.me>
2019-06-26 11:39:44 +01:00
Eddie Hung
97d2656375
Resolve comments from @daveshah1
2019-06-14 12:00:02 -07:00
Eddie Hung
627a62a797
Make doc consistent
2019-06-14 10:32:46 -07:00
Eddie Hung
9f44a71715
Consistent with xilinx
2019-06-03 09:23:43 -07:00
Eddie Hung
8829cba901
Merge remote-tracking branch 'origin/clifford/pmgenstuff' into xc7mux
2019-05-02 11:25:34 -07:00
Eddie Hung
5cd19b52da
Merge remote-tracking branch 'origin/master' into xc7mux
2019-05-02 10:44:59 -07:00
Clifford Wolf
d2d402e625
Run "peepopt" in generic "synth" pass and "synth_ice40"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-30 08:10:37 +02:00
Eddie Hung
1ea6d7920f
Cleanup ice40
2019-04-26 14:31:59 -07:00
Eddie Hung
d7f0700bae
Convert to use #945
2019-04-21 15:19:02 -07:00
Eddie Hung
af4652522f
ABC_FLOPS -> ABC_MODEL -- only whitebox if ABC_MODEL set
2019-04-19 21:09:55 -07:00
Eddie Hung
19b660ff6e
Fix SB_DFF comb model
2019-04-18 23:07:16 -07:00
Eddie Hung
4c327cf316
Use new -wb flag for ABC flow
2019-04-18 10:32:41 -07:00
Eddie Hung
c795e14d25
Reduce to three devices: hx, lp, u
2019-04-17 15:19:02 -07:00
Eddie Hung
3105a8a653
Update error message
2019-04-17 15:07:44 -07:00
Eddie Hung
6f3e5297db
Add "-device" argument to synth_ice40
2019-04-17 15:04:46 -07:00
Eddie Hung
4fb9ccfcd8
synth_ice40 to use renamed files
2019-04-17 12:22:03 -07:00
Eddie Hung
c1ebe51a75
Revert "Try using an ICE40_CARRY_LUT primitive to avoid ABC issues"
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This reverts commit a7632ab332
.
2019-04-17 11:10:20 -07:00
Eddie Hung
a7632ab332
Try using an ICE40_CARRY_LUT primitive to avoid ABC issues
2019-04-17 11:10:04 -07:00
Eddie Hung
7980118d74
Add ice40 box files
2019-04-16 16:39:30 -07:00
Eddie Hung
bca3cf6843
Merge branch 'master' into xaig
2019-04-08 16:31:59 -07:00
Sylvain Munaut
5b6f591033
ice40: Run ice40_braminit pass by default
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-03-08 00:15:46 +01:00
Eddie Hung
f7c7003a19
Merge remote-tracking branch 'origin/master' into xaig
2019-02-26 13:16:03 -08:00
Clifford Wolf
344afdcd5f
Merge pull request #740 from daveshah1/improve_dress
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Improve ABC netname preservation
2019-02-22 01:16:34 +01:00
Eddie Hung
a8803a1519
Merge remote-tracking branch 'origin/master' into xaig
2019-02-21 11:23:00 -08:00
Clifford Wolf
218e9051bb
Add "synth_ice40 -dsp"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:42:27 +01:00
Eddie Hung
323dd0e608
synth_ice40 to have new -abc9 arg
2019-02-14 13:19:27 -08:00
David Shah
7ef2333497
ice40: Use abc -dress in synth_ice40
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Signed-off-by: David Shah <davey1576@gmail.com>
2019-02-06 22:23:13 +01:00
Clifford Wolf
da1c8d8d3d
Merge pull request #772 from whitequark/synth_lut
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synth: add k-LUT mode
2019-01-02 15:44:57 +01:00
whitequark
efa278e232
Fix typographical and grammatical errors and inconsistencies.
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The initial list of hits was generated with the codespell command
below, and each hit was evaluated and fixed manually while taking
context into consideration.
DIRS="kernel/ frontends/ backends/ passes/ techlibs/"
DIRS="${DIRS} libs/ezsat/ libs/subcircuit"
codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint
More hits were found by looking through comments and strings manually.
2019-01-02 13:12:17 +00:00
whitequark
17b2831356
synth_ice40: use 4-LUT coarse synthesis mode.
2019-01-02 08:25:55 +00:00
Clifford Wolf
5fa5dbbdda
Rename "fine:" label to "map:" in "synth_ice40"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-12-16 16:36:19 +01:00
whitequark
6e559ee3c7
synth_ice40: split `map_gates` off `fine`.
2018-12-06 12:04:39 +00:00
whitequark
d9fa4387c9
synth_ice40: add -noabc option, to use built-in LUT techmapping.
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This should be combined with -relut to get sensible results.
2018-12-05 17:13:46 +00:00
whitequark
45cb6200af
opt_lut: add -dlogic, to avoid disturbing logic such as carry chains.
2018-12-05 16:30:37 +00:00