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2,368 Commits 76 Branches 48 Tags 62 MiB
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81 Commits

Author SHA1 Message Date
Clifford Wolf 1d34fd7608 Added support for "keep" attributes on wires 2013-11-05 15:52:29 +01:00
Clifford Wolf f912e029de Added roadmap to readme file 2013-11-02 13:19:04 +01:00
Clifford Wolf d78a9dfb37 Added paragraph to README file to avoid mycells.lib confusion 2013-10-31 11:15:00 +01:00
Clifford Wolf f024b19ed9 README file typo fix 2013-10-31 01:15:07 +01:00
Clifford Wolf cc7986a3e5 Some additions to the README file 2013-10-31 01:09:24 +01:00
Clifford Wolf 96e7abad48 Added iopadmap pass 2013-10-16 16:16:06 +02:00
Clifford Wolf a12d39bc86 Added recommended apt-get commands to README 2013-10-11 22:25:23 +02:00
Clifford Wolf 8b2f7792ba Updated TODO section in README 2013-08-01 20:02:15 +02:00
Clifford Wolf 3bb1996151 Added web site link to README 2013-07-21 15:04:37 +02:00
Clifford Wolf 3cd97a205f Added ast frontend refactoring to TODO 2013-07-11 19:31:57 +02:00
Clifford Wolf a4fd3cde8c Documentation updates 2013-07-04 14:17:25 +02:00
Clifford Wolf 6c8a424872 Added "make abc" and "make install-abc" 2013-06-08 23:48:19 +02:00
Clifford Wolf 7d0a274f12 Fixed README for new show command behavior (svg vs. ps) 2013-04-27 14:41:46 +02:00
Clifford Wolf 73fba5164f Implemented TCL support (only via -c option at the moment) 2013-03-28 12:26:17 +01:00
Clifford Wolf 7bfc7b61a8 Implemented proper handling of stub placeholder modules 2013-03-28 09:20:10 +01:00
Clifford Wolf 227520f94d Added nosync attribute and some async reset related fixes 2013-03-25 17:13:14 +01:00
Clifford Wolf 8cc1c87ab8 Reorganized TODOs 2013-03-24 11:23:54 +01:00
Clifford Wolf df9753d398 Added mem2reg option to verilog frontend 2013-03-24 11:13:32 +01:00
Johann Glaser 1d30c66a7f added a TODO 2013-03-18 22:06:53 +01:00
Johann Glaser 2192873daa added description of Makefile include files for build configuration 2013-03-18 19:26:35 +01:00
Clifford Wolf 71de666003 More TODOs in README 2013-03-18 15:05:15 +01:00
Johann Glaser bcae4aae6e corrected typos 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2013-03-17 09:05:14 +01:00
Clifford Wolf 8a6b0a3520 Added help messages to ilang and verilog frontends 2013-03-01 08:03:00 +01:00
Clifford Wolf 7fccad92f7 Added more help messages 2013-03-01 00:36:19 +01:00
Clifford Wolf a5c4bf2161 Added help command to README (and some other README changes) 2013-02-28 14:17:57 +01:00
Clifford Wolf 99d73fe028 Added some additional TODO items 2013-02-27 10:36:17 +01:00
Clifford Wolf a77a5136af Fixed typo in README 2013-02-27 09:45:09 +01:00
Clifford Wolf aa7daadc0a Added copyright statement to readme file 2013-02-27 09:41:04 +01:00
Clifford Wolf 6d1502b948 Added support for "always @(*)" 2013-01-16 17:32:11 +01:00
Clifford Wolf a24086d1db Added "getting started" section to README 2013-01-06 14:40:15 +01:00
Clifford Wolf 7764d0ba1d initial import 2013-01-05 11:13:26 +01:00