122 Commits

Author	SHA1	Message	Date
Eddie Hung	6b96df41bc	abc9 to only disconnect output ports of AND and NOT gates	2019-02-21 11:15:47 -08:00
Eddie Hung	7f26043caf	ABC -> ABC9	2019-02-20 17:36:57 -08:00
Eddie Hung	e5b8bb9faa	abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_	2019-02-20 17:33:35 -08:00
Eddie Hung	32853b1f8d	lut/not/and suffix to be ${lut,not,and}	2019-02-20 16:30:30 -08:00
Eddie Hung	2ca83005fb	abc9 to cope with multiple modules	2019-02-20 12:56:15 -08:00
Eddie Hung	d6b317b349	abc9 to use & syntax for -fast, and name fixes	2019-02-20 12:40:17 -08:00
Eddie Hung	62e5ff9ba8	abc9 to cope with indexed wires when creating $lut from $_NOT_	2019-02-19 16:06:03 -08:00
Eddie Hung	8158bc3f99	abc9 to replace $_NOT_ with $lut	2019-02-19 12:30:20 -08:00
Eddie Hung	45d49d5d14	Get rid of debugging stuff in abc9	2019-02-16 22:25:22 -08:00
Eddie Hung	f853b2f3c1	abc9 to write_aiger with -O option, and ignore dummy outputs	2019-02-16 20:09:40 -08:00
Eddie Hung	d8c4d4e6c7	abc9 to handle comb loops, cope with constant outputs, disconnect using new wire	2019-02-16 13:47:38 -08:00
Eddie Hung	d4545d415b	abc9 to cope with non-wideports, count cells properly	2019-02-16 08:53:06 -08:00
Eddie Hung	f8d0134598	Move lookup inside if	2019-02-15 15:23:26 -08:00
Eddie Hung	a786ac4d53	Refactor	2019-02-15 13:00:13 -08:00
Eddie Hung	914546efd9	Cope with width != 1 when re-mapping cells	2019-02-15 12:55:52 -08:00
Eddie Hung	956ee545c5	abc9 to stitch results with CI/CO properly	2019-02-15 11:52:34 -08:00
Eddie Hung	206f11dca3	Fix stitching	2019-02-13 17:04:23 -08:00
Eddie Hung	87f059adf7	Rip out some more stuff	2019-02-13 10:44:52 -08:00
Eddie Hung	045f7763ae	Rip out unused functions in abc9	2019-02-12 16:25:22 -08:00
Eddie Hung	b3341b4abb	WIP for ABC with aiger	2019-02-12 09:31:22 -08:00
Eddie Hung	5a0a5aae4f	Compile abc9	2019-02-08 13:58:47 -08:00
Eddie Hung	e25a22015f	Copy abc.cc to abc9.cc	2019-02-08 13:23:54 -08:00