riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
1,807 Commits 76 Branches 48 Tags 62 MiB
Commit Graph

1807 Commits

Author SHA1 Message Date
Clifford Wolf 59d11978fc Added "write_blif -blackbox" 
based on code by Eddie Hung from
https://github.com/eddiehung/yosys/commit/1e481661cb4a4
 2014-12-14 17:45:03 +01:00
Clifford Wolf 32dce4a870 Added "blif -unbuf" feature 2014-12-14 17:37:46 +01:00
Clifford Wolf f7cf60b45c Removed psmisc from deps list (usually fuser is already installed and the package name for it varies) 2014-12-14 17:24:44 +01:00
Clifford Wolf cf55371a22 Added psmisc to prerequisites 2014-12-12 12:49:46 +01:00
Clifford Wolf 72f500c950 Removed UTF-8 chars from techmap.v 2014-12-12 12:44:16 +01:00
Clifford Wolf 6c768c686f Added missing prerequisites to README 2014-12-12 11:34:25 +01:00
Clifford Wolf 7775d2806f Added IdString::destruct_guard hack 2014-12-11 21:46:36 +01:00
Clifford Wolf df52eedb30 Compile fix for visual studio 2014-12-11 15:27:38 +01:00
Clifford Wolf 1282a113da Fixed supply0/supply1 with many wires 2014-12-11 13:56:20 +01:00
Clifford Wolf 032511fac8 Added functionality to dff2dffe pass 2014-12-08 15:38:58 +01:00
Clifford Wolf 7d6e586df8 Added bool constructors to SigBit and SigSpec 2014-12-08 15:08:02 +01:00
Clifford Wolf bca2442c67 Added module->addDffe() and module->addDffeGate() 2014-12-08 14:59:38 +01:00
Clifford Wolf 97487fee32 Added skeleton dff2dffe pass 2014-12-08 14:10:52 +01:00
Clifford Wolf 7b62bbeee8 Added more documentation fixmes for nontrivial register cells 2014-12-08 10:56:43 +01:00
Clifford Wolf f1764b4fe9 Added $dffe cell type 2014-12-08 10:50:19 +01:00
Clifford Wolf fad9cec47b Added $_DFFE_??_ cell types 2014-12-08 10:43:38 +01:00
Clifford Wolf 2903143ae5 Merge branch 'master' of https://github.com/Martoni/yosys 2014-12-07 23:15:27 +01:00
Fabien Marteau 74d70bf9e9 manual/presentation.tex: bg option is unknown with beamer 3.3 in beamercolorbox 2014-12-07 19:04:06 +01:00
Clifford Wolf 78765e6a1c Merge pull request #43 from Martoni/master 
suppressing semi-colon at the end of dot files
 2014-12-06 12:46:37 +01:00
Fabien Marteau e65033e421 suppressing semi-colon at the end of dot files 2014-12-05 18:17:00 +01:00
Clifford Wolf abf81d7683 Added some missing .gitignore in manual/ 2014-12-04 13:37:58 +01:00
Clifford Wolf 51cfcd8331 Fixed bug in "hierarchy -top" with array of instances 2014-11-27 12:47:33 +01:00
Clifford Wolf 76c83283c4 Fixed minor bug in parsing delays 2014-11-24 14:48:07 +01:00
Clifford Wolf 56c7d1e266 Fixed two minor bugs in constant parsing 2014-11-24 14:39:24 +01:00
Clifford Wolf 751fb33688 Some fixes in stubnets example 2014-11-24 12:55:30 +01:00
Clifford Wolf 263f672a3f Merge pull request #42 from slowriot/master 
SHA1 library: fixing incorrect buffer size allocation, and unsafe integer size type
 2014-11-20 09:26:33 +01:00
SlowRiot 4aae465867 switching from unreliable typedefs to precisely sized uint32_t and uint64_t 2014-11-20 02:03:08 +00:00
SlowRiot 76cc2bf7b4 fixing incorrect buffer size allocation, and unsafe integer size type 2014-11-20 01:58:57 +00:00
Clifford Wolf 87333f3ae2 Added warning for use of 'z' constants in HDL 2014-11-14 19:59:50 +01:00
Clifford Wolf 4e5350b409 Fixed parsing of nested verilog concatenation and replicate 2014-11-12 19:10:35 +01:00
Clifford Wolf c832b188a5 Another 'make vcxsrc' 2014-11-12 01:17:11 +01:00
Clifford Wolf a8cdcb3dd2 Some fixed in "make vcxsrc" srcfiles.txt creation 2014-11-12 00:45:21 +01:00
Clifford Wolf cb1b245a8d Split MXE "make dist" into MXE "make mxebin" and non-MXE "make vcxsrc" 2014-11-12 00:26:47 +01:00
Clifford Wolf 1e0f6b5ddb Added "yosys -qq" to also quiet warning messages 2014-11-09 11:02:20 +01:00
Clifford Wolf a112b10934 Introducing YS_OVERRIDE, YS_FINAL, YS_ATTRIBUTE, YS_NORETURN 2014-11-09 10:55:04 +01:00
Clifford Wolf fe829bdbdc Added log_warning() API 2014-11-09 10:44:23 +01:00
Clifford Wolf cb9e10b462 Added automatic "make clean" to abc "hg pull" make rules 2014-11-08 22:19:22 +01:00
Clifford Wolf 12ffe0c438 Some fixes in presentation 2014-11-08 12:39:01 +01:00
Clifford Wolf d92fb5b35e Added missing fixup_ports() calls to "rename" command 2014-11-08 12:38:48 +01:00
Clifford Wolf 003336c58d Use a cache for log_id() memory management 2014-11-08 12:38:22 +01:00
Clifford Wolf 73f5ffcce8 Now we are in Yoys 0.4+ development 2014-11-08 12:23:54 +01:00
Clifford Wolf d5aa0ee158 Yosys 0.4 2014-11-08 12:15:01 +01:00
Clifford Wolf acf010d30d Added "ENABLE_PLUGINS := 0" to verific amd64 build instructions 2014-11-08 11:38:44 +01:00
Clifford Wolf b9f2127f5d Various documentation updates 2014-11-08 10:59:48 +01:00
Clifford Wolf 420bc05627 Added "Nx" syntax to "show" command for repeating SigChunks 2014-11-08 10:58:57 +01:00
Clifford Wolf 89be7bf527 Added "used" attribute to entries in yosys_cover_list 
http://www.reddit.com/r/yosys/comments/2kw479/fyi_clang_350_build_error/cltgwyc
http://llvm.org/bugs/show_bug.cgi?id=19474
 2014-11-07 20:58:08 +01:00
Clifford Wolf c5dbb1aa28 Minor corrections in CodingReadme 2014-11-07 15:47:18 +01:00
Clifford Wolf 546e8b5fe7 Improved TopoSort determinism 2014-11-07 15:21:03 +01:00
Clifford Wolf 461594bb83 Fixed generation of temp names in verilog backend 2014-11-07 14:40:06 +01:00
Clifford Wolf 4f4d729e02 Updated ABC to 5b5af75f1dda 2014-11-07 14:39:49 +01:00