Eddie Hung
|
572603409c
|
Merge branch 'map_cells_before_map_luts' into xc7srl
|
2019-04-04 07:54:42 -07:00 |
Eddie Hung
|
aa693d5723
|
Remove handling for $pmux, since #895
|
2019-04-03 08:35:32 -07:00 |
Sylvain Munaut
|
39380c45ba
|
proc_mux: Fix crash when trying to optimize non-existant mux to shiftx
last_mux_cell can be NULL ...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
|
2019-04-03 14:50:12 +02:00 |
Eddie Hung
|
d8465590ac
|
Merge remote-tracking branch 'origin/master' into xc7srl
|
2019-04-03 03:36:11 -07:00 |
David Shah
|
6acbc016f4
|
memory_bram: Consider read enable for address expansion register
Signed-off-by: David Shah <dave@ds0.me>
|
2019-04-02 19:47:50 +01:00 |
Eddie Hung
|
aaa2690a56
|
Merge pull request #895 from YosysHQ/pmux2shiftx
RFC: Add a pmux-to-shiftx optimisation to proc_mux
|
2019-04-02 00:16:14 -07:00 |
Clifford Wolf
|
32bd0f22ec
|
Merge pull request #901 from trcwm/libertyfixes
Libertyfixes: accept superfluous ; at end of group.
|
2019-03-28 09:32:05 +01:00 |
Clifford Wolf
|
662429cc49
|
Merge pull request #903 from YosysHQ/bram_reset_transp
memory_bram: Reset make_transp when growing read ports
|
2019-03-28 09:30:48 +01:00 |
David Shah
|
60594ad40c
|
memory_bram: Reset make_transp when growing read ports
Signed-off-by: David Shah <dave@ds0.me>
|
2019-03-27 17:19:14 +00:00 |
Niels Moseley
|
263ab60b43
|
Liberty file parser now accepts superfluous ;
|
2019-03-27 15:17:58 +01:00 |
Niels Moseley
|
487cb45b87
|
Liberty file parser now accepts superfluous ;
|
2019-03-27 15:15:53 +01:00 |
Clifford Wolf
|
2c7fe42ad1
|
Add "rename -output"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-27 13:47:42 +01:00 |
Clifford Wolf
|
d351b7cb99
|
Improve "rename" help message
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-27 13:33:26 +01:00 |
Clifford Wolf
|
38b3fbd3f0
|
Add "cutpoint -undef"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-26 16:01:14 +01:00 |
Clifford Wolf
|
d0b9b1bece
|
Add "hdlname" attribute
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-26 14:52:48 +01:00 |
Eddie Hung
|
6b90d3cf6c
|
Merge remote-tracking branch 'origin/master' into xc7srl
|
2019-03-25 13:17:22 -07:00 |
Clifford Wolf
|
ddc1a4488e
|
Add "cutpoint" pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-25 19:49:00 +01:00 |
Eddie Hung
|
b7a3d35c6b
|
Create one $shiftx per bit in width
|
2019-03-25 11:16:56 -07:00 |
Clifford Wolf
|
9ec50ca7b9
|
Merge pull request #896 from YosysHQ/transp_fixes
memory_bram: Fix multiclock make_transp
|
2019-03-25 14:55:16 +01:00 |
Niels Moseley
|
1f7f54e68e
|
spaces -> tabs
|
2019-03-25 14:12:04 +01:00 |
Niels Moseley
|
9d9cc8a314
|
EOL is now accepted as ';' replacement on lines that look like: feature_xyz(option)
|
2019-03-25 12:15:10 +01:00 |
Niels Moseley
|
3b3b77291a
|
Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'.
|
2019-03-24 22:54:18 +01:00 |
David Shah
|
ac6cc88db3
|
memory_bram: Fix multiclock make_transp
Signed-off-by: David Shah <dave@ds0.me>
|
2019-03-24 16:21:36 +00:00 |
Eddie Hung
|
2507d01b03
|
Add a pmux-to-shiftx optimisation to proc_mux
|
2019-03-23 16:45:36 -07:00 |
Eddie Hung
|
bf83c074c8
|
Cope with SHREG not having E port; Revert $pmux fine tune
|
2019-03-23 16:09:38 -07:00 |
Clifford Wolf
|
ccfa2fe01c
|
Add "mutate -none -mode", "mutate -mode none"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-23 20:20:32 +01:00 |
Clifford Wolf
|
59c44bb61a
|
Add "mutate -s <filename>"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-23 17:53:09 +01:00 |
Eddie Hung
|
098bd5758f
|
Add support for SHREGMAP+$mux, also fine tune $pmux
|
2019-03-22 23:22:19 -07:00 |
Eddie Hung
|
0895093c7c
|
Leftover printf
|
2019-03-22 19:14:04 -07:00 |
Eddie Hung
|
456295eb66
|
Fixes for multibit
|
2019-03-22 18:32:42 -07:00 |
Eddie Hung
|
03d108cd1f
|
Working for 1 bit
|
2019-03-22 17:46:49 -07:00 |
Eddie Hung
|
46753cf89f
|
Merge remote-tracking branch 'origin/master' into xc7srl
|
2019-03-22 13:10:42 -07:00 |
Clifford Wolf
|
7cfd83c341
|
Trim init attributes when resizing FFs in "wreduce", fixes #887
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-22 11:42:19 +01:00 |
Eddie Hung
|
5597270b9e
|
Opt
|
2019-03-21 10:20:27 -07:00 |
Eddie Hung
|
2b911e270b
|
Fix spacing
|
2019-03-20 12:28:39 -07:00 |
Eddie Hung
|
505e4c2d59
|
Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable length
|
2019-03-19 21:58:05 -07:00 |
Eddie Hung
|
5445cd4d00
|
Add support for variable length Xilinx SRL > 128
|
2019-03-19 17:44:33 -07:00 |
Eddie Hung
|
4cd8f02973
|
shregmap -tech xilinx to delete $shiftx for var length SRL
|
2019-03-19 15:05:08 -07:00 |
Eddie Hung
|
24553326dd
|
Merge remote-tracking branch 'origin/master' into xc7srl
|
2019-03-19 13:11:30 -07:00 |
Eddie Hung
|
0ea7eba5f1
|
Make output port a non chain user
|
2019-03-19 13:08:43 -07:00 |
Eddie Hung
|
ed32119d13
|
Fix shregmap to correctly recognise non chain users; cleanup
|
2019-03-18 16:12:19 -07:00 |
Eddie Hung
|
b94db54664
|
shiftx NULL pointer check
|
2019-03-18 13:35:54 -07:00 |
Eddie Hung
|
d6d9ef0fee
|
Cleanup
|
2019-03-16 12:49:46 -07:00 |
Eddie Hung
|
fadeadb8c8
|
Only accept <128 for variable length, only if $shiftx exclusive
|
2019-03-16 08:51:13 -07:00 |
Eddie Hung
|
06f8f2654a
|
Working
|
2019-03-15 19:13:40 -07:00 |
Clifford Wolf
|
aa65d3fe65
|
Improve mix of src/wire/wirebit coverage in "mutate -list"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-16 00:55:46 +01:00 |
Clifford Wolf
|
dacaebae35
|
Add "fmcombine -fwd -bwd -nop"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 21:45:37 +01:00 |
Clifford Wolf
|
370db33a4c
|
Add fmcombine pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 20:46:17 +01:00 |
Clifford Wolf
|
d1985f6a22
|
Improvements in "mutate" list-reduce algorithm
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-15 00:18:31 +01:00 |
Clifford Wolf
|
27a5d9c91e
|
Add "mutate -cfg", improve pick_cover behavior
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2019-03-14 23:20:41 +01:00 |