Commit Graph

137 Commits

Author SHA1 Message Date
Eddie Hung 46a89d7264 ecp5: deprecate abc9_{arrival,required} and *.{lut,box} 2020-02-27 10:17:29 -08:00
Eddie Hung 0b0148399c synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
Marcelina Kościelnicka 34d2fbd2f9
Add opt_lut_ins pass. (#1673) 2020-02-03 14:57:17 +01:00
Eddie Hung ce6a690d27 xilinx/ice40/ecp5: undo permuting LUT masks in lut_map
Now done in read_aiger
2020-01-27 13:30:27 -08:00
Eddie Hung 94ab3791ce Merge remote-tracking branch 'origin/master' into eddie/abc9_mfs 2020-01-07 15:44:18 -08:00
Eddie Hung 53aa51dc92 Re-enable &mfs for synth_{ecp5,xilinx} 2020-01-06 16:21:04 -08:00
Eddie Hung 19541640ee Merge remote-tracking branch 'origin/master' into xaig_dff 2020-01-06 09:31:28 -08:00
whitequark f8d5920a7e
Merge pull request #1604 from whitequark/unify-ram-naming
Harmonize BRAM/LUTRAM descriptions across all of Yosys
2020-01-02 21:06:17 +00:00
Eddie Hung b454735bea Merge remote-tracking branch 'origin/master' into xaig_dff 2020-01-02 12:44:06 -08:00
whitequark 550310e264 Harmonize BRAM/LUTRAM descriptions across all of Yosys.
This commit:
  * renames all remaining instances of "DRAM" (which is ambiguous)
    to "LUTRAM" (which is not), finishing the work started in
    the commit 698ab9be;
  * renames memory rule files to brams.txt/lutrams.txt;
  * adds/renames script labels map_bram/map_lutram;
  * extracts where necessary script labels map_ffram and map_gates;
  * adds where necessary options -nobram/-nolutram.

The end result is that BRAM/LUTRAM/FFRAM aspects of every target
are now consistent with each other.

Per architecture:
  * anlogic: rename drams.txt→lutrams.txt, add -nolutram, add
    :map_lutram, :map_ffram, :map_gates
  * ecp5: rename bram.txt→brams.txt, lutram.txt→lutrams.txt
  * efinix: rename bram.txt→brams.txt, add -nobram, add :map_ffram,
    :map_gates
  * gowin: rename bram.txt→brams.txt, dram.txt→lutrams.txt,
    rename -nodram→-nolutram (-nodram still recognized), rename
    :bram→:map_bram, :dram→:map_lutram, add :map_ffram, :map_gates
2020-01-01 12:30:00 +00:00
Eddie Hung f7793a2956 Missing character 2019-12-31 18:42:11 -08:00
Eddie Hung b2046a2114 Cleanup ecp5 boxes 2019-12-31 18:29:29 -08:00
Eddie Hung 79448f9be0 Update doc that "-retime" calls abc with "-dff -D 1" 2019-12-30 13:28:29 -08:00
Eddie Hung aa6d06c1b5 Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""
This reverts commit 6008bb7002.
2019-12-30 13:28:29 -08:00
Eddie Hung 71906fab51 Nitpick cleanup for ecp5 2019-12-27 16:57:08 -08:00
Eddie Hung 10e82e103f
Revert "Optimise write_xaiger" 2019-12-20 12:05:45 -08:00
Eddie Hung df626ee7ab
Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanup
Optimise write_xaiger
2019-12-19 12:24:03 -05:00
David Shah 520f1646cf
Merge pull request #1563 from YosysHQ/dave/async-prld
ecp5: Add support for mapping PRLD FFs
2019-12-18 19:42:17 +00:00
Eddie Hung f022645cd2 Fix bitwidth mismatch; suppresses iverilog warning 2019-12-11 13:02:07 -08:00
David Shah 184c0e796a ecp5: Add support for mapping PRLD FFs
Signed-off-by: David Shah <dave@ds0.me>
2019-12-07 13:04:36 +00:00
Eddie Hung 98c9ea605b techmap/aigmap of whiteboxes to occur before abc9 instead of in write_xaiger 2019-12-06 17:05:02 -08:00
David Shah 51e4e29bb1 ecp5: Use new autoname pass for better cell/net names
Signed-off-by: David Shah <dave@ds0.me>
2019-11-15 21:03:11 +00:00
David Shah fa989e59e5 ecp5: Pass -nomfs to abc9
Fixes #1459

Signed-off-by: David Shah <dave@ds0.me>
2019-10-20 10:30:41 +01:00
Sean Cross 82f60ba938 Makefile: don't assume python is called `python3`
On some architectures, notably on Windows, the official name for the
Python binary from python.org is `python`.  The build system assumes
that python is called `python3`, which breaks under this architecture.

There is already infrastructure in place to determine the name of the
Python binary when building PYOSYS.  Since Python is now always required
to build Yosys, enable this check universally which sets the
`PYTHON_EXECUTABLE` variable.

Then, reuse this variable in other Makefiles as necessary, rather than
hardcoding `python3` everywhere.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-10-19 14:04:52 +08:00
David Shah e1d4e683b4 ecp5: Add ECLKBRIDGECS blackbox
Signed-off-by: David Shah <dave@ds0.me>
2019-10-11 14:50:33 +01:00
David Shah 7b1a6706d8 ecp5: Add attrmvcp to copy syn_useioff to driving FF
Signed-off-by: David Shah <dave@ds0.me>
2019-10-10 15:58:31 +01:00
David Shah 3b44e80d4b ecp5: Set syn_useioff on IO FFs to enable packing
Signed-off-by: David Shah <dave@ds0.me>
2019-10-10 15:55:16 +01:00
Eddie Hung aae2b9fd9c Rename abc_* names/attributes to more precisely be abc9_* 2019-10-04 11:04:10 -07:00
Eddie Hung 9fef1df3c1 Panic over. Model was elsewhere. Re-arrange for consistency 2019-10-04 10:48:44 -07:00
David Shah b424d374db ecp5: Fix shuffle_enable port
Signed-off-by: David Shah <dave@ds0.me>
2019-10-01 14:14:46 +01:00
David Shah 7a1538cd36 ecp5: Add support for mapping 36-bit wide PDP BRAMs
Signed-off-by: David Shah <dave@ds0.me>
2019-10-01 13:46:36 +01:00
Eddie Hung 84825f9378 Combine 'flatten' & 'coarse' labels in synth_ecp5 so proc run once 2019-09-26 10:45:14 -07:00
Eddie Hung e742478e1d Merge remote-tracking branch 'origin/master' into xc7dsp 2019-09-05 13:01:27 -07:00
Eddie Hung 3732d421c5 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-09-04 12:37:42 -07:00
Eddie Hung 696f854801 Rename box 2019-09-02 12:15:11 -07:00
Eddie Hung 2fa3857963 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-09-02 12:13:44 -07:00
Miodrag Milanovic a3c16a0565 Fix TRELLIS_FF simulation model 2019-08-31 11:12:06 +02:00
David Shah 90b44113d8 ecp5_gsr: Fix typo
Signed-off-by: David Shah <dave@ds0.me>
2019-08-31 09:58:46 +01:00
Eddie Hung 723815b384 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-08-30 13:26:19 -07:00
Eddie Hung f0fef90e9d Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-30 10:30:46 -07:00
David Shah 6919c0f9b0 Merge branch 'master' into xc7dsp 2019-08-30 13:57:15 +01:00
David Shah 91b46ed816 ecp5: Add simulation equivalence check for Diamond FF implementations
Signed-off-by: David Shah <dave@ds0.me>
2019-08-30 13:27:36 +01:00
whitequark d9c621f9d1 ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives. 2019-08-30 10:05:09 +00:00
whitequark 1e6b60d563 ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives. 2019-08-30 09:56:19 +00:00
whitequark 6fa8ce93e6 ecp5: add missing FD primitives. 2019-08-30 09:54:48 +00:00
whitequark 7e2825a2a4 ecp5: fix CEMUX on IFS/OFS primitives. 2019-08-30 09:42:33 +00:00
Eddie Hung 8d820a9884 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-28 15:19:10 -07:00
David Shah fc001b4731 ecp5: Add GSR support
Signed-off-by: David Shah <dave@ds0.me>
2019-08-27 13:07:06 +01:00
Eddie Hung 455da57272 Fix spacing 2019-08-23 13:21:21 -07:00
Eddie Hung 85d39653ac Remove unused model 2019-08-23 13:20:29 -07:00