mirror of https://github.com/YosysHQ/yosys.git
xilinx/ice40/ecp5: undo permuting LUT masks in lut_map
Now done in read_aiger
This commit is contained in:
Eddie Hung
parent
48f3f5213e
commit
ce6a690d27
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@ -410,7 +410,7 @@ void AigerReader::parse_xaiger()
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RTLIL::Wire *output_sig = module->wire(stringf("$aiger%d$%d", aiger_autoidx, rootNodeID));
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log_assert(output_sig);
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uint32_t nodeID;
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RTLIL::SigSpec input_sig;
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std::vector<SigBit> input_bits;
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for (unsigned j = 0; j < cutLeavesM; ++j) {
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nodeID = parse_xaiger_literal(f);
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log_debug2("\t%u\n", nodeID);
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@ -420,8 +420,10 @@ void AigerReader::parse_xaiger()
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}
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RTLIL::Wire *wire = module->wire(stringf("$aiger%d$%d", aiger_autoidx, nodeID));
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log_assert(wire);
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input_sig.append(wire);
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input_bits.push_back(wire);
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}
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// Reverse input order as fastest input is returned first
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RTLIL::SigSpec input_sig(std::vector<SigBit>(input_bits.rbegin(), input_bits.rend()));
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// TODO: Compute LUT mask from AIG in less than O(2 ** input_sig.size())
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ce.clear();
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ce.compute_deps(output_sig, input_sig.to_sigbit_pool());
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@ -73,102 +73,80 @@ module \$lut (A, Y);
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input [WIDTH-1:0] A;
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output Y;
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// Need to swap input ordering, and fix init accordingly,
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// to match ABC's expectation of LUT inputs in non-decreasing
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// delay order
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localparam P_WIDTH = WIDTH < 4 ? 4 : WIDTH;
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function [P_WIDTH-1:0] permute_index;
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input [P_WIDTH-1:0] i;
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integer j;
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begin
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permute_index = 0;
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for (j = 0; j < P_WIDTH; j = j + 1)
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permute_index[P_WIDTH-1 - j] = i[j];
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end
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endfunction
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function [2**P_WIDTH-1:0] permute_init;
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integer i;
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begin
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permute_init = 0;
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for (i = 0; i < 2**P_WIDTH; i = i + 1)
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permute_init[i] = LUT[permute_index(i)];
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end
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endfunction
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parameter [2**P_WIDTH-1:0] P_LUT = permute_init();
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generate
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if (WIDTH == 1) begin
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LUT4 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.Z(Y),
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localparam [15:0] INIT = {{8{LUT[1]}}, {8{LUT[0]}}};
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LUT4 #(.INIT(INIT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(1'b0), .B(1'b0), .C(1'b0), .D(A[0]));
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end else
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if (WIDTH == 2) begin
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LUT4 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(1'b0), .B(1'b0), .C(A[1]), .D(A[0]));
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localparam [15:0] INIT = {{4{LUT[3]}}, {4{LUT[2]}}, {4{LUT[1]}}, {4{LUT[0]}}};
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LUT4 #(.INIT(INIT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(1'b0), .B(1'b0), .C(A[0]), .D(A[1]));
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end else
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if (WIDTH == 3) begin
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LUT4 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(1'b0), .B(A[2]), .C(A[1]), .D(A[0]));
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localparam [15:0] INIT = {{2{LUT[7]}}, {2{LUT[6]}}, {2{LUT[5]}}, {2{LUT[4]}}, {2{LUT[3]}}, {2{LUT[2]}}, {2{LUT[1]}}, {2{LUT[0]}}};
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LUT4 #(.INIT(INIT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(1'b0), .B(A[0]), .C(A[1]), .D(A[2]));
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end else
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if (WIDTH == 4) begin
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LUT4 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(A[3]), .B(A[2]), .C(A[1]), .D(A[0]));
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LUT4 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.Z(Y),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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`ifndef NO_PFUMUX
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end else
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if (WIDTH == 5) begin
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wire f0, f1;
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LUT4 #(.INIT(P_LUT[15: 0])) lut0 (.Z(f0),
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.A(A[4]), .B(A[3]), .C(A[2]), .D(A[1]));
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LUT4 #(.INIT(P_LUT[31:16])) lut1 (.Z(f1),
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.A(A[4]), .B(A[3]), .C(A[2]), .D(A[1]));
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PFUMX mux5(.ALUT(f1), .BLUT(f0), .C0(A[0]), .Z(Y));
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LUT4 #(.INIT(LUT[15: 0])) lut0 (.Z(f0),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[31:16])) lut1 (.Z(f1),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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PFUMX mux5(.ALUT(f1), .BLUT(f0), .C0(A[4]), .Z(Y));
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end else
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if (WIDTH == 6) begin
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wire f0, f1, f2, f3, g0, g1;
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LUT4 #(.INIT(P_LUT[15: 0])) lut0 (.Z(f0),
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.A(A[5]), .B(A[4]), .C(A[3]), .D(A[2]));
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LUT4 #(.INIT(P_LUT[31:16])) lut1 (.Z(f1),
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.A(A[5]), .B(A[4]), .C(A[3]), .D(A[2]));
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LUT4 #(.INIT(LUT[15: 0])) lut0 (.Z(f0),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[31:16])) lut1 (.Z(f1),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[47:32])) lut2 (.Z(f2),
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.A(A[5]), .B(A[4]), .C(A[3]), .D(A[2]));
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LUT4 #(.INIT(P_LUT[63:48])) lut3 (.Z(f3),
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.A(A[5]), .B(A[4]), .C(A[3]), .D(A[2]));
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LUT4 #(.INIT(LUT[47:32])) lut2 (.Z(f2),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[63:48])) lut3 (.Z(f3),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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PFUMX mux50(.ALUT(f1), .BLUT(f0), .C0(A[1]), .Z(g0));
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PFUMX mux51(.ALUT(f3), .BLUT(f2), .C0(A[1]), .Z(g1));
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L6MUX21 mux6 (.D0(g0), .D1(g1), .SD(A[0]), .Z(Y));
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PFUMX mux50(.ALUT(f1), .BLUT(f0), .C0(A[4]), .Z(g0));
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PFUMX mux51(.ALUT(f3), .BLUT(f2), .C0(A[4]), .Z(g1));
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L6MUX21 mux6 (.D0(g0), .D1(g1), .SD(A[5]), .Z(Y));
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end else
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if (WIDTH == 7) begin
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wire f0, f1, f2, f3, f4, f5, f6, f7, g0, g1, g2, g3, h0, h1;
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LUT4 #(.INIT(P_LUT[15: 0])) lut0 (.Z(f0),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[31:16])) lut1 (.Z(f1),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(LUT[15: 0])) lut0 (.Z(f0),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[31:16])) lut1 (.Z(f1),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[47:32])) lut2 (.Z(f2),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[63:48])) lut3 (.Z(f3),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(LUT[47:32])) lut2 (.Z(f2),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[63:48])) lut3 (.Z(f3),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[79:64])) lut4 (.Z(f4),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[95:80])) lut5 (.Z(f5),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(LUT[79:64])) lut4 (.Z(f4),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[95:80])) lut5 (.Z(f5),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[111: 96])) lut6 (.Z(f6),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(P_LUT[127:112])) lut7 (.Z(f7),
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.A(A[6]), .B(A[5]), .C(A[4]), .D(A[3]));
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LUT4 #(.INIT(LUT[111: 96])) lut6 (.Z(f6),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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LUT4 #(.INIT(LUT[127:112])) lut7 (.Z(f7),
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.A(A[0]), .B(A[1]), .C(A[2]), .D(A[3]));
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PFUMX mux50(.ALUT(f1), .BLUT(f0), .C0(A[2]), .Z(g0));
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PFUMX mux51(.ALUT(f3), .BLUT(f2), .C0(A[2]), .Z(g1));
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PFUMX mux52(.ALUT(f5), .BLUT(f4), .C0(A[2]), .Z(g2));
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PFUMX mux53(.ALUT(f7), .BLUT(f6), .C0(A[2]), .Z(g3));
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L6MUX21 mux60 (.D0(g0), .D1(g1), .SD(A[1]), .Z(h0));
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L6MUX21 mux61 (.D0(g2), .D1(g3), .SD(A[1]), .Z(h1));
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L6MUX21 mux7 (.D0(h0), .D1(h1), .SD(A[0]), .Z(Y));
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PFUMX mux50(.ALUT(f1), .BLUT(f0), .C0(A[4]), .Z(g0));
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PFUMX mux51(.ALUT(f3), .BLUT(f2), .C0(A[4]), .Z(g1));
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PFUMX mux52(.ALUT(f5), .BLUT(f4), .C0(A[4]), .Z(g2));
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PFUMX mux53(.ALUT(f7), .BLUT(f6), .C0(A[4]), .Z(g3));
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L6MUX21 mux60 (.D0(g0), .D1(g1), .SD(A[5]), .Z(h0));
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L6MUX21 mux61 (.D0(g2), .D1(g3), .SD(A[5]), .Z(h1));
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L6MUX21 mux7 (.D0(h0), .D1(h1), .SD(A[6]), .Z(Y));
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`endif
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end else begin
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wire _TECHMAP_FAIL_ = 1;
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@ -42,19 +42,18 @@ module \$lut (A, Y);
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.I0(1'b0), .I1(1'b0), .I2(1'b0), .I3(A[0]));
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end else
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if (WIDTH == 2) begin
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localparam [15:0] INIT = {{4{LUT[3]}}, {4{LUT[1]}}, {4{LUT[2]}}, {4{LUT[0]}}};
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localparam [15:0] INIT = {{4{LUT[3]}}, {4{LUT[2]}}, {4{LUT[1]}}, {4{LUT[0]}}};
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SB_LUT4 #(.LUT_INIT(INIT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(1'b0), .I1(1'b0), .I2(A[1]), .I3(A[0]));
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.I0(1'b0), .I1(1'b0), .I2(A[0]), .I3(A[1]));
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end else
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if (WIDTH == 3) begin
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localparam [15:0] INIT = {{2{LUT[7]}}, {2{LUT[3]}}, {2{LUT[5]}}, {2{LUT[1]}}, {2{LUT[6]}}, {2{LUT[2]}}, {2{LUT[4]}}, {2{LUT[0]}}};
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localparam [15:0] INIT = {{2{LUT[7]}}, {2{LUT[6]}}, {2{LUT[5]}}, {2{LUT[4]}}, {2{LUT[3]}}, {2{LUT[2]}}, {2{LUT[1]}}, {2{LUT[0]}}};
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SB_LUT4 #(.LUT_INIT(INIT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(1'b0), .I1(A[2]), .I2(A[1]), .I3(A[0]));
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.I0(1'b0), .I1(A[0]), .I2(A[1]), .I3(A[2]));
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end else
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if (WIDTH == 4) begin
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localparam [15:0] INIT = {LUT[15], LUT[7], LUT[11], LUT[3], LUT[13], LUT[5], LUT[9], LUT[1], LUT[14], LUT[6], LUT[10], LUT[2], LUT[12], LUT[4], LUT[8], LUT[0]};
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SB_LUT4 #(.LUT_INIT(INIT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[3]), .I1(A[2]), .I2(A[1]), .I3(A[0]));
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SB_LUT4 #(.LUT_INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]), .I1(A[1]), .I2(A[2]), .I3(A[3]));
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end else begin
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wire _TECHMAP_FAIL_ = 1;
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end
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@ -29,90 +29,65 @@ module \$lut (A, Y);
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input [WIDTH-1:0] A;
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output Y;
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// Need to swap input ordering, and fix init accordingly,
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// to match ABC's expectation of LUT inputs in non-decreasing
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// delay order
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function [WIDTH-1:0] permute_index;
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input [WIDTH-1:0] i;
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integer j;
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begin
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permute_index = 0;
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for (j = 0; j < WIDTH; j = j + 1)
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permute_index[WIDTH-1 - j] = i[j];
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end
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endfunction
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function [2**WIDTH-1:0] permute_init;
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input [2**WIDTH-1:0] orig;
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integer i;
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begin
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permute_init = 0;
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for (i = 0; i < 2**WIDTH; i = i + 1)
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permute_init[i] = orig[permute_index(i)];
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end
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endfunction
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parameter [2**WIDTH-1:0] P_LUT = permute_init(LUT);
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generate
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if (WIDTH == 1) begin
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if (P_LUT == 2'b01) begin
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if (LUT == 2'b01) begin
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INV _TECHMAP_REPLACE_ (.O(Y), .I(A[0]));
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end else begin
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LUT1 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.O(Y),
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LUT1 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]));
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end
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end else
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if (WIDTH == 2) begin
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LUT2 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[1]), .I1(A[0]));
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LUT2 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]), .I1(A[1]));
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end else
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if (WIDTH == 3) begin
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LUT3 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[2]), .I1(A[1]), .I2(A[0]));
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LUT3 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]), .I1(A[1]), .I2(A[2]));
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end else
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if (WIDTH == 4) begin
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LUT4 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[3]), .I1(A[2]), .I2(A[1]),
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.I3(A[0]));
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LUT4 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]), .I1(A[1]), .I2(A[2]),
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.I3(A[3]));
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end else
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if (WIDTH == 5) begin
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LUT5 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[4]), .I1(A[3]), .I2(A[2]),
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.I3(A[1]), .I4(A[0]));
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LUT5 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]), .I1(A[1]), .I2(A[2]),
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.I3(A[3]), .I4(A[4]));
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end else
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if (WIDTH == 6) begin
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LUT6 #(.INIT(P_LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[5]), .I1(A[4]), .I2(A[3]),
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.I3(A[2]), .I4(A[1]), .I5(A[0]));
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LUT6 #(.INIT(LUT)) _TECHMAP_REPLACE_ (.O(Y),
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.I0(A[0]), .I1(A[1]), .I2(A[2]),
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.I3(A[3]), .I4(A[4]), .I5(A[5]));
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end else
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if (WIDTH == 7) begin
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wire T0, T1;
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LUT6 #(.INIT(P_LUT[63:0])) fpga_lut_0 (.O(T0),
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.I0(A[6]), .I1(A[5]), .I2(A[4]),
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.I3(A[3]), .I4(A[2]), .I5(A[1]));
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LUT6 #(.INIT(P_LUT[127:64])) fpga_lut_1 (.O(T1),
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.I0(A[6]), .I1(A[5]), .I2(A[4]),
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.I3(A[3]), .I4(A[2]), .I5(A[1]));
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MUXF7 fpga_mux_0 (.O(Y), .I0(T0), .I1(T1), .S(A[0]));
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LUT6 #(.INIT(LUT[63:0])) fpga_lut_0 (.O(T0),
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.I0(A[0]), .I1(A[1]), .I2(A[2]),
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.I3(A[3]), .I4(A[4]), .I5(A[5]));
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LUT6 #(.INIT(LUT[127:64])) fpga_lut_1 (.O(T1),
|
||||
.I0(A[0]), .I1(A[1]), .I2(A[2]),
|
||||
.I3(A[3]), .I4(A[4]), .I5(A[5]));
|
||||
MUXF7 fpga_mux_0 (.O(Y), .I0(T0), .I1(T1), .S(A[6]));
|
||||
end else
|
||||
if (WIDTH == 8) begin
|
||||
wire T0, T1, T2, T3, T4, T5;
|
||||
LUT6 #(.INIT(P_LUT[63:0])) fpga_lut_0 (.O(T0),
|
||||
.I0(A[7]), .I1(A[6]), .I2(A[5]),
|
||||
.I3(A[4]), .I4(A[3]), .I5(A[2]));
|
||||
LUT6 #(.INIT(P_LUT[127:64])) fpga_lut_1 (.O(T1),
|
||||
.I0(A[7]), .I1(A[6]), .I2(A[5]),
|
||||
.I3(A[4]), .I4(A[3]), .I5(A[2]));
|
||||
LUT6 #(.INIT(P_LUT[191:128])) fpga_lut_2 (.O(T2),
|
||||
.I0(A[7]), .I1(A[6]), .I2(A[5]),
|
||||
.I3(A[4]), .I4(A[3]), .I5(A[2]));
|
||||
LUT6 #(.INIT(P_LUT[255:192])) fpga_lut_3 (.O(T3),
|
||||
.I0(A[7]), .I1(A[6]), .I2(A[5]),
|
||||
.I3(A[4]), .I4(A[3]), .I5(A[2]));
|
||||
MUXF7 fpga_mux_0 (.O(T4), .I0(T0), .I1(T1), .S(A[1]));
|
||||
MUXF7 fpga_mux_1 (.O(T5), .I0(T2), .I1(T3), .S(A[1]));
|
||||
MUXF8 fpga_mux_2 (.O(Y), .I0(T4), .I1(T5), .S(A[0]));
|
||||
LUT6 #(.INIT(LUT[63:0])) fpga_lut_0 (.O(T0),
|
||||
.I0(A[0]), .I1(A[1]), .I2(A[2]),
|
||||
.I3(A[3]), .I4(A[4]), .I5(A[5]));
|
||||
LUT6 #(.INIT(LUT[127:64])) fpga_lut_1 (.O(T1),
|
||||
.I0(A[0]), .I1(A[1]), .I2(A[2]),
|
||||
.I3(A[3]), .I4(A[4]), .I5(A[5]));
|
||||
LUT6 #(.INIT(LUT[191:128])) fpga_lut_2 (.O(T2),
|
||||
.I0(A[0]), .I1(A[1]), .I2(A[2]),
|
||||
.I3(A[3]), .I4(A[4]), .I5(A[5]));
|
||||
LUT6 #(.INIT(LUT[255:192])) fpga_lut_3 (.O(T3),
|
||||
.I0(A[0]), .I1(A[1]), .I2(A[2]),
|
||||
.I3(A[3]), .I4(A[4]), .I5(A[5]));
|
||||
MUXF7 fpga_mux_0 (.O(T4), .I0(T0), .I1(T1), .S(A[6]));
|
||||
MUXF7 fpga_mux_1 (.O(T5), .I0(T2), .I1(T3), .S(A[6]));
|
||||
MUXF8 fpga_mux_2 (.O(Y), .I0(T4), .I1(T5), .S(A[7]));
|
||||
end else begin
|
||||
wire _TECHMAP_FAIL_ = 1;
|
||||
end
|
||||
|
|
|
|||
Loading…
Reference in New Issue