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215 Commits

Author SHA1 Message Date
Krystine Sherwin 36ad07e1d5
Docs: Update build_verific 
Clarify partially supported builds section.
Update parameter defaults.
Include note on finding compile options with `yosys-config`.
Fix remaining references to `/yosys_source/`.
 2024-08-22 10:03:59 +12:00
Krystine Sherwin 88bb785dcd
Docs: Verific but with sentences 2024-08-22 10:03:59 +12:00
Krystine Sherwin cfba26ca8b
Docs: Verific progress 2024-08-22 10:03:59 +12:00
Krystine Sherwin 00bb3b6fc2
Docs: Merge yosys_source into extending_yosys 
Move abc_flow content into synthesis/abc document.
 2024-08-22 10:03:59 +12:00
Krystine Sherwin 8e618cac45
Docs: Update build_verific.rst 
Move patch section to top.
Add todos for open questions.
Reformat partially supported builds into a single table.
General language tidy up/reflow.
 2024-08-22 10:03:59 +12:00
Krystine Sherwin 53b223f0df
Docs: Initial build_verific.rst 
From verific.md

Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
 2024-08-22 10:03:59 +12:00
Krystine Sherwin d97a243c22
Docs: Intro to Yosys source section 2024-08-22 10:03:59 +12:00
Krystine Sherwin e18a2f1e27
Docs: Section/folder for yosys source details 
Move test_suites page into said folder.
Placeholder page for building with verific.
 2024-08-22 10:03:58 +12:00
Krystine Sherwin 2ffafadf22
Docs: Add note on verific 
Having a verific license does not provide access to the verific frontend.
 2024-08-22 10:03:58 +12:00
Krystine Sherwin 6df0c3d9ec
docs: Fix synth_flow generation 2024-08-19 21:25:51 +12:00
Krystine Sherwin 3b63ab07ae
docs: Build RTD artifacts directly 
Use rtds-action instead of yosys-cmd-ref repo.
Add rtds_action to docs configuration.
Add `.readthedocs.yaml`.
Update `DOCS_USAGE_` make target to be able to use pre-generated executables without forcing a remake.
 2024-08-16 10:43:51 +12:00
Miodrag Milanovic 80ba43d262 Release version 0.44 2024-08-06 09:42:28 +02:00
Emil J e21dd292fc
Merge pull request #4502 from YosysHQ/emil/build-opt-levels 
Release build configuration improvements
 2024-07-29 15:13:52 +02:00
James Meech 1c41db6978
Update interactive_investigation.rst 
The text starting at line 118 refers to proc twice but it should refer to opt and then to proc.
 2024-07-26 13:53:08 +01:00
Emil J. Tywoniak a947572f38 Add lld to clang build environments and Dockerfile 2024-07-22 21:33:46 +02:00
Miodrag Milanovic c6e5e0b26b Release version 0.43 2024-07-09 09:11:59 +02:00
Martin Povišer f9b7b8fff0 Update documentation for C++17 switch 2024-06-17 17:08:13 +02:00
Krystine Sherwin df4e630ac4
Docs: Add section for script parsing 
Document `!` and `:`.
Add warning that semicolons need spaces.
 2024-06-11 13:17:56 +12:00
Miodrag Milanovic 9b6afcf3f8 Release version 0.42 2024-06-07 08:29:48 +02:00
Emil J 111b747d27
Merge pull request #4420 from YosysHQ/emil/doc-demux-todo 
docs: add todo for $demux
 2024-05-30 17:45:19 +02:00
Emil J. Tywoniak 02ad56a132 docs: add todo for $demux 2024-05-27 22:39:42 +02:00
Miodrag Milanovic 229300bb4a replace unicode chars in rst to make pdf work 2024-05-13 17:37:24 +02:00
Miodrag Milanovic fa19abad98 Fix rst syntax error 2024-05-13 16:44:42 +02:00
Miodrag Milanović eba5fa8d64
Merge pull request #4387 from YosysHQ/emil/document-lut-sop 
docs: Document $lut and $sop
 2024-05-13 15:05:07 +02:00
Krystine Sherwin 3a36612ec7
Docs: Apply invert-helper where needed 2024-05-11 10:40:54 +12:00
Krystine Sherwin 9be7089f4f
Docs-css: Add invert-helper class for images 
Use svg color filter matrix from @jix to invert brightness for images when using dark theme.

Co-authored-by: Jannis Harder <me@jix.one>
 2024-05-11 10:40:28 +12:00
Krystine Sherwin a4c3dcc5a0
docs: Fix macro_commands 
Get absolute path for `TESTS_DIR` to work from `docs` directory or from `docs/tests` in addition to `yosys` directory.
 2024-05-10 09:51:37 +12:00
Krystine Sherwin 6f602e79d4
docs: Debugging macro test fail 
Call yosys-config post build extraction for sanity check.
Report absolute path for yosys exe if it can't be found.
 2024-05-10 09:51:36 +12:00
Emil J. Tywoniak fd84a3378e docs: Document $lut and $sop 2024-05-09 18:31:18 +02:00
Miodrag Milanovic c1ad37779e Release version 0.41 2024-05-08 08:52:10 +02:00
Miodrag Milanovic 71f2540cd8 docs conf.py change Release -> Version 2024-05-07 15:55:52 +02:00
Miodrag Milanovic b4034a881e Keep docs version in conf.py 2024-05-07 15:35:25 +02:00
Krystine Sherwin bb0be8c7a2
Docs: Set release to YOSYS_VER 
If building from read the docs, and the current build is "latest", add `-dev` to the version string.
Requires `YOSYS_VER` to be exported by .readthedocs.yaml.
 2024-05-04 16:51:29 +12:00
Krystine Sherwin 73d021562f
Docs: Rename source/temp to source/generated 2024-04-15 10:13:22 +12:00
Krystine Sherwin 953f5bbe6c
Docs: Remove end-before tag for yosys-abc 2024-04-15 09:50:46 +12:00
Krystine Sherwin b3024289c6
Docs: Force read_verilog to avoid verific header 2024-04-13 11:33:04 +12:00
Krystine Sherwin 1d7b7ddfd7
Docs: Skip footer in logs 2024-04-13 11:29:11 +12:00
Miodrag Milanovic e2cfcbcf25 fix .gitignore 2024-04-10 10:12:05 +02:00
Emil J. Tywoniak 43ef916f86 Restructure rst 2024-04-05 14:01:25 +02:00
Emil J. Tywoniak 9510293a94 fixup 2024-04-04 18:16:58 +02:00
Emil J. Tywoniak a580a7c82c docs: Document $macc 2024-04-03 20:37:54 +02:00
Rui Chen b57a803f60
chore: fix master branch refs 
Signed-off-by: Rui Chen <rui@chenrui.dev>
 2024-03-24 00:41:54 -04:00
Krystine Sherwin c6795cefc5
docs: Install python requirements 2024-03-19 06:05:03 +13:00
Krystine Sherwin f72ddfb09d docs: Fix repo file links 2024-03-19 05:57:26 +13:00
Krystine Sherwin 29c8a3bef9 docs: Fix splice.v in verific 2024-03-19 05:57:26 +13:00
Krystine Sherwin 49f1bea1d2
docs: Add synth_ice40 to macro checks 2024-03-18 11:01:09 +13:00
Krystine Sherwin b6ffdec2ce
docs: Update OSS CAD suite info 2024-03-18 10:45:31 +13:00
Krystine Sherwin 2832034877
docs: Clarify install instructions 
`config-clang` is the default, and doesn't need to be run first.  Previous instructions were ambiguous about that point.
Add note on using a different `CXX`.
 2024-03-18 10:35:01 +13:00
Krystine Sherwin bc9cccacf2
docs: Move fifo localparams into module def 
Fix for failing CI.
 2024-03-18 10:02:40 +13:00
Krystine Sherwin 3635f911dc
Docs: Updates from @povik comments 2024-03-05 05:57:27 +13:00
Krystine Sherwin 1455941ab9
Merge branch 'master' into krys/docs 2024-03-05 05:48:46 +13:00
Krystine Sherwin 3596025283
docs: Remove TODOs from output 
Remove highlighting of wreduce/opt_clean bug.
 2024-03-05 05:44:40 +13:00
passingglance 5226d07721
Update CHAPTER_CellLib.rst 
Fix parameter name to \WIDTH for $tribuf cell.
 2024-02-11 23:59:07 -08:00
passingglance 2b89a5cced
Update CHAPTER_Basics.rst 
Fix typo in Fig. 2.2 caption.
 2024-02-10 10:52:20 -08:00
Krystine Sherwin 9eed04dd4b
Docs: Note on debug for memory_libmap 2024-02-05 15:38:01 +13:00
Catherine c7bf0e3b8f Add new `$check` cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
Krystine Sherwin fae35fe98b
Docs: example_synth fifo update 
More detail on `memory_libmap`, the `$__ICE40_RAM4K_` intermediate step, and the
bizarre opt output.
 2024-01-30 13:34:29 +13:00
Krystine Sherwin fd0c574942
Docs: changes/todos from JF 2024-01-30 13:33:07 +13:00
Krystine Sherwin 9878e69d6c
Docs: tidying 
- Use `:file:` role for file names, as well as `:makevar:` and `:program:`.
- Remove deprecated `linux-arm` and `linux-riscv64` oss-cad-suite targets.
- Add link to ABC.
- More (and better) links to code examples.  Formatted `:file:` text with link
  to source on github.
- Includes a few extra todos (mostly picking up inline code blocks and a couple
  intro reminders).
- Fixing a few missing `:yoscrypt:` and `:cmd:ref:` tags.
- Reflowing some paragraphs for spacing/width.
 2024-01-30 13:31:00 +13:00
Krystine Sherwin 22808e0e3f
Docs: work on selections.rst 
Highlighting the difference between `select prod %ci` and `select prod %ci2` by
introducing `sumproud.out` using the `dump` command.

Playing around with advanced cone example code.
 2024-01-26 17:29:59 +13:00
Krystine Sherwin e2e7065590
Docs: some restructure of advanced section 
- Filling out index descriptions for `using_yosys` and `using_yosys/synthesis`.
- To discourage skipping over these index pages, the toctree in
  `using_yosys/index` is hidden and instead has inline links to the two
  subsections.
- Tidying todos.
- Moves technology mapping to `techmap_synth`, leaving the techmap by example in
  the internals section. `yosys_flows` gets split up, with the coarse-grain
  intro replaced by `synthesis/index`, the extract pass moving to
  `synthesis/extract` and model checking to `more_scripting/model_checking`.
 2024-01-26 13:08:22 +13:00
Krystine Sherwin 4582ab59da
Docs: intro to memory_libmap 2024-01-26 11:15:01 +13:00
Krystine Sherwin 6e38848b92
Docs: updating makefiles 2024-01-25 12:35:03 +13:00
Krystine Sherwin 2a14c72110
test-docs: target examples directly 2024-01-25 11:36:59 +13:00
Krystine Sherwin 57a7532227
Docs: add test-examples target 
`test` becomes `test-macros`, with a new `test` calling both `test-*` targets.
 2024-01-25 10:15:00 +13:00
Krystine Sherwin 9b820108d6
Docs: add test-docs.yml 2024-01-24 11:22:38 +13:00
Krystine Sherwin 449135a9d4
Docs: adding other macro command lists 
Also updates `macro_commands.py` to skip empty lines, and moves comment
stripping earlier in parsing.
 2024-01-24 10:29:40 +13:00
Krystine Sherwin 6c8949cacc
Docs: static opt macro list 
Also adds `docs/tests/macro_commands.py` which checks all commands in
`code_examples/macro_commands` against the current yosys build. Format similar
to `run-test.sh` files: logging the file under test and reporting errors.
 2024-01-24 09:56:00 +13:00
Krystine Sherwin 95849edbba
Docs: changes from JF 
`yosys-witness` prereq `click`.
Yosys environment vars & `yosys --help` output.
Removing Ubuntu/macOS version numbers/names.
Hide `troubleshooting` page.
 2024-01-23 17:35:06 +13:00
Krystine Sherwin 9ec1536f1f
Docs: getting_started tidy 
Rename `show` intro and point to `/cmd/show`.
Add getting_started section overview.
 2024-01-22 11:44:43 +13:00
Krystine Sherwin 65bb0d3059
Docs: updating to current 'master' 
Pulling for #4133 and removing related TODO.
 2024-01-22 11:18:07 +13:00
Krystine Sherwin 794ad381c6
Docs: scripting_intro/show_intro 
Adds two new `show` commands to `fifo.ys` for demo purposes.
Mention referencing named selections with `@<name>`.
Also adds a note to `example_synth` to point to the show intro.
 2024-01-22 11:10:02 +13:00
Krystine Sherwin 14b7c581fa
Docs: reworking scripting_intro 
Now comes *after* example_synth, with references back to it.
Includes some minor adjustment to the `fifo.ys` script to better demonstrate the `select` command.
Still needs an updated section on `show`.

Also includes some other minor updates.
 2024-01-18 15:33:59 +13:00
Krystine Sherwin 74d2c918cd
Docs: installation/source tree 2024-01-18 14:05:34 +13:00
Krystine Sherwin 93ceda5c63
Docs: auxlibs 2024-01-18 12:14:00 +13:00
Krystine Sherwin 27ae093dba
Docs: working on opt page 
Replace leftover `opt` example source/images with examples specific to the `opt_*` pass.
Currently has images for `opt_expr`, `opt_merge`, `opt_muxtree`, and `opt_share`.
Also includes some other TODO updates.
 2024-01-17 11:00:42 +13:00
Krystine Sherwin 63a0f80996
Docs: opt_share 2024-01-17 08:47:50 +13:00
Krystine Sherwin 14f2208e47
Docs: opt_expr 2024-01-17 08:40:48 +13:00
Krystine Sherwin aa652f9634
Docs: fix scripting_intro.rst images 2024-01-16 13:23:30 +13:00
Krystine Sherwin 5a4c2e5c79
example_synth: proc and opt_expr 
Highlight `proc` blocks and intro `opt_expr`.
 2024-01-16 13:23:04 +13:00
Krystine Sherwin 646ff6d32d
Docs: interactive investigation 
More `literalinclude` and references to source.
Adding `example_show.ys` and `example_lscd.ys`.
Rename `example_00` et al to `example_first` et al.
Also some other minor tidying.
 2024-01-15 15:32:14 +13:00
Krystine Sherwin 9fe3dcda78
Docs: optimization passes 
Working on `opt.rst`.
Replace the hardcoded `opt` psuedo code listing with a `literalinclude` from `/cmd/opt.rst`.
Reorder and update `opt_*` list to match current `opt`.
Expand sub-section titles with the function of the pass (keeping the `:cmd:ref:` part at the end to prevent the Esbonio error in vscode when a heading starts with a directive).
Move comments about `clean` and `;;` being aliases into final `opt` subsection.

Also renames `Test suites` -> `Testing Yosys`.
 2024-01-15 13:15:11 +13:00
Krystine Sherwin 9eab5d8b24
Updated Yosys family 2024-01-15 12:27:38 +13:00
Krystine Sherwin 3360c612d5
Docs: remove hanging reference 2024-01-13 17:46:19 +13:00
Krystine Sherwin 12fa443fe3
example_synth: more on hierarchy and stat 2024-01-13 17:46:04 +13:00
Krystine Sherwin a3255fd8d3
Docs: opt_rmunused -> opt_clean 2024-01-13 16:57:10 +13:00
Krystine Sherwin 064723a1cc
example_synth: tidying 
Adds note on `+/`.
Clarifies that we can't entirely skip loading `cells_sim.v`, and then mentions it again later once we need it.
More on final steps (and synthesis outputs).
 2024-01-13 15:46:00 +13:00
Catherine 1159e48721 write_verilog: emit `initial $display` correctly. 2024-01-11 13:13:04 +01:00
Krystine Sherwin eb5da87d52
example_synth: hardware mapping 
Filling out the hardware mapping sections, and actually highlighting the changes in schematics instead of just the memory block.
Also includes Part 4 of the coarse-grain rep, looking at `memory_collect` and putting the `synth_ice40 -top fifo -run :map_ram` command in its own (sub)section.
Includes a `no_rw_check` section label in `memory.rst` for reference (because I can't remember how to reference by heading).

Not sure about the opt output after map_ram section which has an open TODO, and the final steps section is also still open.
 2024-01-08 16:59:03 +13:00
Krystine Sherwin e6f8804e6a
example_synth: more on DSP mapping 2024-01-08 13:24:52 +13:00
Krystine Sherwin 3e653fe4a6
docs: more on wreduce in synth starter 2024-01-04 12:49:48 +13:00
Krystine Sherwin 9f1c445fbf
docs: work on example_synth 
Split hardware mapping from `fifo.ys` into `fifo_map.ys`.  Reduces size of `fifo.out` log and allows separate yosys calls in the makefile.

Some tidy up and minor changes in `fifo.ys` for better discussion.
Filled out note on `clean` (changed from `opt_clean`) and introduced `;;`.
Highlighted `$memrd` and added a paragraph about it.
More detail on the flatten and merging of `fifo_reader` block.
Brief discussion on the changes from `$memrd` to `$memrd_v2`.
 2024-01-03 11:47:33 +13:00
Krystine Sherwin 50d8c1b258
First pass example_synth done 
Split coarse grain representation into 4 parts, loosely: fsm/opt, other optimizations/techmap/memory_dff, DSPs, alumacc/memory -nomap.
Split hardware mapping into subsections as well: memory blocks (map_ram and map_ffram), arithmetic (map_gates), FFs (map_ffs), LUTs (map_luts and briefly abc), and other (map_cells and a note on hilomap and iopadmap).

Also add `-T` flag to Yosys call to remove footer from log output.
 2023-12-20 14:08:06 +13:00
Krystine Sherwin a33b1b6059
More work on example_synth 
Added highlighting in (most) schematics.
Written down to end of coarse-grain, with a couple of TODOs for filling in gaps.
Includes `techmap_synth.rst` stub.
 2023-12-18 17:49:15 +13:00
Krystine Sherwin 742ec78ca3
Switching example synth to fifo 
Fifo code based on SBY quick start.
Instead of showing the full design we are (currently) focusing on a single output (rdata), using `%ci*` to get the subcircuit it relies on.
 2023-12-18 13:19:01 +13:00
Krystine Sherwin 80c78aaad6
New example_synth code 
`example_synth.rst` updated down to coarse-grain representation.
 2023-12-14 16:21:52 +13:00
Krystine Sherwin 6d1caf6134
Initial synth_ice40 example 
Overall structure in place to match the iCE40 flow.
Still needs a new example design, and more text for the later sections (which the counter doesn't cover).
 2023-12-14 11:33:32 +13:00
Krystine Sherwin 3a153f99db
Add cell_libs.rst 
Updates code examples, removing `counter_outputs.ys` in favour of a single script.  Also adds a .gitignore for the output file `synth.v`.
`example_synth.rst` still pending updated example.
 2023-12-14 10:08:46 +13:00
Krystine Sherwin f44e8d0124
Working on extensions doc 
Moved the last files out of the resources directory.
Some tidy up/reformatting of the extensions to allow literalincludes from `my_cmd.cc`.
Most (all?) of the getting started guidelines file is either in the quick guide section, or sections referenced by it.  Instead of including it verbatim, we'll instead just leave a reference to it but then jump straight into the quick guide.
Include an image for the absval generated module.  Still needs more surrounding text but it's good enough for now.

Also includes some other minor tidying, including removing the no longer used abc_01 code example.
 2023-12-13 11:34:42 +13:00
Krystine Sherwin 7f24ef37f8
Add todo 2023-12-13 10:15:51 +13:00