mirror of https://github.com/YosysHQ/yosys.git
First pass example_synth done
Split coarse grain representation into 4 parts, loosely: fsm/opt, other optimizations/techmap/memory_dff, DSPs, alumacc/memory -nomap. Split hardware mapping into subsections as well: memory blocks (map_ram and map_ffram), arithmetic (map_gates), FFs (map_ffs), LUTs (map_luts and briefly abc), and other (map_cells and a note on hilomap and iopadmap). Also add `-T` flag to Yosys call to remove footer from log output.
This commit is contained in:
Krystine Sherwin
parent
a33b1b6059
commit
50d8c1b258
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@ -2,14 +2,17 @@ PROGRAM_PREFIX :=
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YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
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DOTS = addr_gen_hier.dot addr_gen_proc.dot
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DOTS += rdata_proc.dot rdata_flat.dot
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DOTS += fifo_flat.dot fifo_synth.dot
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DOT_NAMES = addr_gen_hier addr_gen_proc addr_gen_clean
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DOT_NAMES += rdata_proc rdata_flat rdata_adffe rdata_memrdv2 rdata_alumacc
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DOT_NAMES += rdata_coarse rdata_map_ram rdata_map_ffram rdata_map_gates
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DOT_NAMES += rdata_map_ffs rdata_map_luts rdata_map_cells
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DOTS := $(addsuffix .dot,$(DOT_NAMES))
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dots: $(DOTS) fifo.out
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$(DOTS) fifo.out: fifo.v fifo.ys
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$(YOSYS) fifo.ys -l fifo.out -Q
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$(YOSYS) fifo.ys -l fifo.out -Q -T
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.PHONY: clean
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clean:
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File diff suppressed because it is too large
Load Diff
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@ -56,7 +56,51 @@ show -color maroon3 @new_cells -notitle -format dot -prefix rdata_alumacc o:rdat
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design -reset
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read_verilog fifo.v
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synth_ice40 -top fifo -run begin:map_ram
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# memory_collect
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# opt
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select -set new_cells t:$mem_v2
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_coarse o:rdata %ci*
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select -set rdata_path @new_cells %ci*:-$mem_v2[WR_DATA,WR_ADDR,WR_EN] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_coarse @rdata_path
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# turn command echoes off to avoid randomly generated abc file names
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echo off
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# ========================================================
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synth_ice40 -top fifo -run map_ram:map_ffram
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_ram @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_ffram:map_gates
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_ffram @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_gates:map_ffs
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_gates @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_ffs:map_luts
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_ffs @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_luts:map_cells
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_luts @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_cells:
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_cells @rdata_path
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@ -299,24 +299,26 @@ optimizations and other transformations done previously.
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While the iCE40 flow had a :ref:`synth_flatten` and put :cmd:ref:`proc` in
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the :ref:`synth_begin`, some synthesis scripts will instead include these in
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the :ref:`synth_coarse`.
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this section.
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In the iCE40 flow we get all the following commands:
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Part 1
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^^^^^^
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In the iCE40 flow, we start with the following commands:
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:linenos:
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:start-after: coarse:
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:end-before: map_ram:
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:end-before: wreduce
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:dedent:
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:caption: ``coarse`` section
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:name: synth_coarse
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:caption: ``coarse`` section (part 1)
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:name: synth_coarse1
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The first few commands are relatively straightforward. We've already come
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The first few commands are relatively straightforward, and we've already come
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across :cmd:ref:`opt_clean` and :cmd:ref:`opt_expr`. The :cmd:ref:`check` pass
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identifies a few obvious problems which will cause errors later. Calling it
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here lets us fail faster rather than wasting time on something we know is
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impossible.
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impossible.
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Next up is :yoscrypt:`opt -nodffe -nosdff` performing a set of simple
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optimizations on the design. This command also ensures that only a specific
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@ -343,12 +345,30 @@ options is able to fold one of the ``$mux`` cells into the ``$adff`` to form an
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``rdata`` output after :cmd:ref:`opt_dff`
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.. seealso:: Advanced usage docs for
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- :doc:`/using_yosys/synthesis/fsm`
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- :doc:`/using_yosys/synthesis/opt`
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Part 2
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^^^^^^
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-at: wreduce
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:end-before: t:$mul
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:dedent:
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:caption: ``coarse`` section (part 2)
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:name: synth_coarse2
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The next three (new) commands are :doc:`/cmd/wreduce`, :doc:`/cmd/peepopt`, and
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:doc:`/cmd/share`. None of these affect our design either, so let's skip over
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them. :yoscrypt:`techmap -map +/cmp2lut.v -D LUT_WIDTH=4` optimizes certain
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comparison operators by converting them to LUTs instead. The usage of
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:cmd:ref:`techmap` is explored more in
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:doc:`/using_yosys/synthesis/techmap_synth`. Our next command to run is
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:doc:`/using_yosys/synthesis/techmap_synth`.
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Our next command to run is
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:doc:`/cmd/memory_dff`.
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.. literalinclude:: /code_examples/fifo/fifo.out
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@ -365,10 +385,45 @@ comparison operators by converting them to LUTs instead. The usage of
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As the title suggests, :cmd:ref:`memory_dff` has merged the output ``$dff`` into
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the ``$memrd`` cell and converted it to a ``$memrd_v2`` (highlighted).
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Following this is a series of commands for mapping to DSPs.
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.. seealso:: Advanced usage docs for
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- :doc:`/using_yosys/synthesis/opt`
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- :doc:`/using_yosys/synthesis/techmap_synth`
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- :doc:`/using_yosys/synthesis/memory`
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Part 3
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^^^^^^
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The third part of the :cmd:ref:`synth_ice40` flow is a series of commands for
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mapping to DSPs.
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-at: t:$mul
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:end-before: alumacc
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:dedent:
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:caption: ``coarse`` section (part 3)
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:name: synth_coarse3
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.. TODO:: more on DSP mapping
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.. seealso:: Advanced usage docs for
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:doc:`/using_yosys/synthesis/techmap_synth`
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Part 4
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^^^^^^
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That brings us to the fourth and final part for the iCE40 synthesis flow:
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-at: alumacc
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:end-before: map_ram:
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:dedent:
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:caption: ``coarse`` section (part 4)
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:name: synth_coarse4
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Where before each type of arithmetic operation had its own cell, e.g. ``$add``,
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we now want to extract these into ``$alu`` and ``$macc`` cells which can be
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mapped to hard blocks. We do this by running :cmd:ref:`alumacc`, which we can
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@ -386,15 +441,7 @@ see produce the following changes in our example design:
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``rdata`` output after :cmd:ref:`alumacc`
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That brings us to the last commands, and a look at ``rdata`` at the end of the
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:ref:`synth_coarse`. We could also have gotten here by running
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:yoscrypt:`synth_ice40 -top fifo -run begin:map_ram` after loading the design.
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-at: memory -nomap
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:end-before: map_ram:
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:dedent:
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.. TODO:: discuss :cmd:ref:`memory_collect` and ``$mem_v2``
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.. figure:: /_images/code_examples/fifo/rdata_coarse.*
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:class: width-helper
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@ -402,18 +449,26 @@ That brings us to the last commands, and a look at ``rdata`` at the end of the
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``rdata`` output after :yoscrypt:`memory -nomap`
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.. TODO:: discuss :cmd:ref:`memory_collect` and ``$mem_v2``
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We could also have gotten here by running :yoscrypt:`synth_ice40 -top fifo -run
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begin:map_ram` after loading the design.
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.. seealso:: Advanced usage docs for
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:doc:`/using_yosys/synthesis/fsm`
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:doc:`/using_yosys/synthesis/opt`
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:doc:`/using_yosys/synthesis/techmap_synth`
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:doc:`/using_yosys/synthesis/memory`
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Hardware mapping
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~~~~~~~~~~~~~~~~
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.. TODO:: example_synth hardware mapping sections
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The remaining sections each map a different type of hardware and are much more
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architecture dependent than the previous sections. As such we will only be
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looking at each section very briefly.
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Memory blocks
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^^^^^^^^^^^^^
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Mapping to hard memory blocks uses a combination of :cmd:ref:`memory_libmap`,
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:cmd:ref:`memory_map`, and :cmd:ref:`techmap`.
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.. TODO:: ``$mem_v2`` -> ``SB_RAM40_4K``
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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@ -423,6 +478,12 @@ Hardware mapping
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:name: map_ram
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:caption: ``map_ram`` section
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.. figure:: /_images/code_examples/fifo/rdata_map_ram.*
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:class: width-helper
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:name: rdata_map_ram
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``rdata`` output after :ref:`map_ram`
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-after: map_ffram:
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@ -431,6 +492,24 @@ Hardware mapping
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:name: map_ffram
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:caption: ``map_ffram`` section
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.. figure:: /_images/code_examples/fifo/rdata_map_ffram.*
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:class: width-helper
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:name: rdata_map_ffram
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``rdata`` output after :ref:`map_ffram`
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.. seealso:: Advanced usage docs for
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- :doc:`/using_yosys/synthesis/techmap_synth`
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- :doc:`/using_yosys/synthesis/memory`
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Arithmetic
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^^^^^^^^^^
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Uses :cmd:ref:`techmap`.
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.. TODO:: example_synth/Arithmetic
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-after: map_gates:
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@ -439,6 +518,23 @@ Hardware mapping
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:name: map_gates
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:caption: ``map_gates`` section
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.. figure:: /_images/code_examples/fifo/rdata_map_gates.*
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:class: width-helper
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:name: rdata_map_gates
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``rdata`` output after :ref:`map_gates`
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.. seealso:: Advanced usage docs for
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:doc:`/using_yosys/synthesis/techmap_synth`
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Flip-flops
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^^^^^^^^^^
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Convert FFs to the types supported in hardware with :cmd:ref:`dfflegalize`, and
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then use :cmd:ref:`techmap` to map them. We also run :cmd:ref:`simplemap` here
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to convert any remaining cells which could not be mapped to hardware into
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gate-level primitives.
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-after: map_ffs:
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@ -447,6 +543,23 @@ Hardware mapping
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:name: map_ffs
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:caption: ``map_ffs`` section
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.. figure:: /_images/code_examples/fifo/rdata_map_ffs.*
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:class: width-helper
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:name: rdata_map_ffs
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``rdata`` output after :ref:`map_ffs`
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.. seealso:: Advanced usage docs for
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:doc:`/using_yosys/synthesis/techmap_synth`
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LUTs
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^^^^
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:cmd:ref:`abc` and :cmd:ref:`techmap` are used to map LUTs. Note that the iCE40
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flow uses :cmd:ref:`abc` rather than :cmd:ref:`abc9`. For more on what these
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do, and what the difference between these two commands are, refer to
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:doc:`/using_yosys/synthesis/abc`.
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-after: map_luts:
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@ -455,6 +568,22 @@ Hardware mapping
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:name: map_luts
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:caption: ``map_luts`` section
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.. figure:: /_images/code_examples/fifo/rdata_map_luts.*
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:class: width-helper
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:name: rdata_map_luts
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``rdata`` output after :ref:`map_luts`
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.. seealso:: Advanced usage docs for
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- :doc:`/using_yosys/synthesis/techmap_synth`
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- :doc:`/using_yosys/synthesis/abc`
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Other cells
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^^^^^^^^^^^
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Seems to be wide LUTs into individual LUTs using :cmd:ref:`techmap`.
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.. literalinclude:: /cmd/synth_ice40.rst
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:language: yoscrypt
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:start-after: map_cells:
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@ -463,9 +592,13 @@ Hardware mapping
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:name: map_cells
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:caption: ``map_cells`` section
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:cmd:ref:`dfflibmap`
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This command maps the internal register cell types to the register types
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described in a liberty file.
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.. figure:: /_images/code_examples/fifo/rdata_map_cells.*
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:class: width-helper
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:name: rdata_map_cells
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``rdata`` output after :ref:`map_cells`
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.. TODO:: example_synth other cells
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:cmd:ref:`hilomap`
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Some architectures require special driver cells for driving a constant hi or
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@ -476,12 +609,8 @@ Hardware mapping
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Top-level input/outputs must usually be implemented using special I/O-pad
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cells. This command inserts such cells to the design.
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:cmd:ref:`dfflegalize`
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Specify a set of supported FF cells/cell groups and convert all FFs to them.
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.. seealso:: Advanced usage docs for
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:doc:`/yosys_internals/techmap`, and
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:doc:`/using_yosys/synthesis/memory`.
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:doc:`/yosys_internals/techmap`
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Final steps
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~~~~~~~~~~~~
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