Commit Graph

6667 Commits

Author SHA1 Message Date
Eddie Hung 06f94c92d4 Revert "Add log_checkpoint function and use it in opt_muxtree"
This reverts commit 0e6c83027f.
2019-07-15 08:35:48 -07:00
N. Engelhardt ab4b9e8db4 smt: handle failure of setrlimit syscall 2019-07-15 23:33:18 +08:00
Eddie Hung 78560aac86 Revert "Fix first divergence in #1178"
This reverts commit 1122a2e067.
2019-07-15 08:31:26 -07:00
Eddie Hung 7129a03083 Merge branch 'master' into eddie/fix1178 2019-07-15 08:23:01 -07:00
Clifford Wolf 44fd459c79 Redesign log_id_cache so that it doesn't keep IdString instances referenced, fixes #1178
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-15 17:10:42 +02:00
Clifford Wolf 0e6c83027f Add log_checkpoint function and use it in opt_muxtree
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-07-15 12:12:21 +02:00
Eddie Hung a97d30d2f8
Merge pull request #1194 from cr1901/miss-semi
Fix missing semicolon in Windows-specific code in aigerparse.cc.
2019-07-14 13:36:34 -07:00
William D. Jones da5d64d71e Fix missing semicolon in Windows-specific code in aigerparse.cc.
Signed-off-by: William D. Jones <thor0505@comcast.net>
2019-07-14 13:52:27 -04:00
Roman-Parise f7ab7a418c Updated FreeBSD dependencies in README.md 2019-07-14 09:25:07 -07:00
whitequark 2de7e92bb8 opt_lut: make less chatty. 2019-07-13 16:49:56 +00:00
Eddie Hung 9b91d815b5 If ConstEval fails do not log_abort() but return gracefully 2019-07-13 04:13:57 -07:00
Eddie Hung ab3917d079 Error out if enable > dbits 2019-07-13 03:39:23 -07:00
Eddie Hung d032198fac ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT 2019-07-13 01:11:00 -07:00
Eddie Hung fb062c3426 Add comment 2019-07-13 00:52:21 -07:00
Eddie Hung 41243a53b3 Update test with more accurate LUT mask 2019-07-12 21:00:59 -07:00
Eddie Hung e9bdc86c0e duplicate -> clone 2019-07-12 19:33:02 -07:00
Eddie Hung be0cb7f4b8 More cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 7d583f9e57 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 83f23a24a8 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 1adbfb5533 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 39a7c7c54c More cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 91c07be196 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 399e1ec870 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 58dbb28fd3 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung 7dc15bdd2d Do not double count cells in abc 2019-07-12 08:22:26 -07:00
Clifford Wolf 463f710066
Merge pull request #1183 from whitequark/ice40-always-relut
synth_ice40: switch -relut to be always on
2019-07-12 10:48:00 +02:00
Eddie Hung 7a912f22b2 Use Const::from_string() not its constructor... 2019-07-12 01:32:10 -07:00
Eddie Hung 28274dfb09 Off by one 2019-07-12 01:17:53 -07:00
Eddie Hung e0e5d7d68e Fix spacing 2019-07-12 01:15:22 -07:00
Eddie Hung 4de03bd5e6 Remove double push 2019-07-12 01:08:48 -07:00
Eddie Hung 62ac5ebd02 Map to and from this box if -abc9 2019-07-12 00:53:01 -07:00
Eddie Hung 0f5bddcd79 ice40_opt to handle this box and opt back to SB_LUT4 2019-07-12 00:52:31 -07:00
Eddie Hung a79ff2501e Add new box to cells_sim.v 2019-07-12 00:52:19 -07:00
Eddie Hung c6e16e1334 _ABC macro will map and unmap to this new box 2019-07-12 00:51:37 -07:00
Eddie Hung fc3d74616f Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box 2019-07-12 00:50:42 -07:00
Eddie Hung 1c9f3fadb9 Add Tsu offset to boxes, and comments 2019-07-11 17:17:26 -07:00
Eddie Hung d386177e6d ABC doesn't like negative delays in flop boxes... 2019-07-11 17:09:17 -07:00
Eddie Hung 3ef927647c Fix FDCE_1 box 2019-07-11 14:25:47 -07:00
Eddie Hung 1ada568134 Revert "$pastQ should be first input"
This reverts commit 8f9d529929.
2019-07-11 14:23:45 -07:00
Eddie Hung 854333f2af Propagate INIT attr 2019-07-11 13:55:47 -07:00
Eddie Hung 8f9d529929 $pastQ should be first input 2019-07-11 13:54:40 -07:00
Eddie Hung 021f8e5492 Fix typo 2019-07-11 13:23:07 -07:00
whitequark b700a4b1c5 synth_ice40: switch -relut to be always on. 2019-07-11 20:18:41 +00:00
whitequark a8c5f7f41e synth_ice40: fix help text typo. NFC. 2019-07-11 20:18:41 +00:00
Eddie Hung 19c1c3cfa3
Merge pull request #1182 from koriakin/xc6s-bram
synth_xilinx: Initial Spartan 6 block RAM inference support.
2019-07-11 12:55:35 -07:00
Eddie Hung 931adbaf74
Merge pull request #1185 from koriakin/xc-ff-init-vals
xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Vivado.
2019-07-11 12:55:14 -07:00
Marcin Kościelnicki a9efacd01d xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Vivado. 2019-07-11 21:13:12 +02:00
Eddie Hung a314565ad4 Short out async box 2019-07-11 10:52:45 -07:00
Eddie Hung 8fef4c3594 Simplify to $__ABC_ASYNC box 2019-07-11 10:52:33 -07:00
Eddie Hung 93fbd56db1 $__ABC_FD_ASYNC_MUX.Q -> Y 2019-07-11 10:25:59 -07:00