Eddie Hung
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06f94c92d4
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Revert "Add log_checkpoint function and use it in opt_muxtree"
This reverts commit 0e6c83027f .
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2019-07-15 08:35:48 -07:00 |
N. Engelhardt
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ab4b9e8db4
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smt: handle failure of setrlimit syscall
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2019-07-15 23:33:18 +08:00 |
Eddie Hung
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78560aac86
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Revert "Fix first divergence in #1178"
This reverts commit 1122a2e067 .
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2019-07-15 08:31:26 -07:00 |
Eddie Hung
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7129a03083
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Merge branch 'master' into eddie/fix1178
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2019-07-15 08:23:01 -07:00 |
Clifford Wolf
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44fd459c79
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Redesign log_id_cache so that it doesn't keep IdString instances referenced, fixes #1178
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-07-15 17:10:42 +02:00 |
Clifford Wolf
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0e6c83027f
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Add log_checkpoint function and use it in opt_muxtree
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-07-15 12:12:21 +02:00 |
Eddie Hung
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a97d30d2f8
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Merge pull request #1194 from cr1901/miss-semi
Fix missing semicolon in Windows-specific code in aigerparse.cc.
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2019-07-14 13:36:34 -07:00 |
William D. Jones
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da5d64d71e
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Fix missing semicolon in Windows-specific code in aigerparse.cc.
Signed-off-by: William D. Jones <thor0505@comcast.net>
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2019-07-14 13:52:27 -04:00 |
Roman-Parise
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f7ab7a418c
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Updated FreeBSD dependencies in README.md
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2019-07-14 09:25:07 -07:00 |
whitequark
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2de7e92bb8
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opt_lut: make less chatty.
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2019-07-13 16:49:56 +00:00 |
Eddie Hung
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9b91d815b5
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If ConstEval fails do not log_abort() but return gracefully
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2019-07-13 04:13:57 -07:00 |
Eddie Hung
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ab3917d079
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Error out if enable > dbits
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2019-07-13 03:39:23 -07:00 |
Eddie Hung
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d032198fac
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ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT
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2019-07-13 01:11:00 -07:00 |
Eddie Hung
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fb062c3426
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Add comment
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2019-07-13 00:52:21 -07:00 |
Eddie Hung
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41243a53b3
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Update test with more accurate LUT mask
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2019-07-12 21:00:59 -07:00 |
Eddie Hung
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e9bdc86c0e
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duplicate -> clone
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2019-07-12 19:33:02 -07:00 |
Eddie Hung
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be0cb7f4b8
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More cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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7d583f9e57
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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83f23a24a8
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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1adbfb5533
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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39a7c7c54c
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More cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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91c07be196
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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399e1ec870
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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58dbb28fd3
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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7dc15bdd2d
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Do not double count cells in abc
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2019-07-12 08:22:26 -07:00 |
Clifford Wolf
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463f710066
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Merge pull request #1183 from whitequark/ice40-always-relut
synth_ice40: switch -relut to be always on
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2019-07-12 10:48:00 +02:00 |
Eddie Hung
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7a912f22b2
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Use Const::from_string() not its constructor...
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2019-07-12 01:32:10 -07:00 |
Eddie Hung
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28274dfb09
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Off by one
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2019-07-12 01:17:53 -07:00 |
Eddie Hung
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e0e5d7d68e
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Fix spacing
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2019-07-12 01:15:22 -07:00 |
Eddie Hung
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4de03bd5e6
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Remove double push
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2019-07-12 01:08:48 -07:00 |
Eddie Hung
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62ac5ebd02
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Map to and from this box if -abc9
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2019-07-12 00:53:01 -07:00 |
Eddie Hung
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0f5bddcd79
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ice40_opt to handle this box and opt back to SB_LUT4
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2019-07-12 00:52:31 -07:00 |
Eddie Hung
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a79ff2501e
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Add new box to cells_sim.v
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2019-07-12 00:52:19 -07:00 |
Eddie Hung
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c6e16e1334
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_ABC macro will map and unmap to this new box
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2019-07-12 00:51:37 -07:00 |
Eddie Hung
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fc3d74616f
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Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box
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2019-07-12 00:50:42 -07:00 |
Eddie Hung
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1c9f3fadb9
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Add Tsu offset to boxes, and comments
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2019-07-11 17:17:26 -07:00 |
Eddie Hung
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d386177e6d
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ABC doesn't like negative delays in flop boxes...
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2019-07-11 17:09:17 -07:00 |
Eddie Hung
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3ef927647c
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Fix FDCE_1 box
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2019-07-11 14:25:47 -07:00 |
Eddie Hung
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1ada568134
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Revert "$pastQ should be first input"
This reverts commit 8f9d529929 .
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2019-07-11 14:23:45 -07:00 |
Eddie Hung
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854333f2af
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Propagate INIT attr
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2019-07-11 13:55:47 -07:00 |
Eddie Hung
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8f9d529929
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$pastQ should be first input
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2019-07-11 13:54:40 -07:00 |
Eddie Hung
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021f8e5492
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Fix typo
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2019-07-11 13:23:07 -07:00 |
whitequark
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b700a4b1c5
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synth_ice40: switch -relut to be always on.
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2019-07-11 20:18:41 +00:00 |
whitequark
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a8c5f7f41e
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synth_ice40: fix help text typo. NFC.
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2019-07-11 20:18:41 +00:00 |
Eddie Hung
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19c1c3cfa3
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Merge pull request #1182 from koriakin/xc6s-bram
synth_xilinx: Initial Spartan 6 block RAM inference support.
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2019-07-11 12:55:35 -07:00 |
Eddie Hung
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931adbaf74
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Merge pull request #1185 from koriakin/xc-ff-init-vals
xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Vivado.
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2019-07-11 12:55:14 -07:00 |
Marcin Kościelnicki
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a9efacd01d
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xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Vivado.
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2019-07-11 21:13:12 +02:00 |
Eddie Hung
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a314565ad4
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Short out async box
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2019-07-11 10:52:45 -07:00 |
Eddie Hung
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8fef4c3594
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Simplify to $__ABC_ASYNC box
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2019-07-11 10:52:33 -07:00 |
Eddie Hung
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93fbd56db1
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$__ABC_FD_ASYNC_MUX.Q -> Y
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2019-07-11 10:25:59 -07:00 |