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Do not double count cells in abc
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@ -1172,8 +1172,8 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin
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continue;
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}
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}
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cell_stats[RTLIL::unescape_id(c->type)]++;
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else
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cell_stats[RTLIL::unescape_id(c->type)]++;
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if (c->type == "\\_const0_" || c->type == "\\_const1_") {
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RTLIL::SigSig conn;
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