Eddie Hung
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dd10d2b00d
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Add tests for cmp2lut on LUT6
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2019-07-16 12:11:59 -07:00 |
David Shah
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d38df68d26
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xilinx: Add correct signed behaviour to DSP48E1 model
Signed-off-by: David Shah <dave@ds0.me>
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2019-07-16 17:53:08 +01:00 |
Eddie Hung
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5939b5d636
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Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters
abc9: push inverters driving box inputs (comb outputs) through $lut soft logic
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2019-07-16 08:53:47 -07:00 |
Eddie Hung
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ba8ccbdea8
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Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix
abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
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2019-07-16 08:52:14 -07:00 |
David Shah
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95c8d27b0b
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xilinx: Treat DSP48E1 as 24x17 unsigned for now (actual behaviour is 25x18 signed)
Signed-off-by: David Shah <dave@ds0.me>
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2019-07-16 16:47:53 +01:00 |
David Shah
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8da4c1ad82
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mul2dsp: Fix edge case where Y_WIDTH is less than B_WIDTH+`DSP_A_MAXWIDTH
Signed-off-by: David Shah <dave@ds0.me>
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2019-07-16 16:44:40 +01:00 |
David Shah
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7a75f5f3ac
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mul2dsp: Fix indentation
Signed-off-by: David Shah <dave@ds0.me>
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2019-07-16 16:19:32 +01:00 |
Clifford Wolf
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a1a04ea79c
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Merge pull request #1200 from mmicko/fix_typo_liberty_cc
Fix typo, double "of"
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2019-07-16 15:27:25 +02:00 |
Clifford Wolf
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928f0a4438
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Merge pull request #1199 from mmicko/extract_fa_fix
Fix check logic in extract_fa
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2019-07-16 15:27:09 +02:00 |
Miodrag Milanovic
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6cce679b35
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Fix typo, double "of"
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2019-07-16 11:03:30 +02:00 |
Miodrag Milanovic
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2b469e82a7
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Fix check logic in extract_fa
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2019-07-16 10:35:18 +02:00 |
Eddie Hung
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fd5b3593d8
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Do not swap if equals
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2019-07-15 16:52:37 -07:00 |
Eddie Hung
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b29f26f6c7
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SigSpec::extend_u0() to return *this
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2019-07-15 16:23:12 -07:00 |
Eddie Hung
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5f00d335d4
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Oops forgot these files
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2019-07-15 15:03:15 -07:00 |
Eddie Hung
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dd59375a66
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Add xilinx_dsp for register packing
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2019-07-15 14:46:31 -07:00 |
Eddie Hung
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42f8e68e76
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OUT port to Y in generic DSP
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2019-07-15 14:45:47 -07:00 |
Eddie Hung
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0c7ee6d0fa
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Move DSP mapping back out to dsp_map.v
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2019-07-15 14:18:44 -07:00 |
Eddie Hung
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87db41a2bb
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Merge pull request #1196 from YosysHQ/eddie/fix1178
Fix different synth results between with and without debug output "-g"
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2019-07-15 13:31:08 -07:00 |
Eddie Hung
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5fb27c071b
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$__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark
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2019-07-15 12:03:51 -07:00 |
Eddie Hung
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91fcf034bc
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Only swap if B_WIDTH > A_WIDTH
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2019-07-15 11:24:11 -07:00 |
Eddie Hung
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1793e6018a
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Tidy up
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2019-07-15 11:19:54 -07:00 |
Eddie Hung
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20e3d2d9b0
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Move DSP48E1 model out of cells_xtra, initial multiply one in cells_sim
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2019-07-15 11:13:22 -07:00 |
Clifford Wolf
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2a7198db51
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Merge pull request #1189 from YosysHQ/eddie/fix1151
Error out if enable > dbits in memory_bram file
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2019-07-15 20:06:35 +02:00 |
Clifford Wolf
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2c5c53e4c1
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Merge pull request #1190 from YosysHQ/eddie/fix_1099
extract_fa to return nothing more gracefully
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2019-07-15 20:05:56 +02:00 |
Clifford Wolf
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196c9c22b2
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Merge pull request #1191 from whitequark/opt_lut-log_debug
Make opt_lut less chatty
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2019-07-15 20:04:00 +02:00 |
Clifford Wolf
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46144f2750
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Merge pull request #1195 from Roman-Parise/master
Updated FreeBSD dependencies in README.md
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2019-07-15 20:01:38 +02:00 |
Clifford Wolf
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bf8bb54c1a
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Merge pull request #1197 from nakengelhardt/handle-setrlimit-fail
smt: handle failure of setrlimit syscall
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2019-07-15 19:42:11 +02:00 |
Eddie Hung
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146451a767
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Merge remote-tracking branch 'origin/master' into xc7dsp
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2019-07-15 09:49:41 -07:00 |
Eddie Hung
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06f94c92d4
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Revert "Add log_checkpoint function and use it in opt_muxtree"
This reverts commit 0e6c83027f .
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2019-07-15 08:35:48 -07:00 |
N. Engelhardt
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ab4b9e8db4
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smt: handle failure of setrlimit syscall
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2019-07-15 23:33:18 +08:00 |
Eddie Hung
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78560aac86
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Revert "Fix first divergence in #1178"
This reverts commit 1122a2e067 .
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2019-07-15 08:31:26 -07:00 |
Eddie Hung
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7129a03083
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Merge branch 'master' into eddie/fix1178
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2019-07-15 08:23:01 -07:00 |
Clifford Wolf
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44fd459c79
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Redesign log_id_cache so that it doesn't keep IdString instances referenced, fixes #1178
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-07-15 17:10:42 +02:00 |
Clifford Wolf
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0e6c83027f
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Add log_checkpoint function and use it in opt_muxtree
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-07-15 12:12:21 +02:00 |
Eddie Hung
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a97d30d2f8
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Merge pull request #1194 from cr1901/miss-semi
Fix missing semicolon in Windows-specific code in aigerparse.cc.
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2019-07-14 13:36:34 -07:00 |
William D. Jones
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da5d64d71e
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Fix missing semicolon in Windows-specific code in aigerparse.cc.
Signed-off-by: William D. Jones <thor0505@comcast.net>
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2019-07-14 13:52:27 -04:00 |
Roman-Parise
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f7ab7a418c
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Updated FreeBSD dependencies in README.md
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2019-07-14 09:25:07 -07:00 |
whitequark
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2de7e92bb8
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opt_lut: make less chatty.
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2019-07-13 16:49:56 +00:00 |
Eddie Hung
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9b91d815b5
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If ConstEval fails do not log_abort() but return gracefully
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2019-07-13 04:13:57 -07:00 |
Eddie Hung
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ab3917d079
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Error out if enable > dbits
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2019-07-13 03:39:23 -07:00 |
Eddie Hung
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d032198fac
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ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT
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2019-07-13 01:11:00 -07:00 |
Eddie Hung
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fb062c3426
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Add comment
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2019-07-13 00:52:21 -07:00 |
Eddie Hung
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41243a53b3
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Update test with more accurate LUT mask
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2019-07-12 21:00:59 -07:00 |
Eddie Hung
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e9bdc86c0e
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duplicate -> clone
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2019-07-12 19:33:02 -07:00 |
Eddie Hung
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be0cb7f4b8
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More cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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7d583f9e57
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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83f23a24a8
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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1adbfb5533
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Cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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39a7c7c54c
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More cleanup
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2019-07-12 19:30:18 -07:00 |
Eddie Hung
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91c07be196
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Cleanup
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2019-07-12 19:30:18 -07:00 |