Commit Graph

595 Commits

Author SHA1 Message Date
Jean-Paul Chaput 2a900c4abb New CRL/helpers.technology.createVia() helpers method. 2020-11-25 21:52:05 +01:00
Jean-Paul Chaput 29b57e86e5 DRC correct on Arlet6505 / TSMC C180.
Integrate new features and bug fixes so the Arlet 6502 benchs successfully
passes real DRC with reference industrial tools. Short summary:
* Manage minimum area for VIAs in Katana::Tracks.
* Allow different wire width for wires perpandicular to the prefered
  routing direction.
* StackedVIAs used in the clock tree no longer assume an uniform
  routing grid (same offset & pitch all the way up).
* Some hard-coded patches in PowerRails for FlexLib.

* New: In CRL/symbolic/cmos/kite.py & cmos45/kite.py, update the
    RoutingLayerGauges by adding the new PWireWidth parameter.
    Always zero in case of symbolic layout (too fine tuning).
* New: In CRL::RoutingGauge, add accessor to PWireWidth parameter.
    Modify the clone method.
* New: In CRL::RoutingLayerGauge, add new parameter "PWireWidth"
    to give the width of a wire when it not drawn in the prefered
    routing direction. If it is set to zero, the normal width is
    used.
* New: In CRL::PyRoutingGauge, export the updated constructor
    interface. It is *not* backward compatible, one must add the
    PWireWidth parameter in the various kite.py configuration
    files (in etc/).
* Change: In AnabaticEngine::_gutAnabatic(), disable the minimum
    area detection mechanism, replaced by a more complete one in
    Katana::Track. Left commented out for now, but will be removed
    in the future.
* Change: In Anabatic::AutoContact::updateLayer(), now systematically
    calls setLayerAndWidth() to potentially resize the VIAs. This is
    needed in real mode as VIAs are *not* macro-generated but have
    their real final size.
* Change: In Anabatic::AutoContact::setLayerAndWidth(), select the
    width and height of the contact using the gauge wire width *and*
    perpandicular *wire width*.
* Change: In Anabatic::AutoSegment::_initialize(), the "VIA to same cap"
    to PWireWidth/2, this will be the size of the VIA in the
    non-preferred direction at the end cap (non-square in real mode).
* Change: In Anabatic::AutoSegment::getExtensionCap(), makes different
    cases for symbolic and real. Use raw length in real, add half the
    wire width in symbolic.
      Add a flag to get the extension cap *only*, not increased of
    half the minimal spacing.
* Change: In Anabatic::AutoSegment::bloatStackedStrap(), enhanced,
    but finally unused...
* New: In Anabatic::AutoSegment::create(), use the PWireWidth when
    the segment is not in the preferred routing direction (and of
    minimal width).
* New: In Anabatic::Configuration, add new getPWirewidth(),
     DPHorizontalWidth() and DPVerticalWidth() accessors.
* Change: In AnabaticEngine::setupPreRouteds(), skip components in
    in "cut" material. We are only interested in objects containing
    some metal (happens in real mode when VIAs cuts are really there).
* New: In Katana::PowerRailsPlanes::Rail::doLayout(), add an hard-coded
    patch that artificially enlarge the *wide wire* so the spacing for
    wide wire is enforced. For now, two pitches on each side for
    "FlexLib" gauge.
* New: In Katana::Track, add support to find and correct small wire
    chunks so they respect the minimum area rules.
      Two helper functions:
      * ::hasSameLayerTurn(), to find if a a TrackElement as non-zero length
        perpandicular is same layer connected to it.
      * ::toFoundryGrid(), to ensure that all coordinates will be on the
        foundry grid (may move in a more shared location).
      * ::expandToMinArea(), try to expand, *in the routing direction*
        the too small wire so it respect the minimal area. Check for the
	free space in the track.
    Track::minExpandArea() go through all the TrackElements in the track
    to look for too small ones and correct them.
* Change: In Katana::RoutingPlane, add an accessor to get the tracks.
* New: In KatanaEngine::finalizeLayout(), add a post-treatment to find
    for minimal area violations.
* Change: In cumulus/plugins.block.configuration.GaugeConf, add a
    routingBb attribute that will serve as a common reference to all
    the functions calculation track positions. We must not have two
    different reference for the core and the corona. The reference
    is always the corona when we working on a complete chip.
* New: In cumulus/plugins.block.configuration.GaugeConf.getTrack(),
    Simplified and more reliable way of getting tracks positions.
    Use the routingBb.
* New: In cumulus/plugins.block.configuration.GaugeConf.rpAccess(),
    Make use of getTrack() to get every metal strap on the right
    X/Y position.
* New: In cumulus/plugins.block.configuration.GaugeConf.expandMinArea(),
    As those wires are left alone by the router, it is our responsability
    to abide by the minimal area rule here. Hence the code duplication
    from the router (bad).
      Mainly wires made for the clock tree, I mean.
* Bug: In cumulus/plugins.chip.configuration.ChipConf.setupICore(),
    the core instance must be placed on the GCell grid, defined by the
    slice height (X *and* Y).
* Bug: In cumulus/plugins.chip.corona.Builder(), forgot to use bigvia
    for the corners of the inner ring.
* Bug: In cumulus/plugins.chip.pads.corona._createCoreWire(), hard-coded
    patch for LibreSOCIO, the power/ground connectors toward the core
    are too wide and can create DRC errors when put side by side.
    Shrink them by the minimal distance.
2020-11-23 23:07:15 +01:00
Staf Verhaegen b054045c0e Typo in python af.createLibrary() signature.
Small typo.
2020-11-15 11:10:11 +01:00
Jean-Paul Chaput bf0d1ef350 More accurate layout detection in CRL::GdsDriver.
* Bug: In CRL::GdsDriver::hasLayout(), a Cell was saved in the GDSII
    stream only if it has a layout, but the check was not accurate
    enough. In the Arlet6502, the whole core was missing.
      Now check for the abscence of Plugs (not unfinished Nets) and
    PLACED/FIXED instances.
2020-11-14 18:48:49 +01:00
Jean-Paul Chaput c6e5583233 Documentation cleanup & rebuild.
* Change: In documentation/build.py, more PEP8 & Python 3 future compliance.
    Correct copy of the tools HTML docs on my laptop, to have a full
    offline copy of the doc.
* New: In documentation/contents/pages/check-toolkit, duplicate the doc
    from alliance-check-toolkit README. Seems it has been inadvertently
    removed at some point (?). Have to be careful to maintain in synch
    with the toolkit.
* Change: <tool>/doc/*/SoC.css, use Roboto fonts when availables.
* Update: Commit the whole pre-generated docs (Doxygen, Pelican).
2020-11-12 14:22:31 +01:00
Jean-Paul Chaput d05539378c Fix rounding error in GDSII driver.
* Bug: In CRL/GdsStream::toGdsDbu(), when converting a physical number,
    in double to a number of GDSII dbu in int32_t, we must not use the
    direct cast int32_t(v) because v can be 2.9999999999 which got
    simply truncated into 2 while we want 3. So now use the rounding
    function std::lrint() and configure it round to the *nearest*
    integer.
       Note that we don't check that the long returned can correctly
    fit into int32_t.
2020-11-12 01:18:47 +01:00
Jean-Paul Chaput f8a9dd9f71 Update cmos45 for use with FlexLib I/O symbolic abstracts. 2020-11-02 17:18:40 +01:00
Jean-Paul Chaput 04e9b56102 Try some new colors for the abutment box drawing (again). 2020-10-25 12:06:41 +01:00
Jean-Paul Chaput aadd7744ee Small typo in GDS driver Python wrapper error message. 2020-10-25 11:43:41 +01:00
Jean-Paul Chaput 81522e73a2 New technology helpers createBL & setEnclosures. 2020-10-25 11:42:25 +01:00
Jean-Paul Chaput 25cbb6b3c9 Try some new colors for the abutment box drawing. 2020-10-25 11:39:44 +01:00
Jean-Paul Chaput 0217ca1f26 Force VST driver to clear all Vhdl properties after running.
* Change: In CRL::vstDriver(), remove all Vhdl properties after running.
    The properties are not updated if the cell (Entity) change, so the
    next time it is called, an incomplete or incoherent state was saved
    (for example, incomplete "port map"). Removing all properties is
    less efficient but works.
* Cleanup: In CRL/helpers/overlay, remove forgotten debug message.
2020-10-23 22:26:50 +02:00
Jean-Paul Chaput 6bc8751879 Change the type of parameters for Etesian from Percentage to Double.
* Change: In CRL/etc/common/etesian.py, use double parameters
    instead of percentages to simplify. For space margin and form
    factor. This need the rewrite of coriolis2/settings.py in
    alliance-check-toolkit.
2020-10-18 23:17:00 +02:00
Jean-Paul Chaput 04098a4655 Bug in overlay.CfgCache, values were never set!
* Bug: In CRL/helpers/overlay.CachedParameter.cacheRead(), values where
    not read *from* the Configuration DB, due to a forgotten "self.".
      In CRL/helpers/overlay.CfgCache.__setattr__(), value was simply
    never set! Only interval and set of values were manageds!
      In CRL/helpers/overlay.CfgCache.__getattr__(), must distinguish
    between two access cases, when were are truly accessing a
    CachedParameter, return it's *value*. Otherwise, it is a
    recursive CfgCache, then return the object.
2020-10-18 23:16:22 +02:00
Jean-Paul Chaput 158d8c717d Add ability to add non-symbolic library in AllianceFramework.
* New: In CRL::AllianceFramework::wrapLibrary(), can now add in the set
    of AllianceLibrary one which is wrapped around another one. All the
    cells must be already present and do attempt to save them with
    AllianceFramework (AP parser will drive nonsensical datas).
2020-10-16 11:25:57 +02:00
Jean-Paul Chaput 23f9ea052c Improved CRL/helpers.overlay.CfgCache, setting of secondary values.
* New: In CRL/helpers.overlay.CfgCache, create a class to fully handle
    all the Configuration parameters settings. That is, range and
    enumerated values. This way we can fully create them from
    the CfgCache instead of merely changing the value of an
    existing one.
      Examples:
        cfg.anabatic.gcell.displayMode  = 1
        cfg.anabatic.gcell.displayMode  = ( ("Boundary", 1), ("Density", 2) )
        cfg.katana.hTracksReservedLocal = 4
        cfg.katana.hTracksReservedLocal = [ 0, 20 ]
2020-10-16 11:20:38 +02:00
Jean-Paul Chaput c9f73d1f3d Slightly more explicit error message in the Blif parser.
* Change: In CRL::Blif, when a Blif connector do not exists in the
    Hurricane instance (Plug / External master net), issue a more
    informative message.
2020-10-16 11:11:37 +02:00
Jean-Paul Chaput 51c6b90160 Added property managment in @classdecorator. Unused :-( ... 2020-10-14 15:06:42 +02:00
Jean-Paul Chaput 513bc72541 Port & integration of core2chip into alpha/block.
* New: In CRL/helpers/utils.py, create a Python "class decorator".
    Works like a decorator but without the need of implementing
    the Concrete/Abstract classes structure Design Pattern.
      Create proxies in the derived class for the base class
    attributes & methods.
* Change: In cumulus/plugins/alpha/block/configuration.py, enrich
    the BlockState object to support core2chip parameters. Make it
    even more autonomous from the Block class.
* New: In cumulus/plugins/alpha/core2chip, port of the core2chip plugin
    and integration with the alphs/block plugin. At "constant features"
    as a first. Only ported "cmos", phlib will be later.
2020-10-07 15:07:16 +02:00
Jean-Paul Chaput 9d56066c2d Allow consecutives '_' in VST identifiers. Replace '/' by '_'. 2020-09-30 17:15:14 +02:00
Jean-Paul Chaput 3495536268 Third variant for HFNS, trunks mades with Steiner tree (FLUTE).
Note: Keep the various hfnsX.py as toolboxes for future experiments.
* New: cumulus/plugins/block/hfns3.py, build the trunk of the
    net as a RMST. First with the "Iterative One Steiner Point"
    (terribly slow above 100 points) then with FLUTE.
      For the global routing trunk, must be very cautious to
    check that the cluster "graph point" is the one of the
    it's buffer RoutingPad so both end up in the same GCell.
* New: cumulus/plugins/block/timing.py, stub for basic
    timing computation and conversion between sink and
    capacitance. Currently based on the fake 350nm given as
    example in SxLib ("man sxlib"...).
2020-09-30 11:59:51 +02:00
Jean-Paul Chaput 8f0a8e5a3a Added support for loading user defined global routing in Anabatic.
* New: In Hurricane::NetRoutingProperty, add and change the meaning
    of the following flags:
      - ManualGlobalRoute : now means that a global routing *trunk*
        is present, made of "gmetalh", "gmetalv" & "gcontact".
      - Manualdetailroute : added, get the former meaning of
        ManualGlobalRoute, that is, the detailed routing is
	already present for this net, but can be changed by the
	detailed router. Implies that it respect the Terminal,
	HTee & VTee structuration.
* New: Add Anabatic::Diskstra::loadFixedGlobal(), to account
    a manually global net into the edges capacities.
* New: In Anabatic::Edges::ripup(), exclude manually global routed
    segments from the ripup. Change the segment sorting function
    so that thoses segments are put in head of list (considered
    as "smaller").
* Change: In AnabaticEngine::setupPreRouteds(), now detect manual
    global routed and manual detail routed signals, and tag them
    accordingly.
* New: In AnabaticEngine::Configuration & Session, add proxies
    for the global routing layers ("gmetalh", "gmetalv", "gcontact").
* New: In Anabatic::Constants, add flags for global fixed and
    detail routed nets.
* Change: In KatanaEngine::updateEstimateDensity(), now use int64_t
    for flute coordinates.
* New: Add CRL::RoutingGauge::hasLayer(), to know if a layer is
    managed by the gauge (comparison by mask).
2020-09-30 11:55:39 +02:00
Jean-Paul Chaput f249fe1efe Forgotten default parameter value for "katana.useGlobalEstimate". 2020-09-14 15:01:58 +02:00
Jean-Paul Chaput 083e58d953 Add CRL::Catalog and Net::getRoutingPads() to the Python interface.
* New: In CRL::PyAllianceFramework, export getCatalog(), in PyCatalog,
    export the getState(name) method and add a PyCatalog_Link().
    In PyCatalogState, add PyCatalogState_Link(), cannot use the
    macro because of the C++ name resolution operator (Catalog::State).
* New: In Isobar, export the RoutingPads collection to the Python interface.
* New: In Hurricane::Net, export the getRoutingPads() method to the
    Python interface (hence the need of the previous export).
2020-08-21 16:00:50 +02:00
Jean-Paul Chaput 51e3639687 Added multiple clock support in cumulus/plugins/alpha/block.
* New: Added multiple clock support in H-Tree generation in alpha/block.
* New: In CRL/etc/<NODE>/<TECH>/plugins.py, added three new parameters
    for block plugin config:
      "block.spareSide" : The size of the minimum side of a buffered area.
                          (quad-tree leaf).
      "spare.buffer"    : The model of the cell buffer to be used.
      "spare.maxSinks"  : max number of sinks on a buffer before issuing
                          a warning (non-blocking).
* Bug: In Etesian::BloatCell::getAb(), never apply the bloat profile to
    fixed cells. In case of buffers from the spare maxtrix it was leading
    Coloquinte to detect an overlap of fixed cells, which it do not
    support (rightly so).
2020-08-11 14:49:07 +02:00
Jean-Paul Chaput 38375fd9ae Export isCLOCK() in AllianceFramework Python interface. 2020-08-11 14:47:44 +02:00
Jean-Paul Chaput fa062daa99 Tweaks in CRL/helpers Trace & CfgCache.
* Change: In CRL/helpers.Trace, flush stderr before issuing the trace
    message to avoid mixing up stdout & stderr (sometimes misleading).
* Change: In CRL/helpers.overlay.CfgCache, no longer display all the
    applied setting after a call to apply(). Too verbose.
2020-08-11 14:47:03 +02:00
Jean-Paul Chaput fa15331793 Simpler allocation of regex in CRL::Environment.
* Change: In CRL::Environment, regex_t are now pointers instead of values,
    this way the "in initialization" flag can be removed (maybe still too
    complicated).
2020-08-11 14:46:31 +02:00
Jean-Paul Chaput 78b7e683e5 Add a context manager to helpers.overlay.CfgCache.
* New: In CRL/helpers.overlay.CfgCache, add support for context manager,
    so we can progressively remove the use of Configuration. One class
    to use in all contexts (immedaite setting or storing a set of
    Cfg parameters).
2020-08-05 01:26:16 +02:00
Jean-Paul Chaput de6308d8d4 Bug fix: ApDriver was not saving "blockageX" layers.
* Bug: In CRL/ApDriver/toMbkLayer(), add translation entries for
    converting "real" blockage layers. So they don't get ignoreds...
2020-08-02 18:09:46 +02:00
Jean-Paul Chaput 1e3788d93e New Python class helpers.overlay.CfgCache.
* New: In CRL/helpers/overlay.py, CfgCache class to hold a set of
    configuration parameters and apply it on demand. It has a
    different behavior than Configuration.
2020-08-02 18:09:02 +02:00
Jean-Paul Chaput 17ecfd823b Enhanced techno rule support. Inspector support bug fix.
* Bug: In Hurricane/Commons.h, modify the getRecord<>() templates so
    that for both vector<Element> and vector<Element*>, the individual
    record created for each element are donne with pointers. That is,
    for the vector<Element> case, we take a pointer.
      As a general policy, except for the POD types, always use pointers
    or references to data in the records/inspector. Never uses values
    that can call the copy constructor.
      Suppress INSPECTOR_PV_SUPPORT() macro, keep only
    INSPECTOR_PR_SUPPORT().
      Provide value support only for getString<>() template.
      This value & copy constructor problem was causing a crash when
    trying to inspect Hurricane::AnalogCellExtension.
* New: In Hurricane::Technology, change the API of the PhysicalRule,
    now we can only create/get PhysicalRule, but setting the value of
    the rule itself must be done on the rule.
      Enhance PhysicalRule to provide for stepped rules, non isotropic
    and ratio rules.
      Merge TwoLayersPhysicalrule in PhysicalRule, much simpler to
    suppress the management of derived classes. That means that we
    loose a little memory as some fields are mutually exclusive.
    Not a problem considering that there will not be so many of thoses
    objects.
* New: In CRL/helpers.analogtechno.py, enhanced DTR support for rules
    like:
      ('minSpacing'  , 'metal1', ((0.4,20.0), (0.8,1000.0)), Length, 'REF.1')
      ('minEnclosure', 'metal1', 'cut1', (0.2,0.3)         , Length, 'REF.2')
      ('minDensity'  , 'metal1', 0.30                      , Unit  , 'REF.3')
      The DTR parser has been updated, but not the oroshi.dtr Rule
    cache for analog components. Given a rule name, the value used
    will be the horizontal one of the first step.
* Change: In hurricane/doc/hurricane, re-generate the documentation
    with updated support for Technology & PhysicalRule.
2020-07-21 11:22:04 +02:00
Jean-Paul Chaput 34c1795630 Support for long in CRL/overlay.Configuration.__setattr__(). 2020-07-14 19:55:20 +02:00
Jean-Paul Chaput 960e0cda18 In CRL::NamingScheme::vlogTovhdl(), remove '%' invalid VHDL character. 2020-07-14 19:53:34 +02:00
Jean-Paul Chaput e4041d5e26 Improved Hurricane/Python database reset.
* Change: In CRL/helpers/__init__.py, to ensure a complete restart of
    the database the __init__.py must be called again, but it's not the
    case with reload() (see Python doc). So helpers.resetCoriolis()
    must explicitly removes the Coriolis related Python modules from
    sys.modules (calling "del sys.modules[moduleName]").
      That list of Coriolis Python modules is built by calling
    helpers.tagConfModules(), it will tag all modules added to
    sys.modules since startup. It will remove (much) more than
    Coriolis modules, but that should be ok.
* Change: In CRL/etc/{node*,symbolic}/TECH/__init__.py, add a call to
    helpers.tagConfModules() for the techno modules to be erased on
    reset.
2020-07-14 19:49:54 +02:00
Jean-Paul Chaput b48f9b40b8 Fixes bad VHDL port map assignment for vectors in VST driver.
* Bug: In CRL/Vhdl::VectorPortMap::toVhdlPortMap(), two problems:
    1. Bad condition for the use of VstUseConcat. Must be used *only*
       when there is more than *one* mapped name.
    2. Missing case, when there is exactly *one* mapped name, that
       means that we have one full width vector to vector assignement.
       There may be another weakness here, for the portmap we assumes
       that both vector are mapped in the *same* direction (which is
       "downto" by our convention).
    3. In the "bit by bit mapping case" (every bits of the vector are
       differents bits), use the "signal + bit index" name instead of
       juste the signal name (i.e. full width).
    Solves the Libre-SOC/soclayout/experiment6/fpmul64 problem, now
    we can avoid the YOSYS_FLATTEN.
2020-06-26 17:13:18 +02:00
Jean-Paul Chaput b23f620c5d The VST driver may suppress linkage type.
* Change: In Vhdl:::Signal::toVhdlPort(), in Alliance VST signal with
    undefined directions are typed "linkage". This may not be compatible
    with vasy, so allow to replace them by "in".
* New: In CRL::Catalog::State, add a new flag VstNoLinkage to tell if
   the VST driver should not use the "linkage" type.
* Change: In Vhdl::Entity, add a VstNoLinkage flag to disable the use
    of the "linkage" type.
2020-06-24 23:27:21 +02:00
Jean-Paul Chaput 9c082230b5 Add forgotten asDouble() method to the Parameter interface.
* New: In vlsisapd/PyConfiguration, add asDouble() to the Parameter
    Python wrapper.
* New: In CRLCore/helpers/overlay, add support for float parameters
    in configuratuon.
2020-06-16 21:33:33 +02:00
Jean-Paul Chaput 09192ba084 Bug fix, check for unconnected signals in CRL::VectorPortMap::toVhdlportMap().
* Bug: In CRL::VectorPortmap::toVhdlPortMap(), unconnected bits where
    correctly checkeds for multi-bits vectors (both ordered and holed),
    but not for mono-bits connections (ONE bit of a vector).
2020-06-09 14:08:08 +02:00
Jean-Paul Chaput 5d891b2cd8 The VST driver is now allowed to preserve the case of identifiers.
* New: In CRL::NamingScheme, add a flag VstNoLowerCase, and its
    management it in the Verilog to VHDL converter.
* Change: In CRL::BlifParser::Model::toVhdlModels(), disable the
    lowercasing of identifiers. We shouldn't apply Alliance VHDL
    subset constraits when reading blif files. So we will see
    uppercase identifiers in Coriolis.
* Change: In CRL::VstParser, no longer lowercase identifiers that
    are *not* VHDL keywords. Uppercases are legals in VHDL...
* New: In CRL::Catalog::State, add a new flag VstNoLowerCase to
    tell if the VST driver should keep the uppercases.
* Change: In CRL::VhdlEntity, add a VstNolowerCase flag to disable
    the lowercasing.
* Change: In CRL::vstDriver, lower case the file name if needed.
    remove the previously opened filename if it differs from the
    lowercased one.
* Change: In UnicornGui CTOR, disable VHDL enforcement for the
    Blif parser.
2020-06-08 13:34:25 +02:00
Jean-Paul Chaput 7b1dab7742 Generate only one/zero cell in Blif parser.
* Change: In CRL::BlifParser, formerly, a zero/one cell was added for
    each vss/vdd direct connection, generating a huge flock of cells.
    Now only generate one per netlist.
      It can be discussed whether to old behavior is more desirable,
    it is a compromise between wire and area.
2020-06-06 12:13:29 +02:00
Jean-Paul Chaput ac04466090 Automatically try to load the layout of Terminal Cells.
* Change: In CRL::AllianceFramework::getCell(), if the Cell is marked
    as TerminalNetlist, then it may be a standard cell. So it's layout
    must be loaded. So now, systematically try to load the layout of
    netlist terminal cells.
2020-06-06 12:13:05 +02:00
Jean-Paul Chaput bd4ace7cc8 Full update of the generated documentation. 2020-04-27 14:14:03 +02:00
Jean-Paul Chaput 3dbaea6aca Bug fix, restore the FreePDK 45 (real) support.
* Change: In CRL::LefParser::_macroCbk(), create a Catalog entry for the
    newly read MACRO (that is Cell) and sets the Logical, Physical,
    InMemory and TerminalNetlist flags.
* Bug: In CRL::LefParser::_siteCbk(), check for NULL cell gauge.
* New: In CRL::AllianceFramework, add setCellGauge(), to set the default
    cell gauge. Exported to Python.
* Change: In CRL/etc/common/technology.py, create variables for VIA
    layers, so we can modify their properties afterwards.
* New: In CRL/etc/node45/freepdk45, port the configuration files to the
    new Python "importable" format.
      Note: in kite.py, all the gauges (Routing & Cells) must be named
    "LEF.CoreSite" to please my LEF parser, so it can match the gauge
    name with the SITE name for standard cells.
* Bug: In Anabatic::NetBuilderVH::_do_2G(), forgotten to be reimplemented
    from the base class. Simply redirect to _do_xG().
* Change: In Katana::PowerRailsPlanes::PowerRailsplanes(), create plane
    from the layers in the RoutingGauge and their associated blockages
    instead of sweeping through all the basic layers.
      Allow to distinguish bewteen "METAL" (symbolic) and "metal" (real).
2020-04-27 10:34:19 +02:00
Jean-Paul Chaput a4acb22e3c Bug fix, make the AP parser reentrant (NO static variables).
* Bug: In CRL::ApParser::_parseInstance(), the instance coordinates where
    stored in *static* variables (boo). Making the parser *not* reentrant.
    But in _parseInstance(), it can be recursively called through
    getCell() when an sub-instance layout was missing.
      Also make non-static all other variables in the various parser
    function.
2020-04-21 15:39:35 +02:00
Jean-Paul Chaput 010d9a3782 Clean policy of netlist (vst) and layout (ap) views recursive loading.
* Bug: In CRL::VstParserGrammar & VstParserScanner, when loading the
    instances models, we where loading both logical & physical views.
    This was causing cases of reentrency of the parser, with reset
    of the lexer static dictionary, leading to memory corruption.
      Now the identifiers are stored in the YaccState of each
    parsed cell and we only recursively call for the logical view.
* Change: In CRL::ApParser::_parseInstance(), recursively load the
    physical views as they are no longer loaded by the Vst parser.
* Change: In CRL::AllianceFramework::getCell(), sets the
    TerminalNetlist flag from the state (mode 'C' in CATAL) onto
    the cell.
* Change: In EtesianEngine::loadLeafcelllayouts(), new functions to
    load the layouts of the leaf cells if only the netlist has been
    loaded.
2020-04-17 11:28:47 +02:00
Jean-Paul Chaput 5a4d23f8fd Fix bad direction for segments in ApDriver.
* Bug: In CRL::ApDriver::DumpSegments(), reset the direction field to
    NULL between iterations so it is recomputed for each component and
    not keeping the first one ever guessed.
2020-04-15 10:42:38 +02:00
Jean-Paul Chaput a50b6ce317 More PEP8 compliant Python code. Start rewrite Python/C++ wrappers.
* Change: In CRL/helpers, cumulus/plugins, oroshi & karakaze,
    Move towards more Python PEP8 compliance:
      * All indentations sets to 4 spaces (in progress).
      * In plugins, remove messages about software collections
        and RHEL (too many case could wrongly lead to that).
	Instead systematically uses "helpers.io.catch()".
      * Put in lowercases all modules names. Note that C++ exported
        modules *keep* their Capitalized names (to preserve the
	identity with the C++ namespace).
      * When making import, use full path.
      * Rename the run function from "ScriptMain()" to "scriptMain()".
* Cleanup: In CRL/etc, remove obsoleted configuration files,
    the one ending in ".conf". Keep those who have not been ported
    to the new style yet.
* New: In Hurricane/src/configuration, first trial at replacing the
    C preprocessor macros by C++ templates. Applied first to configuration
    from VLSISAPD.
      This is unfinished business, just a limited demonstrator for now.
      It is installed as a separate Python library "Cfg2" which do not
    interact with the rest of Coriiolis.
      The end goal is to fully remove boost and merge VLSISAPD useful
    components directly inside Hurricane.
2020-04-08 11:24:42 +02:00
Jean-Paul Chaput e9ce33a857 Resistor integration.
* New: In Isobar::PyResistor, manage type RPOLYH and RPOLY2PH.
* Change: In Hurricane::Resistor, rename plate nets from "PIN1" and
    "PIN2" into "t1" and "t2" (try to respect uniform naming scheme).
* New: In Karakaze/AnalogDesign.py, support for reading Resistor
    parameters.
* New: In Orosshi, ResistorSnake.py imported from Mariam Tlili's work
    and associated Resistor.py to make parameter conversion.
      Currently we only uses vertical layout for resistors.
      Added METAL2 horizontal terminals for resistors.
2020-03-30 12:40:29 +02:00
Jean-Paul Chaput 2fa8016eaa Make Pin terminals really punctuals (bug shown in nmigen/ALU16). 2020-03-20 18:55:38 +01:00
Jean-Paul Chaput 2af531991e Correct drive of the Pin in AP driver.
* Bug: In CRL::ApDriver::DumpSegments(), when saving RoutingPads build
    on Pin *not* at the top level (that is, Pin from an instance),
    use the pin's orientation to choose the segment type.
      * NORTH/SOUTH becomes a Vertical.
      * EAST/WEST becomes an Horizontal.
      Formerly, the segment direction was guessed only for the bounding
    box, leading to segments in incorrect directions leading to DRC
    errors (in nmigen/ALU16, net "b(10)").
* Bug: In CRL/symbolic/cmos/technology.py, forgotten import for
    WarningMessage.
2020-03-20 12:05:12 +01:00
Jean-Paul Chaput 837de500aa Compliance with Debian 10 Buster.
* Change: In all tools, FindTOOL.cmake, no longer use LIB_SUFFIX to
    search for tool libraries but try "lib64/" then "lib/".
* Change: In bootstrap/socInstaller.py, take Debian 10 into account.
* Change: In bootstrap/docker, move from Debian 9 to Debian 10.
2020-03-19 18:18:35 +01:00
Jean-Paul Chaput dfe4d80b60 Clarify semantic of flatten Collections (walkthrough).
In the Cell/Instance hierarchy, the "terminal" and "leaf cell" concepts
where not clearly defined and partially overlapping. Now, "Terminal" is
the refer to the physical hierarchy (layout) and "TerminalNetlist" to
the logical hierarchy (netlist). The logical hierarchy can be less deep
than the physical one thanks to a Cell dedicated cell flags. Collections
related to the physical hierarchy keep their old names, the one related
to the logical hierarchy are renamed from "Leaf" to "TerminalNetlist".
The name "Leaf" was too ambiguous (leaf for *what* hierarchy).

* Change: In Hurricane::Device, set the "TerminalNetlist" flag once and
    for all. No need set it in all the derived classes again.
* New: In Hurricane::MultiCapacitor, added new parameter "dummy" to
    create dummies around the capacity matrix.
* Change: In Hurricane::Cell, remove "Leaf" related methods, replace
    them by "TerminalNetlist" one, especially Collections. Now we have
    two clear sets of Collections to walkthough the layout or the
    netlist.
      Change the "Terminal" flag into "TerminalNetlist".
* Change: In Hurricane::CellCollections, rename "Leaf" into
    "TerminalNetlist" collections and apply the new semantic to the
    locators.
* Change: In Hurricane::DataBase, Leaf to TerminalInstance renaming.
* Change: In Hurricane::DeepNet, Leaf to TerminalInstance renaming.
* Change: In Hurricane::HyperNet, Leaf to TerminalInstance renaming.
* Change: In Hurricane::Instance, Leaf to TerminalInstance renaming.
* Change: In Hurricane::Viewer::HierarchyInformations, Leaf to
    TerminalInstance renaming.
* Change: In CRL::AllianceFramework, Leaf to TerminalInstance renaming.
* Change: In CRL::Catalog, Leaf to TerminalInstance renaming.
* Change: In CRL::ApParser, Leaf to TerminalInstance renaming.
* Change: In EtesianEngine::AddFeeds, Leaf to TerminalInstance renaming.
* Bug: In EtesianEngine::resetPlacement, move there the loop over
    non terminal netlist instances to flag fully placed sub-blocks
    as terminal for the netlist. Only then remove the feed cells
    from unplaced instances. Previously, the feed cells where stripped
    even from already placed instances.
* Change: In Katana, Leaf to TerminalInstance renaming.
* Bug: In Bora::PyDSlicingNode, allow the range parameter to be the
    Python None object when we do not want to pass one but need to
    have it as positional parameter.
* Change: In Cumulus/clocktree/ClockTree.py, Leaf to TerminalInstance
    renaming.
2020-03-10 12:10:53 +01:00
Jean-Paul Chaput 757b95343b Support for full Database clear & restart.
* New: In CRL/etc/node600/phenitec, ported configuration of Phenitec 0.6um
    Compliant with DataBase reset.
* New: In CRL/python/helpers, added function "unloadUserSettings()" to
    unload Python modules prior to a full reset.
      Added "resetCoriolis()" to perform full DataBase reset.
* Change: In CRL::AllianceFramework, make it a derived class of DBo so
    the destroy() is now provided.
* Bug: In CRL::AllianceFramework::getCell(), do not attempt any load if
    the library list is empty. Should never occur except in case of a
    botched databse reset.
* New: In CRL::AllianceFramework, new method "saveCATAL()" to write back
    the catalog of a library and "saveCells()" to write back the cells.
      Note: only cells actually loaded in memory will be write back.
* New: In CRL::Catalog, add method "saveToFile()" to write back the CATAL
    of a library.
* Change: In CRL::ParserDriver, replace "const string&" by "string"
    (improved string support of the GNU STL).
* Change: In CRL::ParserSlot, use string instead of Name.
* Change: In CRL::ApParser, make _layerInformation an ordinary attribute
    instead of a static one. This allow for it's correct resetting
    across databas resets.
* Change: In CRL::VstParserGrammar, reinitialize Vst::framework at each
    parser call. Needed to support database reset.

* New: In Hurricane::DBo, add an object counter to be sure that when
    we perform a reset, no remaining DBo is allocated. This is different
    of the object id which is ever increasing.
      Note that, at reset, we check against "1" remaining element as at
    this point only Database is still allocated.
      Add a new "resetId()" method. MUST NEVER BE CALLED except by
    DataBase::_preDestroy().
* New: In Hurricane::Database, new clear() method to remove the Cells
    of all the libraries in reverse hierarchical depth order.
    Make use of the new CellsSort class.
* Change: In Hurricane::DataBase::_preDestroy(), call "clear()" and
    DBo::resetId().
* Change: In Hurricane::Breakpoint, change the default callback to be
    a static function. So we can restore it later.
* Bug: In Hurricane::Instance::_preDestroy(), there was yet another
    loop of deletion over a collection for the shared pathes.
      Replace it by the repetitive deletion of the first element.
* Bug: In Hurricane::Net::_preDestroy(), RoutingPads must be destroyed
    prior to any other component.
* New: In Hurricane::ColorScale, add a "qtFree()" method for freeing
    the Qt Brush, Pen & Color.
* New: In Hurricane::DrawingStyle, add a "qtFree()" method for freeing
    the Qt Brush, Pen & Color.
* New: In Hurricane::Graphics, add a "disable()" method to call the
    various "qtFree()" of the sub-objects.
2020-02-29 16:55:14 +01:00
Jean-Paul Chaput eab4a4aa7f In BlifParser, correct management of alias to $true/$false for terminals.
* Bug: In CRL/BlifParser::Model::mergeAlias(), when a signal is aliased
    toward $true or $false in a Blif file (through a ".name" statement),
    it was directly merged to "vdd" (resp. "vss"), and if it is an
    external signal, this leads to its removal, potentially making "hole"
    in its interface.
      Now, create a gate zero or one for each tied up/low signal. This
    way the interface is fully kept. At the cost of some supplemental
    gates.
2020-02-24 18:58:48 +01:00
Jean-Paul Chaput 0dc98dfce3 Migrating doc from Sphinx towards Pelican.
* Change: In documentation, now generate the overall documentation using
    Pelican instead of Sphinx. This allows to have an unified approach
    between the coriolis.lip6.fr website and the local documentation.
      So we keep using "only" two doc generators: doxygen & Pelican.
2020-02-03 17:44:15 +01:00
Jean-Paul Chaput eea67a9111 Added static bloat profile in Katana.
* Change: In bootstrap/FindBoostrap.cmake, remove the -fsanitize=address
    as it requires the "san" librarie which may be difficult to install.
* Change: In CRL/symbolic/cmos45/kite.py, decrease the METAL3 pitch from
    10l to 8l. This is for testing with 4 routing metal only technology
    like AMS c35b4 symbolic.
* Change: In Katana/BloatProfile, add static bloat option, that is, only
    cell bloated in the first pass will be bloated again in subsequent
    ones.
      Add a "katana.bloatOverloadAdd" parameter to more easily control the
    amount added to the computed overload.
* Change: In Oroshi, start integration of multi capacitors as generator.
    Translate generator parameter into CapacitorStack ones. Add code for
    routing unit capacitor.
2020-01-23 14:03:59 +01:00
Jean-Paul Chaput e711ce8dd2 More configuration parameters for P&R Conductor, for experimenting.
* Change: In Hurricane::Viewer::ExceptionWidget & CRL/python/helpers/io.py,
    downscale icons for non-HiDPI screen.
* Change: In CRL/etc/common/display.py, change the display threshold of
    METAL1 layer so it do not appear at high scaling.
* New: In Etesian, activate the "setFixedAbHeight()" feature and export it
    to Python. Allows to increase the space margin at constant height.
      To be used by the P&R conductor.
* Change: In Unicorn/cgt.py, when running a script, insert the current
    working directory at head of the sys.path, not at the end. So installed
    modules do not shadow local one.
* New: In Anabatic::Edge, new accessor "getRawcapacity()" to know the full
    capacity of the edge, that is, the real maximum number of tracks that
    can go through the associated side.
* Change: In Katana/BloatProfile/Slice::tagsOverloaded(), bloating policy
    change, now bloat all the instances under the GCell, not only the first
    one.
* Change: In KatanaEngine::runGlobalRouter(), restore the search halo growth
    policy to expanding of 3 GCells every 3 iterations.
      New metrics displayed, the edge wire length length overload.
* Change: In cumulus/plugins/ConductorPlugin.py, now accepts the following
    configuration parameters:
      - "anabatic.globalIterationsEstimate", maximum number of global
        iterations during the bloating computation passes.
      - "conductor.useFixedAbHeight", tells wether the additionnal blank
        space must be added so the aspect ratio is kept or the height is
	kept (and the block become wider).
    Disable the display of "rubber" to unclutter a little the view.
2019-12-15 19:28:54 +01:00
Jean-Paul Chaput 9812f2fc3a Corrections to build under MacOS X. 2019-12-11 22:13:47 +01:00
Jean-Paul Chaput 68e45bc5ab Groudwork for routing density driven placement. Compliance with clang 5.0.1.
This commit contains two set of features that should have been commited
separately.
  1. Compliance with clang 5.0.1, tested with the RedHat collection
     llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
     with Xcode & macports. The bootstrap install system has been modificated
     accordingly.
  2. The basic support for routing density driven placement. Related
     features are:
     * Bloat property. Each Occurrence of an Instance can be individually
       bloated. This property not attached to any tool to allow the placer and
       router to share it as wanted. Nevertheless, it is defined in Etesian.
     * BloatProfile in Katana, add individual Bloat properties to Instances
       occurrences based on the East & North overflowed edges of each GCell.
     * Support in ToolEngine for a "pass number" of a tool. This pass number
       is mainly used to make "per pass" measurements. The MeasureSet system
       is improved accordingly to support multiple values of a same measure.
     * Embryo of "P&R Conductor" to perform the place & route loop until the
       design is successfully placed. May be the first brick of a Silicon
       Compiler.

* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
    the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
    instance occurrence BloatProperty dependency.
      Added option support for the "llvm-toolset-7" collection to build
    against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
    for first & second arguments must be called with <const T> and <const U>
    as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
    not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
    template has a static member "_name". Clang did show that the template
    for this static number has to be put inside the namespace where the
    template *is defined* (i.e. Hurricane) instead of the namespace where
    it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
    be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
    (clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
    signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
    (clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
    Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
    current working directory in the sys.path as in certain configuration
    it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
    encountering a RoutingPad on a top-level Pin Occurrence. The segment
    was generated in the wrong direction, creating DRC violations on the
    "mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
    Now, each kind of measure can accept multiple values put in a vector.
    The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
    indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
    addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
    name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
    that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
    was wrong, it was always returning true, which broke the "strick weak
    ordering" of the comparison.
      This was producing a core-dump in GCell::updateDensity() when sorting
    a vector<>. The end() iterator was being dereferenced, leading to the
    problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
    whose axis is perpandicular to the symmetry axis was wrong
    ("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
    and selectBloatedInstances() to automatically select segments from
    overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
    between global and detailed.
      Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
    driven placement.
2019-12-09 01:57:44 +01:00
Jean-Paul Chaput f38945d200 Various bug fixes (Selection, Measures/Histogram, helpers).
* Bug: In CRL/python/helpers/__init__.py, in textPythonTrace(), when an
    ErrorMessage was catched, the trace parameter was not correctly
    extracted leading to an "exception in exception".
* New: In Isobar/PyCell, exported Cell::getNonLeafInstanceOccurrences()
    collection.
* New: In Isobar/PyTransformation, type is now built so the tp_compare
    is linked to the C++ operator==().
* Change: In Hurricane::SelectionModel, Hurricane::SelectionWidget and
    CellWidget, no longer use Occurrences but directly the Selector property.
      We also use the Selector to know if an Occurrence is selected by
    looking at that property on it's Quark. This avoid a very lengthy
    search in vector when there is many elements (say > 10000).
      NOTE: This is a bad implementation as there is a confusion between
    beeing selected (that is, having a Selector property attached to
    an Occurrence Quark) and being actually displayed as selected.
    This lead to awkward implatation of the various "toggle" methods.
    Have to rethink that more clearly later.
* Bug: In CRL::Histogram, the non-inline template full specialisation
    of Measure<Histogram> must not be put in the header but in the module
    to avoid multiple definition and link failure. They are actually
    real, classic functions.
2019-11-22 00:24:47 +01:00
Jean-Paul Chaput 39cd831a57 Added message when loading the technology/configuration files.
* New: In CRL/python/helpers.io, vprint() wrapper around print to display
    messages according to the verbose level.
      In etc/*, add messages in every configuration files so we may know
    under which we are running.
2019-11-15 14:40:59 +01:00
Jean-Paul Chaput 92edd9ba31 New implementation for the Python hash and compare methods.
* Change: In Hurricane::Isobar/PyHurricane.h, make the hash function use
    the DBo id whenever possible instead of the object pointer, fall back
    to it for standalone objects (Box like one). The DirectHashMethod()
    macro generate a C style function (linkage) which call a template
    function "getPyHash<>()" that uses a SFINAE mechanism to select
    the right variant.
      Create two comparison macros DirectCmpByPtrMethod() and
    DirectCmpByValueMethod() to customize the comparison for objects that
    have C++ operator==(). So now two boxes with the same contents will
    be seen equal by Python. For DBo objects we keep the previous
    comparison by C++ pointer.
2019-11-14 23:56:01 +01:00
Jean-Paul Chaput f130417232 Various bug fixes for Analog P&R. OK for GM/Chamla & OTA/Miller.
* Change: In CRL::RoutingLayerGauge::getHorizontalGauge(), when selecting
    the default gauge, try, if possible to avoid the PinOnly one.
      Same goes for the vertical one.
* Bug: In Katana::TrackCost CTOR, symmetric track axis position was wrong,
    was using the reference instead of the symmetric.
* Bug: In BoraEngine::updatePlacement(), set up the Dijkstra search halo
    to one pitch so it can use immediately neighboring channels.
* New: In BoraEngine, added python startup hook like in Katana. Mainly
    to setup debug nets.
2019-11-13 23:31:51 +01:00
Jean-Paul Chaput 1e4b8b4647 Added support for extra resistor rules in Hurricane::Technology.
* New: In BasicLayer::Material, added "info" kind of material for layers
    that are only informationals (i.e. not real GDS one). Created to
    store geometric combination of layers, this is a temporary solution.
      Have to define a clearer semantic for that.
* New: In CRL/helpers/AnalogTechno.py, new "Count" type for count numbers
    that must not go through DbU::Unit converter. They are plain integers,
    but stored in DbU::Unit (keeping track of that semantic is left to
    the user).
2019-11-13 16:09:38 +01:00
Jean-Paul Chaput 88235dc3a4 Added Resistor support. Completed Capacitor & Resistor support in Bora.
* New: In Analog, added Analog::ResitorFamily & Analog::Resistor classes.
* New: In Analog, added inspector support for all Parameter classes.
* New: In Analog, new FloatParameter class (for resistor value).
* New: In CRL/etc/scn6m_deep_09/devices.py, added resistor device.
* New: In Oroshi, support for Resistors, stub for ResistorSnake generator.
* New: In Bora::DNodeSets, added support for Resistor devices.
* Change: In Bora::DSlicingNode, rename setNFing()/getNFing() into
    setBoxSetIndex()/getBoxSetIndex() for semantic coherency.
* New: In Karakaze/python/AnalogDesign.py, added support for Resistor.
    Change in addDevice(), the span which was only meaningful for
    transistor devices is replaced by a parameter argument.
      The parameter argument has to be consistent with the device type.
2019-11-12 02:21:03 +01:00
Jean-Paul Chaput 9d86282b8f In Cyclop CMakeLists, cleanup the switch Qt4/Qt5. 2019-11-10 12:28:50 +01:00
Jean-Paul Chaput a8a904180d In AllianceFramework::createCell(), handle non-existent library. 2019-11-08 00:18:23 +01:00
Jean-Paul Chaput 8035b31f27 First stage in analog capacitor integration
* Bug: In Technology::getPhysicalRule(), if the named layerdo not exists,
    throw an exception instead of silently putting a NULL pointer inside
    a rule.
* New: In Hurricane/Analog, new parameters classes for capacitor devices:
    - Analog::Matrix, a matrix of null or positives integers to encode
      capacitor matrix matching.
    - Analog::Capacities, a list of float values for all component of a
      multi-capacitor.
* New: In Hurricane::Script, add a "getFileName()" method to get the full
    path name of the Python module.
* Change: In Analog::LayoutGenerator, completly remove the logger utility
    as it is no longer used. Simply print error messages instead.
* Change: In Analog::MetaCapacitor, rename top & bottom plate 'T' & 'B'.
    Accessors renamed in "getTopPlate()" & "getBottomPlate()".
* New: In Analog::MultiCapacitor, complete rewrite. Makes use of the
    new parameters "capacities" and "matrix". Dynamically generates it's
    terminals as we do not know beforehand how many capacitors could be
    put in it.
* Bug: In isobar/PyHurricane.h, in Type object definition, do not prepend
    a "Py" to class name (so the keep the C++ name).
* Change: In CRL/etc/scn6m_deep_09/devices.py, add entry for the new
    capacitor generator.
* New: In oroshi/python/ParamsMatrix, add a "family" entry in the [0,0]
    element to distinguish between transistor, capacitor and resistor.
    (this is the matrix of values returned to the LayoutGenerator after
     device generation).
      Now have one "setGlobalParams()" function per family.
* New: In oroshi/python/Rules.py, added DTR rules needed by capacitors.
    Catch exceptions if something wrong append when we extract the rules
    from the technology.
* New: In Bora, the devices are no longer *only* transistors, so the
    possibles configurations are no longer defined only by a number of
    fingers. We must be able to support any kind of range of configuration.
      So the explicit range of number of fingers is replaced by a base
    class ParameterRange, and it's derived classes:
      - Bora::StepParameterRange, to encode the possible number of fingers
        of a transistor (the former only possibility).
      - Bora::MatrixParameterRange, to encode all the possible matching
        scheme for a capacitor. As there is no way to compress it, this
	is a vector of Matrix (from Analog).
* Change: In Bora::DSlicingNode::_place(), the ParameterRange has to be set
    on the right configuration (through the index) before being called.
      The generation parameters are taken from the active item in the
    ParameterRange.
* Change: In Bora::NodeSets::create(), iterate over the ParameterRange
    to build all the configuration. Adjustement to the routing gauge
    pitchs are moved into the DBoxSet CTOR to save a lot of code.
      Semantic change: the index in the NodeSets is now the index in
    the associated ParameterRange and no longer the number of fingers
    of a transistor.
      Check that the ParameterRange dynamic class is consitent with the
    device family.
* Change: In Bora::DBoxSet, same semantic change as for NodeSets, the
    number of finger become an index in ParameterRange.
      In DBoxSet::create(), now also perform the abutment box adjustement
    to the RoutingGauge, if possible.
* New: In Karakaze/python/AnalogDesign.py, add support for Capacitor
    devices.
2019-11-07 17:05:49 +01:00
Jean-Paul Chaput ef0f6f771a In Python scripts, if PyQt 4 fails to load, try PyQt 5.
* In CRL::Cyclop/CMakeLists.txt, add *again* the MOC files to the list
    of .cpp . Don't know what is happening here with MOC under Qt 5.
* In CRL/python/helpers.io, cleanly fails if neither PyQt 4 nor PyQt 5 is
    found. And tell it directly because this the module tasked to handle
    the exceptions/errors...
* In Cumulus/plugins/AboutWindow.py, try PyQt 4 then PyQt 5.
* In documentation/UsersGuide, now tells explicitely that Qt 4 must be
    used under RedHat 7 and Qt 5 under Debian.
2019-10-30 16:58:43 +01:00
Jean-Paul Chaput 2c73cfe76c Migrating the initialisation system to be completely Python-like.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
    PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
    PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
    allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
    constructor so the association between the RegularLayer and it's
    BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
    cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
    longer consider an error if the data-base has not been created yet.
    Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
    enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
    it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
    This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
    Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
    recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
    return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
    configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
    longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
    Python module format. For now, keep the old ".conf", but that are no
    longer used.
      For the real technologies, we cannot keep the directory name as
    "180" or "45" as it not allowed by Python syntax, so we create "node180"
    or "node45" instead.
      Most of the helpers and coriolisInit.py are no longer used now.
    To be removed in future commits after being sure that everything
    works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
    where badly computed when one end of the original segment was attached
    to a non-preferred direction segment (mostly on terminal contacts).
      Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
    is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
    scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
    helpers.staticInitialization() as they are not needed now (we run in
    only *one* interpreter, so we correctly share all init).
      In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
    correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
    the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
      In Configuration.loadConfiguration(), read the "ioring.py" from
    the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
    the XY functions.
      In st_model.Save(), use the VstUseConcat flag to get correct VST files.
      In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
    global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
    inside a try/except block to get prettier error (and stop at the first).
2019-10-28 18:09:14 +01:00
Jean-Paul Chaput 2d8e26a467 Quick fix for Stratus1, missing cell mapping file. 2019-10-25 11:20:15 +02:00
Jean-Paul Chaput 5bbeb0b062 Support for separated NDA tree. Big cleanup of the Python init system.
* Change: In Hurricane::Script, when running a script, no longer do it
    inside a Python sun-interpreter, use the current one. This way we
    no longer have our modules initialized twice or more, which was
    starting to be unmanageable (with the NDA support).
      The settings were re-read multiple time to the same value, so it
    was working, but still...
      I hope I didn't left some dangling Python objects now.
* Bug: In Hurricane::LayoutGenerator::drawLayout(), get the device abutment
    box though a Pyhon object *before* finalizing which removes that objet.
* New: In cumulus/plugins/__init__.py, add a "loadPlugins()" and static
    initialisation to preload plugins modules.
      We use that pre-loading step to append to the module __path__ attribute
    the alternate directory where a NDA covered may be found. This assume that
    the directory tree under the NDA root is identical to the one under the
    public root.
* New: In cumulus/plugins/chip/__init__.py, small utility function
    importContants() to import the constants inside another module namespace,
    to have more consise notations.
* Change: In cumulus/plugins/, in the various plugins sub-modules import
    use the full path from plugins, that is, for example:
      from plugins.core2chip.CoreToChip import IoPad
* Change: In Unicorn/python/unicornInit.py, no longer directly load the
    plugins modules, this is now done by cumulus/plugins/__init__.py.
      Instead, iterate through sys.modules for the ones starting by "plugins/"
    and try to execute a Unicorn hook, if present.
* Change: In Karakaze/python/AnalogDesign.py, update for the new Instance.create()
    prototype (added placement parameter).
2019-10-11 17:36:54 +02:00
Gabriel Gouvine f1644fc229 Workaround to get the ISPD benchmarks working 2019-10-06 12:58:33 +02:00
Jean-Paul Chaput 5914e16f26 Added management for "phlib" I/O pad external connectors (for cougar/lvx).
* New: In CRL::ApDriver::DumpSegments(), drive as top-level segments the
    RoutingPads using a Pin, and not only using a segment. They are not
    exported as top level Pin but only as Segment as they do belong to
    a deeper level.
* New: In Cumulus/plugins/PadsCorona.Side._placePads(), now manage both
    "pxlib" and "phlib*". Pad library management is still hardcoded, this
    should be made a configuration option someday.
2019-10-05 16:04:12 +02:00
Jean-Paul Chaput 02b30b6681 More terse failure message from the global router.
* Bug: In CRL::cstDriver(), re-activate the management of the VstUseConcat
    flag. Why was he removed in the first place?
* Change: In KatanaEngine::runGlobalRouter(), no longer give the details of
    each overflowed edge and the complete list of impacted nets.
    Only a count.
2019-09-29 18:35:16 +02:00
Jean-Paul Chaput d7931391c0 Adjusted routing pitch for METAL4 to METAL7 for FreePDK45 symbolic. 2019-09-19 23:52:03 +02:00
Jean-Paul Chaput 24dedce09c Added core2chip support for Phenitec80.
This commit degrades the run success rate of ARMv2a to 87% (40 iters).
* New: In CRLcore/etc/.../kite.conf, add configuration parameters:
      katana.termSatReservedlocal
      katana.termSatthreshold
    for the new edge capacity computation system.
* New: In CRLcore/etc/symbolic/phenitec06/, add support for N. Shimizu
    small I/O pads (supplied in phlib80). Tune various parameters of
    Anabatic/Katana to increase routing success.
* Change: In CRLcore/alliance/ap/ApParser, make Pin external components,
    so RoutingPad will be build upon in global routing.
      Do not complain when a I/O pad has a physical instance that did
    not exists in the netlist. Just create it (appeared in phlib80).
      When no netlist instance exists in a pad, the pad Cell is still
    considered as terminal.
* New: In Etesian::BloatCells, new profile named "3metals" better suited
    for two routing metals technologies (i.e. Phenitec).
* New: In Anabatic::RawGCellsUnder, new CTOR which take only source &
    target points instead of a segment. Needed to manage wide segment for
    which the axis to consider is not that of the segment (one axis for
    each track it intersect).
* New: In Anabatic::GCell, add a RoutingPad count attribute, for Edge
    reservation computation.
* New: In AnabaticEngine::computeEdgeCapacities(), instead of decreasing
    all edges of a fixed amount (hTrackReservedLocal), guess the GCell
    cluttering from the number of RoutingPads that it contains.
      For non-saturated GCells, the four edges are decreased by the number
    of RoutingPads. We use the maximum from the two neigboring GCells.
    The hTrackReservedLocal parameter is now used only as a *maximum*
    that the edge reservation can reach.
      If a GCell is saturated (more than 8 RoutingPads, the saturation is
    propagated horizontally to 2 neigboring GCells).
* Change: In AutoContactTerminal::getNativeConstraintBox(), use a more
    flexible gauge name matching for terminal vertical extensions correction.
    Namely, match all "msxlib*" kind of gauges.
* Change: In AutoSegment::setAxis(), add the ability to force the axis
    position, even if it is a non-canonical segment. Maybe needed in the
    initialisation steo, before the first canonisation is performed.
* New: In NetBuilder, added new methods _do_1G_1PinM1() and _do_2G_1PinM1(),
    to manage coronas for Phenitec designs.
      To avoid various side effects from segments being too close from
    the north / east side of the routing area, make those segments fixeds.
* Change: In KatanaEngine::annotateGlobalGraph(), the management of wide
    wires was wrong. The axis to use to find the underlying GCells is the
    one of the track, not of the segment. This was creating bad edge
    capacity computation under the power ring of a block and subsequently
    routing failures.
* New: In Kanata::Manipulator, added method reprocessParallels(), not used
    though, but keep it anyway, might be of use later...
* New: In Kanata::Manipulator, added method avoidBlockage() for terminal
    METAL2 in non-preferred direction, restrict the terminal and turn
    constraint box at the current position of the perpandicular, so it
    doesn't create a deadlock in METAL2.
* Change: In SegmentFsm::conflictSolveByPlaceds(), if we cannot break
    using the whole overlap, try the first atomic overlap.
* New: In SegmentFsm::_slackenStrap(), manage conflict between a non-prefered
    segment and a blockage, this when to call avoidBlockage()...
* New: In Katana::Configuration, management of the new edge computation
    parameters:
      katana.termSatReservedlocal
      katana.termSatthreshold
* New: In Cumulus/plugins/Core2Chip, support for Phenitec I/O pads.
2019-09-17 17:05:54 +02:00
Jean-Paul Chaput 91f973c00f Improve the management of the I/O pad near the chip corner.
* Bug: In cumulus/plugins/PadsCorona.py, when a pad is at the beginning
    or at the end of the side, the pad corona terminal may be outside
    the corona range (not directly facing it). In that case, create a
    bend to reach it.
      Worse, in some case more than one (but likely no more), could be
    in that case, so not only do we create a bend but also make a
    shift in the bended segment so two consecutive ones are not on the
    same axis, causing shorts.
      If both end pads of a corner are in that case, we cannot prevent
    a short, so at least, issue a warning.
* Bug: In CRL::Vhdl, the Entity::VstUseConcat was not passed correctly
    along, so we did get a strange mix of conat and direct assignment.
* New: In Unicorn/cgt.py : added --vst-use-concat options to control
    the VST driver behavior.
2019-08-16 00:40:49 +02:00
Jean-Paul Chaput f92b48174b Correct management of "fused_net" in Alliance parser/drivers.
* Bug: In CRL::ApDriver & CRL::ApParser, when saving a fused net, do not
    use it's name but put a star (*) character to set it anonymous.
      Having all component named was creating problems in cougar and
    subsquently in yagle (bad name for master latch).
      Conversely, in the parser, if the name of the net is "fused_net",
    make it a real fused_net and not an ordinary one.
2019-08-15 01:59:38 +02:00
Jean-Paul Chaput 5877691cde The VST driver can now be setup to use or not concat ('&') in PORT MAP.
* New: In CRL::AllianceFramework::saveCell(), through the view flag we
    can pass an option 'CRL::Catalog::State::VstUseConcat' to tell the
    driver tu use or not the concat '&' in PORT MAP statements.
      It is not completely clean that the flag for controlling the VST
    driver behavior is put in the Catalog states, but it's easier for
    now...
      And, of course, exported at Python level.
2019-08-13 14:46:23 +02:00
Jean-Paul Chaput d670de4125 Added support for 3 metal layers symbolic Phenitec 0.6um.
* New: In CRL/etc/symbolic/phenitec06, configuration for symbolic
    layout targeted for Phenitec 0.6um (do not contains any NDA
    covered informations). Could be used for any 3 metal layers
    techno.
* Bug: In Cumulus/plugins/chip/Configuaration.py, _setStackposition()
    disable stack error when there is no slave component on the stack
    (happens when the stack consists only of one contact).
2019-08-12 15:41:17 +02:00
Jean-Paul Chaput e80fcd8648 Remove VHDL driver extension/property after use.
* In CRL::vstDriver(), remove the Vhdl::EntityExtension right after driving
    the file. This avoid keeping in memory a mostly usnused structure and
    solve the "second write after modification" problem.
2019-08-08 14:12:22 +02:00
Jean-Paul Chaput 1b444d8f49 In cumulus/Core2Chip.py forgot a parameter to an error message call. 2019-07-31 19:16:40 +02:00
Jean-Paul Chaput 1359fe4ba6 Change Net name merge policy in the Blif parser.
* Change: In CRL/BlifParser::Model::mergeAlias(), do not always merge the
    net2 with net1 (RHS with LHS of the ".name" instruction). This may
    result in a name change in the design interface (external net).
      Instead, merge any internal net with the external, so keep the
    external net name. If both are external, keep the one with the lower
    id (which should have been created first).
2019-07-31 18:29:22 +02:00
Jean-Paul Chaput 85e969bca9 Disable the use of concat '&' in VST port map. 2019-07-31 17:38:35 +02:00
Jean-Paul Chaput d69327d9a9 Various typos correction (courtesy of G. Gouvine). 2019-07-30 13:13:57 +02:00
Jean-Paul Chaput f528cdea4c Upgrade of Katana detailed router to support Arlet 6502.
* Change: In Hurricane::SharedName, replace the incremental Id by a hash key.
    This is to ensure better deterministic properties. Between use cases,
    additional strings may have to be allocated, shitfing the ids. Even if
    hash can be duplicated, we should be able to ensure that the absolute
    order in map table should be preserved. Supplemental strings are inserted
    in a way that keep the previous order.
* Change: In CRL/etc/symbolic/cmos/kite.conf, add "katabatic.routingGauge"
    default parameter value ("sxlib").
* Change: In CRL/etc/common/technology.conf, define minimal spacing for
    symbolic layers too (added for METAL4 only for now).
* Change: In CRL::Histogram, extend support to dynamically sized histograms.
    Add a text pretty print with table and pseudo-curve.
* Change: In Cumulus/plugins/ClockTreePlugin, create blockage under the
    block corona corners so the global router do not draw wire under them.
    This was creating deadlock for the detailed router.
      When the abutment has to be computed, directly use Etesian to do it
    instead of duplicating the computation in the Python plugin.
* New: In Etesian, as Coloquinte seems reluctant to evenly spread the
    standard cells, we trick it by making them bigger during the placement
    stage. Furthermore, we do not not uniformely increase the size of the
    cells but create a "bloating profile" based on cell size, cell name
    or it's density of terminals. Currently only two profiles are defined,
    "disabled" which does nothing and "nsxlib" targeted on 4 metal layer
    technologies (aka AMS 350nm, c35b4).
* Bug: In Knik::MatrixVertex, load the default routing gauge using the
    configuration parameter "katabatic.routingGauge" as the default one
    may not be the first registered one.
* New: In AnabaticEngine::setupNetDatas(), build a dynamic historgram of
    the nets terminal numbers.
* Bug: In Anabatic::AutoContact::Invalidate(), always invalidate the
    contact cache when topology is invalidated. In case of multiple
    invalidations, if the first did not invalidate the cache, later one
    that may need it where not allowed to do so. The end result was correct
    nonetheless, but it did generate annoying error messages.
* Bug: In Anabatic::AutoContactTurn::updateTopology(), bad computation
    of the contact's depth when delta == 2.
* Bug: In Anabatic::Gcell::getCapacity(), was always returning the west
    edge capacity, even for the westermost GCell, should be the east
    edge in that case.
* New: In Anabatic::AutoSegment, introduce a new measure "distance to
    terminal". This is the minimal number of segments separating the
    current one from the nearest RoutingPad. This replace the previous
    "strong terminal" and "weak terminal" flags.
      This distance is used by Katana to sort the events, we route the
    segments *from* the RoutingPads *outward*. The idea being that if we
    cannot event connect to the RoutingPad, there is no points continuing
    as thoses segments are the more constraineds. This gives an order close
    to the simple ascending metals but with better results.
* New: In Anabatic::AutoSegment, introduce a new flag "Unbreakable", disable
    dogleg making on those segments. mainly intended for local segments
    directly connecteds to RoutingPads (distance == 0).
* New: In Anabatic::AutoSegment, more aggressive reducing of segments.
    Now the only case where a segment cannot be reduced is when it is
    one horizontal branch in a HTee or a vertical on a VTee. Check if,
    when not accounted the source & target VIAs are still connex, if so,
    allow reducing.
* New: In Anabatic::AutoContact, new state flags CntVDogleg & CntHDogleg
    mainly to prevent making doglegs twice on a turn contact. This is to
    limit over-fragmentation. If one dogleg doesn't solve the problem,
    making a second one will make things worse only...
* Bug: In Anabatic::Configuration::selectRpcomponent(), we were choosing
    the component with the *smallest* span instead of the *bigger* one.
* New: In Anabatic::GCell, introduce a new flag "GoStraight" to tell that
    no turn go be made inside those GCells. Mainly used underneath a block
    corona.
* New: In AnabaticEngine::layerAssign(), new GCellRps & RpsInRow to manage
    GCells with too many terminals. Slacken at least one RoutingPad access
    when there is more than 8 RoutingPad in the GCell (slacken or change
    a vertical METAL2 (non-preferred) into a METAL3).
* Change: In Anabatic::NetBuilderHV, allow the use of terminal connection
    in non-preferred direction. That is, vertical METAL2 directly connected
    to the RoutingPad (then a horizontal METAL2). This alllows for short
    dogleg without clutering the METAL3 layer (critical for AMS c35b4).
      Done in NetBuilderHV::doRp_Access(), with a new UseNonPref flag.
      Perform some other tweaking on METAL1 access topologies, to also
    minimize METAL3 use.
* New: In AnabaticEngine::computeNetConstraints(), also compute the
    distance to RoutingPad for segments. Set the Unbreakable flag, based
    on the distance and segment length (local, short global or long global).
      New local function "propagateDistanceFromRp()".
* Change: In AnabaticEngine.h, the sorting class for NetData, SparsityOrder,
    is modificated so net with a degree superior to 10 are sorted first,
    whatever their sparsity. This is to work in tandem with GlobalRouting.
* New: In Katana::TrackSegmentNonPref, introduce a class to manage segment
    in non-preferred routing direction. Mostly intended for small METAL2
    vertical directly connected to RoutingPad. Modifications to manage
    this new variant all through Katana.
* Change: In Katana::GlobalRoute, DigitalDistance honor the GoStraight flag
    of the GCell. Do not make bend inside thoses GCells.
* Change: In KatanaEngine::runGlobalRouter(), high degree nets (>= 10) are
    routed first and whitout the global routing estimation. There should be
    few of them so they wont create saturations and we want them as straight
    as possible. Detour are for long be-points.
      Set the saerch halo to one GCell in the initial routing stage (before
    ripup).
* Bug: In KatanaEngine & NegociateWindow, call _computeCagedconstraints()
    inside NegociateWindow::run(), as segments are inserted into tracks
    only at that point so we cannot make the computation earlier.
* Change: In Katana::Manipulator::repackPerpandiculars(), add a flag to
    select whether to replace the perpandiculars *after* or *before* the
    current segment.
* Change: In Katana::NegociateWindow::NegociateOverlapCost(), when the
    segment is fully enclosed inside a global, the longest overlap cost
    is set to the shortest global hoverhang (before or after).
      When the cost is for a global, set an infinite cost if the overlapping
    segment has a RP distance less or equal to 1 (this is an access segment).
* Bug: In Katana::PowerRailsPlane::Rail::doLayout(), correct computation of
    the segments extension cap.
* New: In Katana::QueryPowerRails::addToPowerRail(), add support for Pad.
* Change: In Katana/PreProcess::protectCagedTerminals(), apply the contraints
    to any turn connected to the first segment of the RoutingPad so the
    perpandicular constraints got propagated to the perpandicular segment...
* Change: In RoutingEvent, cache the "distance to RP" value.
* Change: In RoutingEvent::Key::compare(), sort *first* on distance to
    RoutingPad, then layer depth. If both distance to RoutingPad is null,
    then sort on segment length.
* Change: In RoutingEvent::_processRepair(), try a repack perpandicular with
    perpandiculars first (then with perpandicular last, then give up).
* Change: In SegmentFsm::bindToTrack() and moveToTrack(), set an axis hint
    when creating the insertion event.
* Change: In SegmentFsm::_slackenStrap(), add a step through slacken between
    minimize and maximum slack (wihch directly end up in unimplemented).
* Change: In Session::_addInsertEvent(), add an axis parameter needed when
    the axis of the segment is not the one of the track (case of wide
    segments or non-preferred direction).
* Bug: In Track::_preDestroy(), bad management of the TrackElement reference
    count. Destroy the segment only when reaching zero...
* Bug: In Track::expandFreeIneterval(), forgotten to manage case when there
    is a set of overlaping segments at the "end" of the track, the
    EndIsTrackMax was not set.
* Change: In TrackCost::Compare, increase the cost when an overlaping
    segment is at it's ripup limit. We should try *not* to rip it up if
    we can. Add a dedicated flag "AtRipupLimit".
* Change: In TrackElement, add proxies for isUnbreakable(), new function
    updateTrackSpan().
* New: In TrackFixedSegment CTOR, when a supply wire of METAL2 or above is
    found, make the underlying GCells "GoStraight".
* New: In TrackElement::canDogleg(GCell*), check for already done perpandicular
    dogleg on source/target (reject if so).
2019-07-28 23:20:00 +02:00
Jean-Paul Chaput 8ad910301d In CRLcore, new gauge "msxlib4" for compliance with AMS 350nm (symbolic).
* New: In CRL/etc/symbolic/cmos45/kite.conf, new gauge "msxlib4" for both
    routing and cells. Have only 4 metal layers but with all the same pitches
    and width. Differs from the 45nm compliant where pitches double starting
    from METAL4.
* New: In CRL/etc/symbolic/cmos45/plugins.conf, adjust default parameters for
    the clock tree plugin so they are identical to the one of "cmos" (scaling).
* Change: In CRL/python/helpers/io.py, in catch(), do not set up the script
    path here as it is non-informative.
2019-05-29 13:16:01 +02:00
Jean-Paul Chaput 0df4821806 Full update of the generated documentation for version 2.3 2019-05-27 18:49:51 +02:00
Jean-Paul Chaput 4cd0bcb009 Various bug corrections to pass the alliance-check-toolkit reference benchs.
* New: In Isobar::PyCell, export the isRouted() and setRouted() to the
    Python interface.
* Bug: In CRL::Entity::parseEntity(), check that the closing parenthesis
    is the last character of the net name. Issue a more relevant error
    message.
* In Anabatic::NetBuilder::_do_xG() and all other unimplemented methods,
    throw an error if called from a derived classes instead of just
    issuing a message in the debug stream. Avoid later core dumps...
* In Anabatic::NetBuilderHV, implement the builders for GCells with
    one pin. Needed to support chip/corona routing.
* Bug: In Cumulus/plugins/Chip.py, check that coronaCk exists before
    using it.
* New: In Cumulus/plugins/PadsCorona/Side._placePad(), when routing
    a design with symbolic pads, export the chip external "pad"
    connectors to be able to perform a lvx (otherwise cougar do not
    create external nets).
      In Corona._createCoreWire(), set the minimal gap between the pads
    and the corona to 6 pitches. Empirical value to avoid DRC errors
    with symbolic pads (pxlib).
      When successufully done, mark the Corona cell as routed.
* Bug: In Cumulus/plugins/Core2Chip.IoNet, the regex for vectorizet net
    was wrong, it was allowing only one digit in the index.
* Bug: In Cumulus/plugins/Core2Chip.cmos, correct management of
    pad & corona clock nets. Correct connexion between vdde/vddi.
* Bug: In Unicorn/cgt.py, forgot to execute scripts when in text mode.
2019-05-24 23:57:22 +02:00
Jean-Paul Chaput 3fb746fbef Support for mixing real pads & symbolic core. Wrapper around s2r.
* Change: In Hurricane::Error constructors disable the backtrace generation.
    (*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
    naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
    More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
    to the state. This allow to load two cells with the same name but from
    different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
    CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
    table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
    along with a new ErrorWidget written in PyQt4. It seems finally that
    PyQt4 can be used alongside Coriolis Qt widgets.
      New ErrorMessage.catch() static function to manage all exceptions
    in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
    directly print it.
      Rewrite the utilities to display Python stack traces "textStacktrace()"
    and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
    Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
    longer made square but thin and oriented in the connecting direction.
      Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
    Due to the unordered nature of the GDS stream, instances creation are
    delayed until the whole stream has been parsed and only then are they
    created.
      For the sake of reading back Alliance s2r GDS, we assume that any
    TEXT following a boundary is the Net name the boundary (component)
    belongs to.
      Create abutment box for Cells, computed from the bounding box, so
    the Hurricane QuadTree could work properly.
      Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
    Now we can mix real (foundry) pads and a symbolic core.
      To cleanly support the de-coupling between the real part and the
    symbolic one we introduce a new intermediary hierarchical level, the
    corona. We have now:
      Chip --> Pads + Corona --> Core.
      At chip level (and if we are using real pads) the layout is fully
    real (excepting the corona).
      The Corona contains everything that is symbolic. It has symbolic
    wires extending outward the abutment box to make contact with the
    real wires coming from the pads.
      In the pad ring we can use corners instances (or not), pad spacers
    or directly draw wires between connectors ring pads.
      Provide two flavors: placement only or full place & route.
    WARNING: If routing in a second step, *do not route* the *Chip* but
    the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
    additional extension of "_cts" (Clock Tree Synthesis) instead of
    "_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
    reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
    create a chip from a core. To work this plugins must have a basic
    understanding of the pad functionalities which may differs from
    foundry to foundry. So a base class CoreToChip is created, then for
    each supported pad foundry a derived class is added. Currently we
    support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
    "anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
    to ensure a reproductible ordering of the menus...
2019-05-22 14:34:32 +02:00
Jean-Paul Chaput 82dc58bf8e Redesign of I/O pads and Corona support to mix real and symbolic.
* Bug: In CRL/etc/symbolic/cmos/plugins.conf, rails dimensions are no
    longer expressed directly in lambda. Must be created using helper.l().
* Change: In CRL::ApParser, slightly more smart management of Pin width.
    Must normalize Pin behavior between Alliance & Hurricane as in
    Alliance they have only one dimension.
* Change: In CRL::LefImport, if a net name end with "!", assume it's a
    global one. Have to check this naming convention.
* Change: In Anabatic::NetBuilderHV::_do_1G_1PinM3() & _do_1G_1PinM2()
    now implemented. Needed for the corona routing support.
* Change: In AnabaticEngine::setupPreRouted(), exclude segments outside
    the abutment box.
* Change: In KatanaEngine::PowerRails, remove the I/O pad support as now
    we route only inside the Corona. So only one vdd/vss/ck are supported.
* New: In cumulus/plugins/ChipPlugin.py, complete rewrite of the chip
    support:
    * Uncouple pad I/O ring whith real cells (foundry) from a symbolic
      core. A new intermediate level "corona" is introduced to handle
      the real/symbolic transition.
    * Ability to explicitly setup position of the pads on the chip side
      in case of uneven distribution.
    * Enable clock tree to be build with 3 metal only (M2 to M4) instead
      of (M2 to M5).
2019-05-10 11:58:05 +02:00
Jean-Paul Chaput 43629a6c1c Tweaking Layer & RoutingGauge management. Allow negative track indexes.
* Bug: In Hurricane python module, forgot to add the Segment type.
* Change: In Isobar/layer.getEnclosure() wrapper check and cast the Layer
    argument into BasicLayer.
* Change: In CRL::RoutingGauge::getLayerGauge(Layer*), getLayerType() and
    getLayerDirection() no longer check layer identity based on layer
    mask instead of just Layer* pointer. To allow a unified call wether
    the layer is real or symbolic.
* Change: In CRL::RoutingLayerGauge::getTrackIndex() and getTrackPositon(),
    no longer consider negative indexes as invalid and reset them to
    zero. The check for out of bound index is now left to Anabatic &
    Katana.
* Change: In CRL/RoutingGauge.getRoutingLayer() and getContactLayer(),
    more detailed error message.
* Change: In CRL/RoutingLayerGauge.getTrackIndex() and getTrackPosition(),
    indexes are now signed long instead of unsigned.
2019-05-10 11:52:42 +02:00
Jean-Paul Chaput f6c840fd59 ISPD05 loading speed issues. IO PAD support for LEF importation.
* New: In Hurricane::IntrusiveMap, introduce IntrusiveMapConst which allow
    to search with a "const Key&" instead of a "Key", sparing the copy
    construction of the Key.
* Change: In Hurricane::Cell::NetMap, use the new kind of map with
    "const Name&" key access. This speeds up the Cell::getNet() method
    by suppressing one copy construction of a Name, which are costly
    after all...
      Should review the whole code to use "const Name&" everywhere it
    is possible.
* Change: In Hurricane::Entity & Hurricane::DBo, displace the unique
    identifier from Entity to DBo (move up to the base class).This
    to allow us to build deterministic map of DBo requireds in
    UpdateSession (which is built upon a SharedProperty).
      WARNING: This break the JSON database exportation support, do not
    use it until fixed/rewritten.
* Change: In Hurricane::Layer, add an attribute to know if a layer is
    associated to a blockage. Modificate accordingly PyLayer and
    BasicLayer.
* Change: In Hurricane::SharedProperty, the set of owners (DBo*) is now
    stored in a std::set sorted on the objects Ids, instead of a simple
    vector. The linera search time through the std::vector was starting
    to show (ISPD05 bigblue1).
* Bug: In Isobar::PyInstance, make full contructor signature (5 arguments)
    conform to the C++ one. It was only accepting the four first and
    forcing the placement status to be FIXED.
* Bug: In CRL/etc/symbolic/ispd05/kite.conf, update for the new configuration
    requirements where all distance must be converted into DbU in the
    file itself (use "helpers.l()", "helpers.m()"). Apply to the cell &
    routing gauges.
* Bug: In CRL/etc/symbolic/ispd05/technology.conf, update for the new
    configuration. "helpers.initTechno()" *must* by called first thing
    in this file in order for the Technology to be created.
* New: In CRL::AllianceFramework, add matchCellGauge() &
    matchCellgaugeByHeight()
* New: In CRL::CellGauge, add a flag to distinguish gauges meant for
    IO Pads and an "isPad()" predicate.
* Change: In CRL::Ispd05Bookshelf, flush the UpdateSession stack every
    1000 elements additions. Maybe not necessary now the the UpdateSession
    property relies on a std::set instead of a std::vector.
* New: In CRL::LefImport, support for SITE and match/create the appropriate
    CellGauge on the fly. Specific support for MACROS that are flagged PAD.
      Add a dedicated post-treatment for PAD connectors, extend them toward
    the boundary of the nearest abutment box side. Tested only on AMS 350nm
    c35b4 for now.
      This part is most likely to be tweaked for every kind of real foundry
    pad that we may encounter...
* Change: In EtesianEngine::findYSpin(), use the C++ "for" construct to loop
    over Collections.
* Change: In Unicorn/cgt.py, register the Python/C++ tutorial support by
    default.
2019-04-22 12:16:16 +02:00
Jean-Paul Chaput bbcf14eb5a First step in supporting ISPD18 detailed routing benchmarks.
* Change: In CRL::DefImport, added callback to read the DEF UNITS statement
    and perform a correct length conversion. Previously set to read pseudo
    lambdas in hundredth of microns.
      Added DefParser::getLefCell() to lookup master cells in the LEF
    libraries before looking in the Alliance ones (rooted under "LEF"
    library).
* Change: In CRL::LefParser::_pinPostProcess(), when no segment suitable
    for terminal connexion is found, add all of them. This is a quick hack
    and an a correct policy that match all techno must be implemeneted.
* New: In CRL::pyCRL, add a Python wrapper for DefImport.
* New: In CRL/etc/45/ispd18/ added configuration files for the "real"
    technology used by the ISPD18 45nm design benchmarks.
2019-03-29 11:07:55 +01:00
Jean-Paul Chaput 3a2916b5e6 Improved clock-tree support for variable pitch routing gauges.
* New: In Hurricane::Isobar::PySegment, added wrapper for getOppositeAnchor().
* Bug: CRL::PyRoutingLayerGauge, Python wrapper of getTrackPosition() was
    in fact returning getTrackNumer().
* Bug: In Katana::PowerRailsPlanes::Rail::doLayout(), add the half minimum
    distance to the blockage segments extensions. Was causing too near
    VIAs is cmos45.
* Change: In cumulus/plugins/ClockTree, correctly manage routing gauge when
    the lower pitches (M2/M3) is different from the upper one (M4/M5).
    But we still can only do sxlib compliant gauges because we do not
    handle a switch in preferred routing directions.
2019-03-23 11:05:51 +01:00
Jean-Paul Chaput 5dd235b3cd Adding moc cpps to the link of Cyclop under Qt 5.
* Bug: In CRL::cyclop, on former versions of Qt 5 there was a double
    link of the moc generated modules. This appears to be solved under
    Ubuntu 10.04 LTS, so now we have to add them again explicitly.
2019-03-21 13:27:43 +01:00
Jean-Paul Chaput 94044992ef Pin management implemented for NetBuilderHV.
* Bug: In Katana::Track::expandFreeInterval(), the OutsideElement case was
    not handled correctly, the end index must be increased in that case.
    As a result, this function was returning too short an interval.
      This was affecting the computation of perpandicular free interval
    in DataNegociate::update() for perpandicular fixed but not in a track.
* New: In Anabatic::NetBuilder and NetBuilderVH, now manage GCells with
    one Pin, and up to three globals. Used to put terminals at the
    edge of a block.
* New: In EtesianEngine, now manage placed Pins.
    (done through extractInstanceName())
* Change: In CRL::RoutingGauge::getHorizontalGauge() no longer skip PinOnly
    gauges to find the reference one (same goes for vertical).
2019-03-10 13:25:43 +01:00
Jean-Paul Chaput 0b605000ed Bug fixes in Blif parser (no VHDL enforcement) & GDS driver.
* Bug: In Hurricane::DrawingQuery::drawGo(), forgot to apply translation
    on Polygon and Rectilinear.
* Bug: In Hurricane::Rectilinear, forgot implementation of getContour().
    Add a new accessor getPoints().
* Bug: In CRL::Blif::load(), do not always enforce translation towards
    VHDL names. When loading LEF+gds it may change the Cell names between
    the two stages so the gds layout do not get added to the LEF Cell
    phantom.
      Now add a boolean enforceVhdl argument (may be a flag in the future).
* Bug: In ::GdsStream::operator<<(Cell*), forgot to drive the Rectilinear.
2019-03-07 20:14:08 +01:00
Jean-Paul Chaput f107a68938 Reorganisation of menus in a more clear way. 2019-03-05 23:23:14 +01:00
Jean-Paul Chaput 6ae3a902ee Correct H/K parameters for global routing. New cmos45 symbolic.
* Change: In CRL/etc/cmos/kite.conf, setup correct H/K parameters for
    the Katana global router. Value copied from Knik. They give a
    faster solution.
* New: In CRL/etc/cmos45/, new symbolic settings adapted to FreePDK 45nm.
    Courtesy of N. Shimizu. To be used with NSXLIB.
* New In CRL::System, add "coriolis_top" to the set of pathes available
    to the user.
2019-02-26 20:00:28 +01:00
Jean-Paul Chaput 9f69230837 Correct CellWidget & CellPrinter to be really WYSIWYG.
* Change: In Hurricane::CellWidget, new "isPrinter" attribute to know if
    the CellWidget is used as a device for printing.
      New function copyExtensionsGos() to duplicate the ExtensionGo drawing
    callbacks. This is a temporary hack until the ExtensionGo are made static
    to be shared by all CellWidgets.
      In _redraw(), the DrawingQuery flags were not correctly reset between
    different stage of the drawing. This was resulting of uneeded walkthough
    of the slicing tree, along with incorrect display of some of the layers
    (i.e. rubbers where diplayeds when ExtensionGos where active).
* Change: In GraphicKatanaEngine, fine tune the display of GCells for printing
    CellWidget.
* Change: In Hurricane::CellPrinter, copy all the settings from the palette
    of the reference (graphic) CellWidget into the printer CellWidget.
    Also copy the ExtensionGos callbacks so we can print them. Use the
    new CellWidget attribute "isPrinter" for the callbacks to be able
    to adapt to Printer settings.
* Change: In Hurricane::Time::getStringTime(), only print two decimals
    for time durations.
2019-02-20 18:24:43 +01:00
Jean-Paul Chaput fcd6d69a2f Analog integration part II. Analog place & route (slicing tree).
* Change: In Hurricane::CellWidget, set the minimal size to 350 pixels
    to fit my normal DPI secondary screen...
* Change: In Hurricane::Error(), reactivate the backtrace generation by
    default. Seriously slow down the program each time an Error is to
    be constructed.
* Bug: In Analog::Device::preCreate(), check for NULL Technology before
    attempting to use it.
* Change: In Hurricane/Analog, remove all '*Arguments*' classes and their
    Python interface. It was an obsoleted way of passing devices parameters
    to the Python layout generators (located in Oroshi). Now we just get
    them straight from the Device with the getParamter() method.
* Change: In CRL::System CTOR, add Python pathes for Oroshi & Karakaze.
* Change: In Oroshi/Python/WIP_*.py layout generator scripts, remove
    all uses of the "Arguments". Directly access the parameters through
    the device itself. Make the checkCoherency() with identical arguments
    as of layout().
* New: Bora tool that performs analog place & route. Based on a slicing
    tree representation. It is the thesis work of Eric Lao.
      Code beautyfication and some programming cleanup.
* New: Karakaze tool, provide the Python base class AnalogDesign used
    to build an analog design. Create/configure devices and assemble
    them in a slicing tree.
* Change: In Unicorn/cgt.py, display the stack trace in case of an
    ImportError exception as well as for other exceptions.
      Add Bora to the set for included tool engines.
2018-10-18 18:10:01 +02:00
Jean-Paul Chaput 3f73b9d033 Anlog integration part I. Atomic devices support (transistors).
* Change: In boostrap, remove support for Chams.
* New: In Hurricane::Technology, added support for DTR rules, UnitRule,
    PhysicalRule and TwoLayersPhysicalrule. Added devices descriptors and
    models descriptors (for Spice). Spice description is not used yet
    but kept anyway in case of future use.
* New: Hurricane::Analog whole library and it's Python interface. This
    provides support for transistors, capacitors and resistors. Only
    transistor support is fully implemented as of now.
* New: In CRL/python/coriolisInit.py, read configuration files for the
    Analog extension (analog.conf & devices.conf). Thoses are optionals
    and a simple warning is issued if not found.
      Added helpers/AnalogTechno.py DTR loading helper.
      Add analog configuration files for 180/scn6m_deep_09.
* New: Oroshi tool that provides actual layout drawing for transistors.
2018-10-01 16:52:17 +02:00
Jean-Paul Chaput b53511ea83 Minor adjustements for analog device checker (test of AMS c35b4).
* Change: In CRL::GdsStream, no longer export empty Cells as structures,
    to avoid empty cells in Cadence. To prevent meta-transistors to be
    exported as real physical objects.
      Also put a hard-coded test to prevent exporting "control_r" model
    which is made of AMS standard cells for "amsOTA".
* Change: In CRL/PyRoutingGauge, export the isHV() and isVH() methods so
    the Stack can access it.
* Change: In Hurricane/PyCellViewer, export the removeHistory() method.
    When a Cell is deleted, it must be also removed from the editor
    history. This should be take care of automatically, but for now
    we make it manually through scripts.
* Bug: In Anabatic::NetBuilder::doRp_accessAnalog(), the gauge offset
    was not taken into account when creating initial Contact on
    RoutingPad. The program self corrected afterwards, but with the
    display of a disgraceful message.
* Change: In Anabatic::Configuration and Session, export the gauge offsets.
2018-09-20 18:24:30 +02:00
Jean-Paul Chaput 399a2e3c48 Merge branch 'devel_stratus' of ssh://bop-t/users/largo2/git/coriolis into devel_anabatic
Conflicts:
	documentation/CMakeLists.txt
	documentation/_templates/indexcontent.html
	documentation/index.rst
	katana/src/katana/RoutingEvent.h
	stratus1/CMakeLists.txt
2018-08-19 13:27:09 +02:00
Jean-Paul Chaput 116d927d1e Correct comutation of metricsBdu in GDS driver (courtesy of M. Koefferlein). 2018-07-17 13:36:17 +02:00
Jean-Paul Chaput d99d797a40 Debugged the GDSII driver. Now working with Cadence.
* Bug: In CRL::GdsDriver::GdsStream two bugs :
    1. The tm fields are int but must be casted into uint16_t in BGNLIB
       and BGNSTR.
    2. The mandatory LIBNAME record was missing.
    3. We also force, for now the dbu to be 1000 and the UU to be 1um.
2018-07-16 19:43:44 +02:00
Jean-Paul Chaput 55a29488c9 Correct handling of lambdas & microns in configuration files.
* Bug: In CRL/etc/NODE/VENDOR/Technology.conf, the database must be configured
    as early has possible so the functions ensuring length conversions can
    work correctly (l(v), u(v)). So we can no longer rely on a table to be
    read after the execution of the file. We perform a direct call to the
    helpers.Technology.initTechno() function. And it must be made first
    thing.
      In all tables taking dimensions, we must use one of the converter
    function helpers.l(v), helpers.u(v) or helpers.n(v) so the the value v
    get converted in lambda, microns or nanometer (resp.). Make the
    modifications in all technology.conf and kite.conf files.
* Change: In CRL/coriolisInit.py, remove the technoConfig variable that has
    been replaced by a direct call to helpers.Technology.initTechno().
* Change: In CRL/helpers.Alliance.loadRoutingGaugesTable(), no longer try to
    convert coordinates, they must already be in DbU.
* Change: In CRL/helpers.__init__.py, remove lambdaMode() and micronsMode()
    they could not be made to work as expected. Create l(), u(), n() as
    replacement.
2018-07-16 11:32:40 +02:00
Jean-Paul Chaput 094cb8a132 Improved handling of short nets (fully included in one GCell).
The short net mode degrade the routing in some cases. This will be
fixed in a next batch of commits.

* New: In Hurricane::NetRoutingProperty, added "ShortNet" flag for Nets
    that are completly inside *one* GCell.
* Bug: In CRL::BlifParser::Model::staticInit(), when looking for the
    output of zero and one cell, also skip the blockage net (as well as
    automatic and supplies).
* New: In Anabatic::AutoSegment, added "ShortNet" flag to know if the
    segment is part of a short net (fully included in *one* GCell).
      Also add accessor/mutators for the _analogMode flag (was it ever
    used before?).
* New: In Anabatic::NetBuilder::singleGCell(), if a RoutingPad is
    vertically small, add a vertical segment to give it some slack.
* New: In Anabatic::Dijkstra::_materialize(), detect "short net" as
    they have only one GCell in their source list...
* Bug: In AnabaticEngine::_loadGrbyNet(), reset the AutoSegment
    "short net" and "analog mode" creation flags between two different
    nets.
* New: In Katana::Configuration, added dedicated ripup for short net
    segmnts.
* New: In Katana: partially implemented support for "short dogleg", that
    is dogleg that are always kept in same metal because they connect
    neighboring perpandicular tracks. Not finished neither activated
    yet.
* New: In Katana::TreckElement and derived, export the the *short net*
    support from AutoSegment.
* Bug: In Katana::RoutingEvent::_processRepair(), when a segment is
    successfully inserted, re-process any perpandicular that is in
    repair state, as it may have a new chance to be placed.
* New: In Katana::SegmentFsm::slackenTopology(), always reject short nets.
* Bug: In Katana::Track::check(), correctly handle wide segments instead
    of issuing false check messages.
2018-07-16 11:16:51 +02:00
Jean-Paul Chaput 6b29ad0078 In AllianceFramework, no longer try to load ".vhdl" files in ".vst".
* Change: In CRL::ParserMap, no longer recognize the file extensions
    ".vhdl" and ".vhd" which are true VHDL and cannot be parsed by the
    "vst" (Alliance structural subset VHDL) parser.
       This should solve annoying problems for the Makefiles when there
    is both the full VHDL file ".vhdl" and the synthesized one ".vst"
    (note that this problem do not arise when using Yosys/Blif).
2018-06-11 16:49:40 +02:00
Jean-Paul Chaput ea9a1f3710 CRL::Blif parser now able to load both non-Alliance & Alliance design.
* Change: In CRL::Blif, we now can add a list of Hurricane library for
    the parser to look for standart cells. If the library list is *empty*
    we look use the Alliance mechanism, if not, we look *only* in this
    library list. This behavior is implemented in Subckt::createModel(). I
      To add a library, use CRL::Blif::add(Library*).
      This allow to manage symbolic or real mode loading, it may need
    some rework to clarify the interface.
2018-06-08 12:02:49 +02:00
Jean-Paul Chaput c5034a9156 Typo in CMakeLists.txt : AND instead of "and". 2018-06-06 23:22:18 +02:00
Jean-Paul Chaput 767407736d Add a fully generated documentation in the git repository.
* Change: In all tools supplying documentation, as we use some specific
    software to create the doc, they may not be available, or worse, be
    and incompatible version. So, by default, we install the files shipped
    with the git repository. To force a full doc rebuild, use the "--doc"
    flag of ccb.py.
2018-06-06 18:42:26 +02:00
Jean-Paul Chaput 4f089ffdea Polygon internal normalization. Sub-polygons for GDSII driver.
* Change: In Hurricane::Polygon, store the points so they are always
    ordered in the counter-clockwise (trigonometric) direction. This
    simplicificate internal computations.
* New: In Hurricane::Polygon, added getSubPolygons() methods, that
    split horizontally the polygon in sub-polygons of about 1000
    vertexes. This is mainly to be used by the GDSII driver to abide
    to the XY 4000 points limitation.
* New: In Hurricane::Isobar, export support for Point collections so
    the various contour Polygon methods can be created in the Python
    interface.
* New: In CRL::GdsDriver, split the Polygons into set of sub-polygons
    of less than 1000 vertexes. Use the getSubPolygons() method.
* Change: In stratus1.dpgen_RF2, makes more explicit error messages
    about placement by displaying the faulty vs. expected coordinates.
2018-06-03 11:47:31 +02:00
Jean-Paul Chaput ea16b5a556 Added GDSII parser. Component/Polygon reorganisation.
* New: In CRL, implement a GDSII parser. The complete syntax is supported,
    but only a few subset is really taken into account. It is intended to
    load the layout of standard cells only. The interface of the cell is
    provided through a LEF file and it complete layout through the GDSII.
      The loader work in a Library way. It takes a Hurricane library as
    argument and search in the GDSII library structures with a name
    matching the Cell of the library and complete them.
* Change: In Hurricane::Component, put the Contour methods at Component
    level so we can use them in a generic way in the CellWidget drawing
    primitives.
* New: Hurricane::Rectilinear polygon, for small rectlinear polygons.
    Should be less than 100 vertexes. For bigger ones, use Polygon
    which allows slanted egdes.
* Bug: In CRL, freepdk_45/technology.conf, there seems to be an incoherency
    bettween the GDSII layer numbers as defined in the Cadence FreeePDK45.tf
    file and the one used in the supplied layout of the GDSII cells.
      For now, we align on the GDSII cells to get nice layouts, but it
    has to checked.
2018-05-20 15:47:34 +02:00
Jean-Paul Chaput 4a65a8d4e7 Added GDSII driver. Bug in Blif parser.
* New: In CRL, implement a true GDSII driver. The driver is directly under
    CRL and do not use an intermediate structure in vlsisapd. The ASCII
    GDSII is removed.
      Huge polygons are not supported yet. Have to be split up in
    sub-polygons of less than 4000 vertexes.
      Symbolic layout can be exported to give a rough idea of the layout
    but RDS expension is not applied. Symbolic composite layers are
    expansed into their basic layers so the design *looks* normal.
* Deprecated: In CRL, remove all traces of the old XML configuration
    parsers. No one needs them now, including Chams.
* Bug: In CRL::BlifParser, before blindly loading the model of a subckt
    from disk with AllianceFramework, checks if it is in the Catalog
    first. Load with AllianceFramework only cells that are in the
    Catalog.
      This prevent a file of the same name than a model to be loaded
    shadowing the later defintion of the model in the Blif file.
      All this is due to the fact that Blif could be non-ordered for
    the models...
* Change: In Hurricane::BasicLayer, the "extract number" is replaced
    by a GdsLayer and GdsDatatype to generate accurate GDS files.
    Even if datatype is 0 most of the time.
      Update all the "technology.conf" files in CRL to provide those
    two numbers.
2018-05-15 13:12:00 +02:00
Jean-Paul Chaput 0902b21f23 Added support for huge approximated polygons (for photonics).
* New: Hurricane::Triange as been renamed into Hurricane::Polygon.
    Add support for convex polygons. Polygon are approximateds by
    excess by a manhattan rectilinear polygon (with potentially
    thousands of vertexes). To reduce the memory footprint,
    compaction techniques reducing by at least a factor 4 has been
    implemented. We could go further by only storing the non-repetitive
    part of the edge (defined by the integral fraction dY/dY).
    We will see, if the program slows too much.
      The manhattan approximate is always computed but displayed
    only if the polygon grid step is greated than 4 pixels.
      The level of approximation of the polygons can be controlled
    through the "DbU::_polygonStep" parameter.
* Change: In CRL/coriolisInit.py and CRL/helpers/Technology.py, regroup
    all DbU related parameters into "technoConfig" (i.e. suppress
    "viewerConfig"). Update all the relevant technology.conf configuration
    files.
      Change the loader behavior so that "technoConfig" is read first
    and is now responsible for creating the Technology of the DataBase.
* New: In Hurricane::CellWidget, added support for displaying mahanttanized
    polygons.
* Change: In documenation/scripts/expample/polygons.py, perform (I hope)
    a comprehensive test of the polygons (check all slopes, clockwise and
    conter-clockwise).
* New: In Hurricane::DbU, added template to manage vector<> of DbU.
    Support for the "polygonStep" parameter.
2018-05-04 17:06:41 +02:00
Jean-Paul Chaput 1a338f620c Corrections in the Dijkstra global routing (ripup) mechanism.
* Bug: In Anabatic::Dijkstra, the degree of a vertex (the number of neighbors
    belonging to the same net) was miscalculated. This was leading, in the
    materialize step to some feed-through vertexes not being broken.
    Leading in turn to incomplete transformation of the detailed routing.
      Also in _trackback(), the degree of the first vertex we were backtracking
    from was not incremented.
* Bug: In Anabatic::Dijkstra::materialize(), systematically use
    GCell::breakGoThrough() on both source and target. This is needed when
    we are in the ripup phase as both source and target can be go-through.
      This was also leading to incomplete detailed routing transformation.
* Change: In Anabatic::Edge::ripup(), ripup one third of the segments instead
    of thoses exeeding the global length threshold. This way we are sure to
    desaturate an edge. Needs to be further calibrated.
* Change: In Aanabatic::GCell::breakGoThrough(), no longer return NULL.
    Return existing gcontact if any. Break if it is a go-through and create
    a new gcontact in last resort. Maybe rename this function.
* New: In Anabatic::Configuration, new parameters:
    - anabatic.edgeHScaling, to adjust the length of the horizontal edges
        relative to the vertical ones (this is a ratio).
    - anabatic.globalIterations, set the maximum number of ripup passes
        of the global router.
* New: In CRL/etc/*/kite.conf, added new parameters anabatic.edgeHScaling
    and anabatic.globalIterations.
* New: In Katana::GlobalRoute::DigitalDistance, take into account the new
    edgeHScaling factor. Must be used when the capacity of V-edges differs
    greatly for H-edges (case of AMS 350nm c35b4 for instance).
* Bug: In Katana::GlobalRoute::DigitalDistance, the historic cost is
    computed for an edge length of "1". Must be multiplicated by the
    current edge length to have any measurable effect.
      This bug is finally explaining why the ripup was producing the
    same solutions over and over, the historical cost was negligible!
2018-04-16 12:10:48 +02:00
Jean-Paul Chaput cabbab5140 Correct interval capacity computation around zero in RoutingLayerGauge.
* Bug: In CRL::RoutingLayerGauge::divide() & getTrackNumber(), the number
    of traks crossing an edge was wrongly computed for GCells around the
    zero coordinate, this was due to the change in rouding direction
    around zero. It was starting to show for routing gauges with an offset.
      Note: to simplificate the computation of the capacity of an interval,
    all the track over a Cell are computed from (0,0). The Cell abutment
    box has to be choosen relative to that. The tracks positions are fixed
    all over the Cell (or chip if it is one).
2018-04-13 14:59:40 +02:00
Jean-Paul Chaput 6b4baad8b9 More non-deterministics behavior corrections.
* Bug: In Hurricane::Cell_SubCells collection, order the set<> of Cell
    with Entity::CompareById instead of pointer values.
* Bug: In Hurricane::Component_ConnexComponents::Locator, sort the
    set<> of Components with Entity::CompareById instead of pointers.
* Bug: In Hurricane::Occurrence::operator<(), uses Ids to compare
    both _entity and _sharedPath. Check for NULL pointers.
* Change: In Hurricane::IntrusiveMap, add a debug output in _resize()
    like for IntrusiveSet.
      Note to myself : despite their names, InstrusiveMap are hash
    tables and not map<> in the STL sense.
* Bug: In CRL Core, Vst parser, sort the CellVectorMap on Ids.
* Bug: In CRL::NamingScheme::toVhdl(), sort the set<Cell*> models on Ids.
* Bug: In CRL::toVhdlName(), sort the set<Cell*> models on Ids.
* Bug: In CRL::getInstancesCount(), sort the map<Cell*,size_t>
    gatesByMaster on Ids.
2018-04-08 16:58:55 +02:00
Jean-Paul Chaput 0fa6f8be9b Determinism correction of Hurricane, CRL core & Katana.
* Bug: In Hurricane::Cell::uniquify(), a set<Cell*> sorted on pointers
    was remaining. Now sorted on Entity::Id.
* Bug: In CRL::VhdlEntity, in the driver, the components where driven
    in pointer order (set<> again). Now use ids.
* Bug: In CRL/etc/scn6m_deep_09/technology.conf, the symbolic extentions
    for VIAs and layers were wrong. Have to be multiplied by two.
* Change: In AnabaticEngine, AutoContact and AutoSegment LUTs are now
    sorted on Entity::Id. Should not have had any impact, but better
    safe than sorry.
* Change: In KatanaEngine, Symmetric contraint map<> is now sorted on
    Entity::id. Idem for TrackSegmentLut.
2018-03-25 00:58:22 +01:00
Jean-Paul Chaput 23cb020ed3 Fix in 180/scn6m_deep_09, forgot to setup metal layers mininal spacing.
* Bug: In CRL Core, etc/180/scn6m_deep_09/technology.conf the minimal
    spacing for the metal layers layout were not set, allowing the
    router to place VIAs too close to each others. This was generating
    either DRC errors or short-circuits.
2018-03-21 17:32:05 +01:00
Jean-Paul Chaput 8434b01457 Add missing 'anabatic.routingGauge' parameter for scn6m_deep. 2018-03-19 14:16:05 +01:00
Jean-Paul Chaput 3a6760f52a Bad guessing of the output of zero_x0 & one_x0 in BlifParser.
* Bug: In CRL::BlifParser::Model::staticInit(), when looking for the
    output of the Cell, discard power supplies *and* automatic Nets.
2018-03-19 12:55:22 +01:00
Jean-Paul Chaput dd4a01fe70 Validating channel routing mode (two metals) on SNX.
* New: In Hurricane::Entity, add an id counter limit and a memory size
    limit. The two limits are checked only when a new Entity object is
    created. This should help avoiding massive memory links.
* New: In CRL Core, add a "crlcore.groundName" and a "crlcore.powerName"
    parameter to specify the name of the ground/power signals to be
    created if they are missing in a Cell. For Alliance libraries it
    would be "vss" & "vdd" (default values), but for real technologies,
    it is often "gnd!" & "vdd!".
      The Blif parser is modificated to make use of it.
* Bug: In AnabaticEngine::unify(), set the resulting unified segment in
    the  center of the GCells common side. Gcells under a segment are
    found by using the edge that cover the segment axis. When we have
    a "bend" GCell stack and the axis is wrong, they could be ommited.
      This was causing deleted segments to be not removed from some
    Edges, then core dump.
* Change: In Anabatic::AutoSegment::create(), smarter choosing of the
    reference contact, select the fixed or terminal one instead of
    always the source one.
* New: In Anabatic::Edge::isEnding(), new function to check if a
    segment going through an Edge is starting/ending in either source
    or target GCell of the edge (active only when running in channel
    mode).
* New: In Anabatic::Edge::add(), a segment takes part in the occupancy
    only if it is not ending in either source or target (channel mode
    only). The occupancy due to terminal is pre-computed in Katana.
* New: In Anabatic::Edge::ripup(), in channel mode, never ripup a
    segment which is ending in either source or target (we *have* to
    access this edge to connect to the terminal).
* Bug: In Anabatic::GCell::hcut() and vcut(), force the update of
    the Edge which is on the side that will get splitted by the cut.
    It's capacity will be reduced to it must be updated.
* Change: In Anabatic::GCell::updateGContacts() add a flag to conditionnally
    update horizontals or verticals only. We may require only a partial
    update when resizing the GCell in only one direction.
      This, again, related to the fact that we compute the GCells under
    a segment thanks to it's axis position, so we need to be very careful
    when modificating axis.
* Change: In Katana::Block::resizeChannels(), only update GContact vertical
    position. Do not disturb X positions of segments.
* Bug: In Katana::GlobalRoute::DigitalDistance, in channel mode, some
    Edges can have a zero capacity, but still be reachable if the net has
    a terminal in either source or target. Look for this case and return
    a distance of zero instead of "unreachable". This was causing the
    global routing not to complete in channel mode.
      For computing the edge distance, makes the vertical edges much more
    long (10 times) than the horizontal ones as the vertical capacity is
    very limited. Hard coded for now, should make it a parameter in the
    future.
* Change: In KatanaEngine::annotateGlobalGraph(), decrease the capacity
    of edges with reserveCapacity for each terminal inside a GCell.
    Both north and south edges are decreased as we a terminal will
    block both north and south edges.
      As a counterpart, the Edge capacity is not decreased when the
    global router connect to a terminal.
* Change: In Katana::RoutingEvent::revalidate(), when in repair stage,
    do not expand the slack for horizontal segments in channel mode.
    So they may not overlap the standard cell row.
* Bug: In Stratus documentation, do not use the french option in babel,
    the documentation is in english!
* New: In Documentation, added Hurricane/Python tutorial, part for drawing
    layout.
2018-03-16 16:20:04 +01:00
Jean-Paul Chaput 59917680cb In BlifParser, revert gnd! and vdd! to vss and vdd. 2018-03-08 15:53:02 +01:00
Jean-Paul Chaput 793dbb26b2 Capacity managment by layer in Edges & GCells (plus fixes).
* New: In Anabatic::EdgeCapacity, dedicated object to manage the capacities
    of an edge by layer. This needed now because with real technologies
    layers capacities differs (unlike with symbolic technologies).
      This object is separated to be shared between Edges with identical
    characteristics (direction+interval). Deletion is automatic and
    done through refcounting. All the already allocateds EdgeCapacity
    are kept into a set in the AnabaticEngine (key is (direction,interval)).
* New: In Anabatic::Edge, capacities are stored in a shared EdgeCapacity
    object. The total capacity can be annotated (i.e. decreased).
      EdgeCapacity attribute is created during the materialize() call.
    The capacities are computed at this time.
      The incCapacity() function is renamed in reserveCapacity().
* New: In Anabatic::AnabaticEngine, added attribute _edgeCapacitiesLut
    to store the shared EdgeCapacity.
      Lookup/Creation of an EdgeCapacity is done through _createCapacity().
* Change: In Anabatic::Constants, rename Flags::IllimitedCapacity into
    Flags::InfiniteCapacity. Add Flags::NullCapacity (both for Edges).
* Change: In Anabatic::GCell, implement a by depth (for layer) getCapacity().
    This modification did expose a bug in the density calculation :
    per depth density where divided by the complete density instead of the
    density's depth. This was leading to greatly underestimated densities.
    Thoses underestimations where preventing Dijkstra and layer assignement
    to manage congestion correctly (in fact, it was acting as if there
    never was congestion).
      Also avoid a divide by zero (thus -NAN showing in densities).
* Change: In Anabatic::GCell, rename setEdgeOccupancy() into the more
    accurate forceEdgesCapacities().
      Note for Eric: only the first Edge on each side has it's capacity
    forced. What if there's more than one Edge ?
2018-02-21 00:16:50 +01:00
Jean-Paul Chaput 592c098ab2 Basic support for FreePDK 45 completed.
* New: In Commons, inspector support for std::pair<T,U>.
* New: In Hurricane::Layer, ContactLayer & ViaLayer, support for non
    square VIAs. The hole (cut) remains square, but the various metal
    extensions can now be different in X and Y. The ::getEnclosure()
    method now takes a flag EnclosureH / EnclosureV.
* New: In Hurricane::DbU, inspector support for:
         std::pair<DbU::Unit,DbU::Unit>
	 std::array<DbU::Unit,3>
     Must be defined here as DbU do not exists yet in Commons.h
* Bug: In Hurricane::Interval::getSize(), when the interval is "full span",
    do not return the difference between min and max, but directly DbU::Max.
    (the previous result was -1 !)
* New: In CRL Core Python/Technology.py, support for non square VIAs in
    the configuration files. Applied to FreePDK 45.
* New: In CRL::RoutingGauge, added a "symbolic" flag to tell if a gauge
    is for symbolic layout or not. Exported to Python.
* New: In Anabatic::AutoHorizontal::updatePosition(), differentiated
    computation for soure or target taking account of the VIA extension
    in the right segment metal (due to non-square VIAs).
* Change: In Anabatic::AutoHorizontal::_makeDogleg(), the dogleg is
    UP for HV gauges and DOWN for VH.
* New: In Anabatic::AutoSegment::_initialize(), create a cache of the
    various extension length for each layer (viaToTop, viaToBottom,
    viaToSame).
      New implementation of getExtensionCap() using the previous cached
    extension table. See updatePositions().
      New static functions to access the extension cache in the header:
    getViaTotopCap() ...
* Change: In Anabatic::AutoSegment, in various update methods, updateOrient()
    must always be called *before* updatePositions() as extensions are
    dependant on source/target.
* New: In Anabatic::AutoSegment::getEndAxes() compute the position of the
    first source and last target position (center/axes) on an *aligned*
    set of segments.
* New: In Anabatic::AutoSegment, add a new state flag SegAxisFixed to
    signal segments that can be put on only one track. Specific case
    to VH gauge for a M1 vertical terminal with a M2 vertical segment.
    The M2 is effectively bound to the M1 axis position.
* Bug: In Anabatic::NetBuilderVH::_do_xG_xM1_xM3(), in case of E/W global
    and only one RoutingPad the connexion to the RoutingPad was duplicated.
    It was valid, but totally stupid.
* Bug: In Anabatic::Session::_canonize(), for an aligned segment set,
    intersect the user constraints from all segments instead of only
    considering the canonical one.
      Issue a warning about too tight constraints only for symbolic
    gauges. It may be correct for the real ones.
* New: In Katata::DataNegociate::update(), more accurate computation
    of the perpandicular free interval. Use segment extension cap
    calculation. Create a special case for fixed axis segments allowing
    them to find alternative free interval, try under source and under
    target as they are likely to be draggable segments.
* Change: In Katana::Manipulator::relax(), use the extension cap value
    to compute the axis of the perpandicular segemnts.
* Change: In Katana::Manipulator::moveUp(), now move up the whole set
    of aligned segments instead of just the canonical one.
* Change: In Katana::NegociateWindow::loadRoutingPads(), more accurate
    TrackMarkers insertions for fixed terminals.
* New: In Katana::RoutingEvent::Key::Compare::operator(), segments with
    fixed axis are processed prior to any others.
* New: In Katana::RoutingEventLoop, store segment pointers instead of
    ids to generate more accurate error messages.
* Change: In Katana::RoutingPlane::create(), perform local track
    assignment only for HV gauges.
* Change: In Katana::SegmentFsm::_slackenLocal(), add a "dragMinimize"
    step in the automaton. Mutliple states transitions can occurs in
    a row if an action fails.
* New: In Katana::Session::_toIntervalAxis(), normalize interval
    bounds so they are on track positions (by shrinking the interval).
* Bug: In Katana::TrackMarker CTOR, the weigh computation was wrong.
2018-02-17 20:27:38 +01:00
Jean-Paul Chaput 7bcf47212b Improved management of AutoContactTerminal for VH gauges (real ones).
* New: In Anabatic & Katana, add the new "drag" feature.
    With VH gauges used by real technologies (M1-H, M2-V, M3-H) a new
    routing configuration that was not efficiently handled did appear.
      While the preferred routing direction for metal1 is officially
    horizontal, due to the way the standard cell must be designed,
    their metal1 terminals are still verticals (or punctuals).
      Thus, when connecting to them, we face the case where the metal1
    terminal (RoutingPad) is vertical *and* the metal2 wire is also
    vertical. With that setup, the position of the AutoContactTerminal
    via12 cannot be deduced, it may range all the way over the
    metal1 RoutingPad. What may define it's position is the metal3 the
    metal2 finally connects to. That, is, when we have one horizontal
    (the metal3) and one vertical (the metal1 RoutingPad).
      The intermediate wire of metal2 can be kept to a minimum size
    by "dragging" the via12 close to the via23 when the metal3 wire is
    moved.
* New: In Anabatic & Katana, problem of closely vertically aligneds
    RoutingPads in metal1 is managed first in PreProcess by restricting
    the span of the connecteds metal3 and in _makeDogleg also by restricting
    the span even more tightly (to the RoutingPad itself).
* New: In Anabatic::AutoContactTerminal, add the "drag" support.
    Automatically check if the connecting segment is in the same
    direction as the RoutingPad, if so, sets the "SegDrag" flag.
      The dragging state can be known with the "::canDrag()" predicate.
* New: In Anabatic::AutoHorizontal, add the "drag" support.
    The drag state can be known with the "::isDrag()" predicate.
      In "::_makeDogleg()", when making a dogleg on a dragable segment
    pass the drag state correctly and restrict the perpandicular span
    of the perpandicular to the RoutingPad (though segment user constraints).
    If we make a dogleg on the metal2 is it likely than we cannot go
    straigth out vertically from the RoutingPad, so the new perpandicular
    *is* restricted to the RoutingPad span.
      Idem for AutoVertical.
* New: In Katana::Manipulator, add method "::dragMinimize()" which find a
    hole where to minimize a draggable segment. We finally did not use it,
    but keep it for potential further use.
* New: In Katana::PreProcess, adds a "protectAlignedaccesses()" local
    function to check for vertically aligned metal1 RoutingPads, in that
    case setup user constraints on the metal3 segments so they cannot
    completly cover the other RoutingPad with metal2.
      We also keep a "metal2protect()" function that create a fixed segment
    to lock/protect a RoutingPad. Not used for now.
* New: In Katana::Session, add a RoutingPad locking event mechanism.
    This allows us to request the creation of a locking (fixed segment)
    over a draggable segment. Not used for now.
      Lock events are processeds before all others as they create new
    TrackElements.
* New: In Katana::Track, "::getNextFree()" and "::getPreviousFree()"
    method to find the nearest free interval in a Track after/before a
    position.
* Bug: In Anabatic::AutoHorizontal::getConstraints(), merge with user
    constraints *only* if it's not an empty interval (as we use min/max
    functions). Idem for AutoVertical.
* Bug: In AutoSegments_OnContacts::Locator::isValid(), the boolean test
    must be inverted. Seems it never worked, but we never used it until
    now...
2018-01-25 11:58:04 +01:00
Jean-Paul Chaput ba3ddafdf5 Adjustements for analog routing.
* Change: In Anabatic::GCell::doGrid(), remove the "3 slice height"
    limit (for small digital analog blocs).
* Bug: In Anabatic::NetBuilder::setStartHook(), perform a check for
    a RoutingPad still on a Plug. Diplay an error instead of crashing.
* Bug: In CRL::RoutingLayerGauge::getTrackIndex(), the upper bound
    of the track interval must be included instead of excluded.
* New: In Hurricane::Cell, add a StayOnPlugs flags for flattenNets().
    To keep the RoutingPad occurrences on Plug instead of selecting
    physical components.
* New: In Isobar::PyNet, add setAutomatic() and isAutomatic() to the
    interface.
* Bug: In Katana::protectRoutingPads(), do not create protections on
    PinOnly layers (mostly metal1).
2018-01-10 12:45:00 +01:00
Jean-Paul Chaput 95aba574a5 Happy New Year 2018 ! Update license years... 2018-01-06 17:55:44 +01:00
Jean-Paul Chaput 3d0431b238 In CRL, update real conf. files. Smarter management of pin in LEF parser.
* Change: In CRL Core, etc/, update the configuration files of real
    technologies. Mostly for FreePDK 45. This work is also done for
    AMS c35b4 (350nm) but in a private (SoC) git repository.
      Added a new parameter 'lefImport.minTerminalwidth' for the
    minimum size (width) of a metal1 terminal in standard cells.
      Corrected bug of the minimum trace level which must be
    initialized to a great value and *not* zero;
* Change: In CRL Core, BlifParser, detect when there is no tie low
    or tie high defined, issue an error (connexion left open) but
    continue.
* New: In CRL::RoutingLayerGauge, new overlad of getTrackPosition()
    with the parameter set of getTrackIndex(). Used to know if a
    terminal is on-grid or not.
* New: In CRL::LefImport, smarter management of metal1 pins. Adds a
    _pinPostProcess() function to select the external components
    among the various shapes. If the gauge is VH, all the pin rectangles
    are translateds into vertical segments (even if the metal1 gauge
    says the tracks are horizontals).
      The _pinPostProcess() function adds as external components of
    a net, only the segments of a sufficent width as given in
    'lefImport.minTerminalWidth' and that are on-grid.
2018-01-06 16:18:33 +01:00
Jean-Paul Chaput 24d8fe5957 Cleaner support for real technologies (Hurricane, CRL Core configuration).
* Change: In Hurricane::Technology, in all the layer connexity methods
    (getLayers(), getMetalAbove(), getCutAbove(), getViaBetween(), ...)
    the "useWorking" parameter is replaced by a more accurate "useSymbolic".
      BEHAVIOR CHANGE: formerly, if a symbolic layer was requested, and
    none was found, NULL was returned. Now, if the symbolic layer is not
    found, we try to return the associated real one (same layer mask,
    but not flagged as symbolic, and usually with a lowercase name).
      All thoses changes have been propagated to Python bindings.
* Change: In Hurricane::BasicLayer and derived classes, rename the
    "isWorking" attribute into "isSymbolic" (to match the technology
    renaming).
* Change: In Hurricane::Cell::flattenNets(), ignore power, ground and
    blockage nets for the flatten.
* Change: In CRL Core, in coriolisInit.py and Technology.py helpers,
    rename the tables describing the technology as follow:
      - symbolicLayersTable --> compositeLayersTable
      - workingLayersTable  --> symbolicLayersTable
      - symbolicRulesTable  --> layersExtensionsTable
    This is to give the table names a more clearer semantic after
    merging real technologies configurations (testbench AMS c35b4).
      In particular, we need to define a composite layer for the
    real VIAs, and not only the symbolic ones. And with correct
    enclosures expressed in real dimensions (microns).
2017-12-27 13:13:29 +01:00
Jean-Paul Chaput 24d5e9f172 The min debug level has to be high (10000) and not zero.
* Bug: In Hurricane the ::tstream class must be initialized with a
    minLevel of 10000 instead of zero, as the minLevel go *towards*
    zero as the debug slice [min:max[ is expanded by DebugSession.
      This default value must be repeated in the CRL::System CTOR
    and in the coriolis2/etc/commons/misc.conf.
* Bug: In Hurricane::IntrusiveSet, uses "tsetw(n)" dedicated cdebug
    stream manipulator instead of the STL one.
2017-12-21 17:29:29 +01:00
Jean-Paul Chaput f87bcf717c Complete the modularization of the detail routing converter.
* New: In Anabatic::NetBuilder, set all the attributes as private and
    create accessors and mutators.
      Finish virtualising all GCell build methods and transfer them
    into the NetBuilderHV class.
      Build methods now return a boolean to tell if the GCell was
    processed or not, to allow cascading in the "big switch".
      Reorganise the "big switch" in separate sections only partially
    cascading.
      Truly fuse the *big switch* for channel routing and over-the-cells.
      Create a new method "_do_globalSegment()" to delagate the
    drawing of global segments between two GCell to the derived classes.
2017-12-18 18:15:14 +01:00
Jean-Paul Chaput 21ec6fdbad Correct the doxygen CSS to be compliant with 1.8.13+. 2017-12-03 03:19:10 +01:00
Jean-Paul Chaput 2b9c929f80 Compliance with cmake 3.0 (Debian 9.2). Corrects all warnings. 2017-12-02 14:30:05 +01:00
Jean-Paul Chaput 89dfc2179c Compliance with c++11 and clang 3.8.1 (Debian 9.2). 2017-12-02 14:25:03 +01:00
Jean-Paul Chaput 62a433ad3c In CRL Core, added helpers.overload() to modificate Python tuples. 2017-11-29 17:06:24 +01:00
Jean-Paul Chaput e51ff95337 Support for non-square routing pitch. Allow loading of "foreign" cells.
* New: In CRL Core, AllianceFramework::getCell(), adds a new Catalog::State
    flags to request the loading of a "foreign" cell. That is, a Cell which
    is *not* in the Alliance libraries, but in *any* library starting from
    the root library. This is a temporary hack to allow the Blif parser to
    run.
* New: In CRL Core, RoutingGauge::getHorizontalGauge() and
    RoutingGauge::getVerticalGauge() to avoid relying on either metal names
    or depth to know the vertical and horizontal default routing
    informations. They return the metal layers gauges *closests* to the
    substrate which are likely to have the lesser pitch.
* New: In CRL Core, BlifParser, new configuration parameters:
    "etesian.cell.zero" & "etesian.cell.one" to figure out what are the
    tielow and tiehigh cells (instead of having the ones from sxlib
    hardwired).
* New: In Etesian, add support for non-square routing pitchs, that is,
    the lowest vertical and horizontal pitches are not equal. Needs to
    work with two pitches (H & V) instead of one.
      The Configuration associated class now also provides the
    RoutingGauge (not only the CellGauge).
      Use a new Configuration setting "etesian.feedNames" to set up
    the names of the filler cells. This a string of comma separated
    cell names.
* New: In Anabatic, Session::_getNearestGridPoint(), use the new
    non-square grid scheme.
2017-11-26 20:31:38 +01:00
Jean-Paul Chaput 20eadc85f3 Bug: LEF/DEF includes in the wrong place. 2017-11-17 15:32:30 +01:00
Jean-Paul Chaput 2b3b847162 New LEF importer for real technologies.
* New: In CRL Core, added LEF importer for real technologies. This is
    still a work in progress. Exported in Python interface.
* Bug: In CRL Core, CellGauge::getRecord() correctly display DbU
    attributes.
* Change: In Unicorn, mofificate ImportCell and ImportCellDialog to
    support the LEF importer. Add a template layer so we can work with
    loaders returning Cell* or Library*.
* Change: In Unicorn::UnicornGui::getCellFromDb(), in addition to the
    Alliance loader, uses the DataBase::getCell() too (for Cells that
    are *not* in Alliance).
2017-11-17 11:48:20 +01:00
Jean-Paul Chaput bc1c7838d1 Reorganisation of technology configuration files.
* Change: In CRL Core, in coriolis2/etc the file an directory structure
    describing the technonolies is modified.
      Before, one technology was split in two: the symbolic part that
    may be shared across multiple real technology and the real technology
    itself. To configure this we needed in ".coriolis2/techno.py" two
    variables:
      * symbolicTechnology.
      * realTechnology.
      After, we duplicate the symbolic technology in each real ones, so
    to configure we only have to refer to one technology with the
    variable:
      * technology.
      Pure sympolic technologies are still availables, associated with
    a dummy real one.
      We provides:
      * 180/scn6m_deep_09  for MOSIS 180nm
      * 45/freepdk_45      for FreePDK 45nm (work in progress).
      * symbolic/cmos      for classical Alliance symbolic.
* Change: In CRL Core python/helpers, SymbolicTechnology.py and
    RealTechnology.py are now grouped under Technology.py.
2017-11-17 11:10:32 +01:00
Jean-Paul Chaput bed79c0156 New DataBase::getCell() and bug in Technology::getNthMetal().
* New: Hurricane::DataBase::getCell() method to search a cell through
    all the libraries of *all* the frameworks, not just Alliance.
    Also exported in Python interface.
* Bug: In Technology::getNthMetal() the function was not returning the
    right metal, there was an offset of one. And when the offset was
    0, no metal was even returned. Same fix goes for getNthCut().
      The fault was in Mask<>::nthbit().
* Change: In Hurricane::CellWidget, the initial window size is too tiny.
    Increase the size from 250 to 500 pixels.
2017-11-17 10:54:19 +01:00
Jean-Paul Chaput 4e8ac63408 In CRL Core Python helpers, new showPythonTrace().
* New: In CRL Core Python helpers, add a "showPythonTrace()" function to
    custom display the Python stack trace in case of exception. It ha
    been made to look like a gdb trace.
* In Unicorn, cgt.py, use showPythonTrace().
2017-11-03 15:41:29 +01:00
Jean-Paul Chaput c12a50b64b Integrate LEF/DEF 5.8 into the tree (Apache 2.0 licensing)
* New: As, starting from version 5.8, LEF/DEF parser/drivers are
    availables under Apache 2.0 license, integrate them inside the
    project. Rewrite the Makefiles into CMakeLists.txt, build only
    the C++ version. Create an entry for the LEF/DEF doc in the
    documentation.
2017-10-30 15:38:29 +01:00
EricLaoGitHub fac6076353 Merge branch 'devel_anabatic' of ssh://bop.soc.lip6.fr/users/largo2/git/coriolis into devel_anabatic
Conflicts:
	anabatic/src/Dijkstra.cpp
	anabatic/src/Edge.cpp
2017-09-15 16:06:15 +02:00
Jean-Paul Chaput 809a91c9c1 Added Routing Gauge for 2-Metal technologies only.
* New: In CRL Core, etc/cmos/kite.conf new routing gauge "sxlib-2M" for
    two metals only technologies.
* New: In CRL Core, python/helpers/kite.py, new parameter to set the
    routing gauge to be used: "kite.routingGauge" (default: "sxlib").
* Change: In CRL/AllianceFramework.cpp, forgot to put the Cell gauges
    and RoutingGauges in the object Records (Inspector).
* New: In pyCRL/PyAllianceFramework.cpp, export the setRoutingGauge()
    function.
2017-08-18 18:16:43 +02:00
EricLaoGitHub d4826b6a0d Merge branch 'devel_anabatic' of ssh://bop.soc.lip6.fr/users/largo2/git/coriolis into devel_anabatic 2017-08-07 09:53:46 +02:00
Jean-Paul Chaput cafced2bf8 Katana manage wide wires, and they can also be symmetric.
* New: In Anabatic::AutoContact and the derived classes, manages wide
    wires. The contact self dimension itself according to the segments
    it is connected to. Special case for the AutoContactTerminal which
    also read the size of the component it is anchored upon.
      New refresh method "updateSize()" and flag CntInvalidatedWidth.
    to compute the size.
      In AutoContactTerminal, compute the constraint box according to
    the width of the segment.
* New: In Anabatic::AutoSegment, flags are now implemented as "static const"
    attributes of the class. The flags are stored into a uint64_t as
    they are more than 32.
      Added new flag "SegWide" and associated predicates.
* Change: In GCellTopology::_doHChannel() and GCellTopology::_doVChannel(),
    uses the simpler overload of AutoSegment::create() in order to detect
    the wire width automatically.
* New: In Katana::Manipulator, split insertToTrack() and forceToTrack()
    into a one-track method and a segment level method that iterate over
    the track span of the segment.
* New: In Katana::SegmentFsm, for each cost in the table, now allow access
    to a specific track. So the base functions have now two parameters:
    "icost" and "itrack" (has a cost can have multiple tracks in the case
    of wide segments).
* Change: In Katana::TrackElement, remove the index of the element inside
    it's track, as for a wide segment it will not be meaningful for the
    non-base track. This means that we have to use the Track::find()
    method each time instead.
      Remove the wide flag, as it is a duplicate of the one in AutoSegment.
      Added a getTrackCount() method to tell the number of track the
    segment is inserted into. Needed in the Track destroy step to delete
    a segment only when the last track that refers it is destroyed.
      Added getSymmetricAxis() to correct the computation of the symmetric
    base track in case of wide segment as the base track is not centered
    but the the leftmost one.
* Change: In Track::insert() insert wide segments in their whole track span.
* Change: In TrackCost, create an array of costs according to the segment
    track span.
* Change: In TrackSegment::create(), now activate the factory and create
    wide segments.
* Bug: In Katana::AutoSegments_Perpandicular, correct the debug indentation
    problem (ever shifting to the right).
2017-07-28 15:30:22 +02:00
Jean-Paul Chaput a033e3ba98 More doc unification and cleanup. 2017-07-17 19:12:18 +02:00
Jean-Paul Chaput c339e5c9e3 Check for any version of Python 2, instead of 2.7. 2017-07-11 17:52:58 +02:00
EricLaoGitHub 06d818695f Dijkstra can handle mixedsignal wires. 2017-06-21 18:02:37 +02:00
Jean-Paul Chaput e12e45e495 Rename SymmetricStage into PairSymmetrics, plus small cleanup. 2017-05-26 13:32:30 +02:00
Jean-Paul Chaput e78c3f21ef Added analog type on segment NetRoutingProperty.
* New: In Anabatic_AutoSegments collection, added a Flag to the constructors
    to allow different behavior between digital and analog modes.
      For "Aligneds" and "Perpandiculars" collections, now manage a new
    Flag WithDoglegs to follow aligned globals through local doglegs
    (for analog nets).
      Adjust the log level of collections to 144 (formerly 145).
* New: In Anabatic::AutoSegment, new flag SegAnalog for segments that are
    part of an analog net.
      Note that with this flag, we reach the 32 bits limit...
* Change: In Anabatic::Constants, Flags are now declared as BaseFlags
    objects and *not* uint64_t. This avoids overload resolution problems with
    arithmetical overload of the operators.
      The BaseFlags/Flags types are now completly "isolated" from the
    uint64_t, it has the advantage of showing where unwanted previous implicit
    conversions where occuring.
* Change: In Katana::Constants, Flags values are now of BaseFlags type instead
    of uint64_t.
* Change: In Anabatic::Dijkstra, lots of log cleanup.
* Change: In Anabatic::GCell::getSide(), make the "shrink" parameter visible
    to allow to substract the topmost and rightmost track for axis span
    computation in AutoSegment::computeOptimal(). Used for analog mode.
* Change: In NetRoutingState, added a flag for analog mode. Use uint32_t
    for the flags type.
* New: In Isobar, export the NetRoutingState and NetRoutingExtension objects.
2017-05-20 12:33:12 +02:00
Jean-Paul Chaput c44c6b13f3 Adjust Katana event sort. CMake detection of Python 2.7 only.
* Change: In all top CMakeLists.txt, force the use of Python 2.7 as
    we do not compile against 3.x flavors. Do not use the "EXACT"
    flags as it will not recognize 2.7.x versions.
* Change: In Katana::RoutingEvent::Key::Compare(), preliminary
    experiments shows that the best sorting order is:
      - Lower layer first (i.e. M2 -> M3 -> M4 -> ... )
      - Longer segments first.
      The later seems to be counter-intuitive. Guess is that placing
    the small ones first generate a more important fragmentation of
    the big ones. They are placed too early and are difficult to move
    afterwards.
      Another feature to test is *not* inserting pushed left/right
    segments if they are not *already* routed.
* Change: In PyKatanaEngine.runNegociate() now takes a flag argument,
    provided through the new PyKatanaFlags exported object.
    (doChip.py must be changed accordingly)
2017-05-11 17:26:56 +02:00
Jean-Paul Chaput db8e51524f Deterministic destruction of Components.
* Change: In Hurrican::Component::_preDestroy(), the cascaded destruction
    of slaves Components and subsequent ring merge and Rubber creation
    was using set<> sorted on pointer values. This was making the order
    of destruction of the slaves components non-deterministic. Now the
    sets are sorted according to their id (see Entity).
* Change: In Hurricane::SharedProperty, the _ownerSet is now a vector<>
    instead of a set<>. This will slow the search process, but hopefully
    this is needed only during construction/destruction of a Property
    so the slow down shouldn't be too much.
      This has also an impact on Hurricane::Relation.
2017-05-03 18:09:51 +02:00
EricLaoGitHub 8bf1f63557 Pre-commit for updating git depositary. 2017-04-18 11:58:55 +02:00
Jean-Paul Chaput 880b1817ce In CellPrinter, adds the DPI and the Orientation as config. parameters. 2017-03-15 17:59:00 +01:00
Jean-Paul Chaput 00ea8f0205 Display selection when drawing on printing devices.
* Bug: In Hurricane::CellWidget, when setting up a state of a CellWidget,
    the selection was not copied. Now copy the SelectorCriterion (clone).
* New: In Hurricane::SelectorCriterion, add a clone() method.
* Change: In CRL Core, in etc/common/display.conf, for the Printer.Coriolis
    style, lower the thresold of display for the substrate layers so they
    are shown even in small zoom mode.
2017-03-15 14:37:32 +01:00
Jean-Paul Chaput b99a362509 Apaired segments building for symmetric routing (step 1).
* Change: In Hurricane::BaseFlags, store flags in uint64_t instead of
    unsigned int because we start to need more than 32 different flags
    in some tools.
* New: In ::getString() & ::getRecord() templates, add support for
    std::array<>.
* Change: In CRL::ToolEngine, add support for timer (time & memory
    measurements) displaced from Katabatic. This way all ToolEngine
    can use this feature. The _postCreate() method display the
    memory just after ToolEngine allocation.
* Change: In Etesian::EtesianEngine, make use of the ToolEngine
    builtin timer (remove the local one). Forgot to call the base
    class _postCreate() and _preDestroy().
* Change: In Anabatic::AnabaticEngine, make use of the ToolEngine
    builtin timer (remove the local one).
* New: In Anabatic, new AutoSegments_Connecteds() collection. This
    Collection allows a deterministic walkthough *all* the AutoSegments
    connected either to source or target of one AutoSegment.
* New: In Anabatic::AutoContactTerminal::isEndPoint() to check if an
    AutoContactTerminal is the *only one* anchored on a RoutingPad,
    thus being a true "end point" and not a kind of feed-through.
* New: In Katana::KatanaEngine, added support for symmetric nets.
    Created new class DataSymmetric to store symmetric information
    of a net (mainly the paired AutoSegments).
      Added KatanaEngine::runSymmetricRouter(), for now only build
    the DataSymmetric informations. More to come...
* Change: In Katana::GraphicKatanaEngine::_runTest(), now perform
    symmetric information building the non-symmetric routing.
2017-03-12 19:34:12 +01:00
Jean-Paul Chaput 0925afa188 UpdateSession forgotten in Blif parser. 2017-02-16 09:57:43 +01:00
Jean-Paul Chaput 4163fc044a In Anabatic, check if there is at least one METAL1 in singleGCell().
* Bug: In Anabatic::singleGCell(), in some analogic design, there may be
    not a single METAL1 in the GCell. Issue a clean warning instead of
    going ashtray.
* Change: In CRL.etc/technology.cong & CRL.etc/display.conf, add a "metbot_r"
    as a real layer when "metbot" symbolic layer is distinct from a normal
    metal.
2016-12-15 19:25:05 +01:00
Jean-Paul Chaput bdc474d7fc Quieter helpers initialisation, isderived() alternative to isinstance().
* New: In CRL.python.helpers, all methods make use of the quiet mode to
    allow completly silent initialisation.
      Introduce isderived() function to check the derivation relationship
    of two C++ encapsulated classes by Isobar. The Python isinstance do
    not work, all C++ wrapped classes are of the base type 'type'.
    isderived() uses the MRO mechanism (Method Resolution Order) as a
    workaround. I can't find in the documentation if it's the expected
    behavior or if i did miss something in when building my classes.
2016-12-12 17:06:53 +01:00
Jean-Paul Chaput 41856f8c50 In CRL Core, do not set stratus1.mappingName to "not_set" (but ""). 2016-12-07 13:53:01 +01:00
Jean-Paul Chaput b2e955185b Default stratus1.mappingName was not set correctly.
* Bug: In CRL.python.coriolisInit(), when it's not set, the stratus1.mappingName
    configuration variable is equal to "" and *not* "not_set".
* Bug: In Etesian::EtesianEngine::toColoquinte(), followup of the previous
    bug, bad FIXED/PLACED test when the AB is set.
2016-12-07 12:21:40 +01:00
Jean-Paul Chaput 83382f252c For build under 32 bits, remove all use of long.
* Bug: In Hurricane::DbU, replace long by DbU::Unit (aka int64_t) in all
    remaining occurrences.
* Change: In Hurricane::DbU::getValueString(), rewrite using ostringstream.
* Change: In Hurricane, in PyHurricane.h, PyAny_AsLong<> template to
    convert any kind of Python integer into DbU, making sure we always
    use 64 bits integers (long long for 32 bits and long for 64 bits).
      PyDbU_FromLong<> template to peform the reverse, DbU to Python
    integer in 64 bits (either using PyLong_FromLong() or
    PyLong_FromLongLong()).
* Bug: In Isobar, in PyArg_ParseTuple(), never use the "l" direct
    converter when reading a DbU. Instead read a PyObject then convert
    using PyAny_AsLong<>. This ensure to never do a truncature.
2016-11-30 21:50:25 +01:00
Jean-Paul Chaput 3758bd098e attachPlugOrPin() do not core-dump when there is 0 plugs+pins.
* Bug: In CRL::ToolBox::attachPlugOrPin(), simply returns when there is
    no plugs/pins to connect instead of doing an assert().
* Change: In Hurricane, more informative trace information for Python
    ProxyProperty managment.
* Bug: In Stratus, when merging nets with the "<=" operator some table
    of lookup of Hurricane Net are not updated correctly. As I don't
    understand well enough the Stratus code **is is not corrected**.
2016-11-27 00:04:58 +01:00
Jean-Paul Chaput a376d34cfe Accurate Qwt detection (Qt4 vs. Qt5). DbU forced to 64 bits.
* Change: In bootstrap/FindBootstrap.cmake, new setup_qwt() macro to
    link with the Qwt library build with Qt 5 *or* Qt 4 and not the
    first found.
* Change: In Hurricane/DbU, uses <int64_t> instead of <long> to always be
    sure that we use 64 bits integers for coordinates.
* Change: In Katana/KatanaEngine::_gutKatana() checks that the
    RoutingPlanes have been allocateds before trying to delete them.
2016-11-23 11:29:28 +01:00
Jean-Paul Chaput 47c9961ef3 First intergration of the Analogic router parts.
* New: In Anabatic::AutoSegment, introduce a the kind (associated to a
    flag) "LongLocal". Analog GCells can be very wide, so at least some
    carefuly choosen long local segments must be took into account as
    attractors in the computation of the optimal axis.
* New: In Anabatic::AutoSegment::computeOptimal(), take LongLocal into
    account as attractors.
* Change: In ::GCellTopology constructors compare the layers of the
    RoutingPads using layer masks instead of Layer pointers. Allows to
    find both "METALx" (symbolic) and "metalX" (real).
* Change: In ::GCellTopology::_doHChannel(), _doChannel(), _doStrut()
    and _doDevice(), tag long locals as "LongLocal". This need to be
    reviewed as it as bind done a bit too quickly.
* Change: In Anabatic::AutoSegment, due too a much bigger span of the
    analogic GCells the _optimalMin & _optimalMax bitfields must use
    16 bits instead of 8 (they where overflowed).
* New: In Katana, reorganisation of the initialization procedure to fit
    both digital and analogic cases. Create an analogInit() method.
* Change: In Katana::RoutingEvent, the _tracksNb and _tracksFree bitfields
    where too short for the Analog GCell size, now uses 16 bits instead of
    6.
* Bug: In Katana::GraphicKatanEngine::drawGCell(), skip drawing of a
    GCell if *both* width and height are under 150 pixels.
* New: In Katana::Session, add a new isOpen() method.
2016-10-04 17:12:58 +02:00
Jean-Paul Chaput ce00b37cbf Enable the display of GCells as a density map (and not boundaries).
* Bug: In Anabatic::RawGCellsUnder, *again*, the north and east borders
    of the whole area *are* includeds (shut up disgraceful warning).
* New: In Anabatic::GCell, add a display mode to select between boundary
    display (for analogic) and density display (for numeric).
* Bug: In KatanaEngine::runGlobalRouter(), do not check if an Edge cannot
    be desatured when the vector or overloaded Edges is empty.
    (one less disgraceful warning)
* New: In GraphicKatanaEngine::drawGCell(), support for drawing the GCells
    in density mode. Use the fire scale and the MaxDensity mode.
      Setup the GCell drawing mode in GraphicKatanaEngine::initGCell().
* Change: In GraphicKatanaEngine::drawEdge(), adjust the various thresholds
    for showing the Edge and its label.
* New: In CRL Core, adds "anabatic.gcell.displayMode" to the set of Anabatic
    parameters.
      Adjust the showing threshold for GCells in "display.conf" so when the
    zoom level is low, we still can see the density map.
2016-09-10 18:49:48 +02:00
Jean-Paul Chaput f7e981a840 Fix bug & compatibility issues with Qt 5.
* Bug: In Hurricane, in NetlistWidget CTOR, the horizontal header was set
    up assuing that there was (at least) three sections (column) in the
    model, which was wrong. Now it is done in the setCell() method which
    know the exact number of sections.
      It was a bug in both Qt 4 & 5, but was showing only under Qt 5.
2016-08-09 17:42:13 +02:00
Jean-Paul Chaput 30b636ffb8 Typo in alliance.conf for scmos_deep_018 techno. 2016-08-07 12:21:18 +02:00
Jean-Paul Chaput e19893ac32 Fix divide by zero in GCells of null size.
* Bug: In Anabatic::GCell, when width and/or heigh is null, do not try to
    compute densities as it will trigger a divide by zero (and do not make
    much sense anyway).
* Change: In CRL Core, in cmos/alliance.conf, honor the ALLIANCE_TOP variable
    if it is found in the user's environement.
2016-08-06 18:19:22 +02:00
Jean-Paul Chaput 3835d6f7ad Diplay function, file & line number in the backtrace (like gdb).
* New: In Bootstrap, add cmake detection for libbfd.
* New: In Hurricane, in Backtrace, add BFD support to read debuginfo from
    the shared libraries (aka DSO) when compiled with "-g". This avoid the
    tedious step of running gdb after generating a core dump. It is also
    mandatory in ExceptioWidget to known from where an exception was thrown
    as Qt::notify() block all C++ exceptions.
      Currently works only under Linux (gcc or clang), may be extended in
    the future.
      The BFD reading is based on the small utility from:
          Don Hatch (hatch@plunk.org)
          http://www.plunk.org/~hatch/goodies/backtracefilt.C
      And small trinket: adjust the size of the window for high DPI screens.
* New: In CRL Core & Unicorn add link toward libbfd, if needed.
2016-08-06 18:15:06 +02:00
Jean-Paul Chaput 1e21651e1e In CRL Core, in alliance.conf use ALLIANCE_TOP environement variable if set. 2016-08-01 12:13:44 +02:00
Roselyne Chotin-Avot 276fabf7ff Compatibility with clang 7.3 and MacOSX 10.11 2016-07-20 15:21:50 +02:00
Jean-Paul Chaput 601e3d3da1 Anabatic transient commit 8. More Dijkstra bugs correcteds.
* Bug: In Anabatic:
    - In _propagate(), on reaching a target, forgot to remove it from
      the queue before pushing it back with the new distance. It also
      simplificate the core algorithm as target as treated normal nodes.
* New: In Anabatic:
    - Update cdebug to use the fastest macro version.
    - More readable drawings of GCells and Edges.
    - Added timer support.
    - The distance is now computed in DbU::Unit (aka long) and not in
      normalized float.
    - The distance function is now a callback (std::function<>) that
      can be changed (a default is provided at initialization).
    - New concept of branch in the agglomerated connex component.
      Each trace back part create a "branch" (tagged with a "branchId").
      When a node is reached with the same distance, but from two
      different branches, choose the the branch that was lastly created.
      This create a slightly different tree which grows outward from
      the newest branches.
    - Makes the horizontal edges *slightly* longer than the vertical ones
      to skew the tree to use vertical edges, as it is usually less
      congested than the horiontal one (due to metal1 cell terminals).
      It is also my understanding that it is useful to reduce the
      number of vias, whithout introducing a via cost.
* New: In Bootstrap:
    - Script sprof.py to perform sprof & demangle libraries execution
      profile.
* ToDo: In Anabatic:
    - Corner optimization. Sometimes when two corners are possible, the
      wrong one is choosen. That is, one of it's edge cannot be used for
      further grow of the tree.
2016-06-17 13:09:34 +02:00
Jean-Paul Chaput 36a982ce47 Merge branch 'devel' into devel_anabatic
Catch up the Lemon removal and cdebug correction.
2016-06-11 21:58:25 +02:00
Jean-Paul Chaput f68ac4d0e6 Argh. cdebug was slowing down the program too much.
* Change: In Hurricane Commons.h, even when cdebug print nothing, it slow
    down the program (three times for Kite!). Create a macro cdebug_log
    which calls cdebug *only* if the debug level is active.
2016-06-11 21:56:12 +02:00
Jean-Paul Chaput 747027f23a Simplification of the Hurricane::Observer mechanism.
* Change: In Hurricane::Observer, simplification of the template so that
    we can use it directly instead of creating a derived class with an
    implementation of Observer::notify(). Now the implemenation is the
    same for all and just calls a notify() method on the owner object.
      Create a StaticObservable for fast access of the observers. This
    is mainly a fixed size table (array<>) with oberservers at known
    indexes. This way we can go from the obervable to the observer
    owner in one indirect access (or so I hope).
* Change: In Hurricane::CellViewer, use the new observers.
* Change: In Hurricane::ControllerWidget, use the new observers.
* Change: In Hurricane::CellWidget, set the winidow initial size to a
   more sensible 500px.
* Change: In CRL::LibraryManager, use the new observers.
* Change: In CRL::LibraryManager, use the new observers.
* Change: In CRL, in display.conf & technology.conf, modification for
    the ST hcmos9gp capacitors.
2016-06-03 17:19:46 +02:00
Jean-Paul Chaput a4655aec8b Anabatic transient commit 2.
* Change: In Hurricane, in CellWidget, enable the drawing of ExtensionGos
    according to the the threshold paramaters (as layers do).
* Change: In CRL Core, provide DrawingStyle for Anabatic::GCell &
    Anabatic::Edge. Use the exact name of the ExtensionGo.
      In kite.conf, add settings for the size of an edge as the optimal
    size may change between analog & digital designs.
* New: In Anabatic:
    - Support for fast position query using a matrix.
    - Computation of the Edge capacity, based on the routing gauge parameters.
    - Graphic display of the edges capacity. Added configuration
      parameters to size the bounding box of an Edge.
* Bug: In Anabatic:
    - GCell::_moveEdges was both too complex (some cases never arise the
      way we divide GCells) and bugged.
2016-05-26 13:56:16 +02:00
Jean-Paul Chaput 82cff69d9f Complete rewrite of the trace system (now a stream).
* Change: In Hurricane, in Flags add operator overload for "int" type
    and not only "unsigned int". Otherwise the compiler complaints about
    ambiguous overload when using enum values which are considered as
    "int".
      Simpler code for the BaseFlags::contains() method.
      Added implicit conversion from BaseFlags toward bool type.
* Change: In Hurricane, in Commons, complete replacement of the previous
    two trace systems (trace & ltrace) by a stream-based one.
    As it is a true object it is much less fragile than the one based
    on defines (but maybe a little slower).
      Define a reservation table for the trace levels for all the
    Coriolis & Chams components.
* Change: All tools, use the new trace system.
2016-05-17 23:00:06 +02:00
Jean-Paul Chaput 1c7cbbe6f7 Typo in error message raising an exception. 2016-05-06 17:42:05 +02:00
Jean-Paul Chaput babf23f303 Let the init system guess "stratus1.mapppingName" value.
* Change: In Bootstrap, in coriolisEnv.py no longer sets the environment
    variable STRATUS_MAPPING_NAME (guessed by init).
* Change: In CRL Core, in System CTOR sets the default value for
    "stratus1.mappingName" to "not_set" so the init can known it is not
    set.
      In etc/coriolis2/*/stratus1.conf, do not set "stratus1.mappingName".
      In coriolisInit.py, now guess the value of "stratus1.mappingName"
    if it has not already been set by the user. The complete setting
    process is as follow (decreasing priority):
      1. Setup by the user in his ".coriolis2/setting.py".
      2. A "stratus.xml" file is detected in the current technological
         directory (example: etc/coriolis2/65/cmos065/setting.xml).
      3. Fallback value to "etc/coriolis2/stratus2sxlib.xml".
2016-05-06 13:15:10 +02:00
Jean-Paul Chaput d2209579ab Modify the init system to manage NDA restriced configuration files. 2016-05-03 13:32:06 +02:00
Jean-Paul Chaput f2c036ac6d Corrections in C-Python interface required by Analagic (CHAMS).
* Change: In Hurricane, in PyHurricane.h, in all DirectSet*() macros,
    suppress the third parameter giving the function name. It is now
    build from stringification of other parameters.
      The various macros calls are also modificated all througout
    Isobar.
      Added PyAny_AsInt() to convert a Python Int or Long into an int.
    Maybe we should manage only long, because the type difference seems
    ambiguous in Python itself.
* Change: In Hurricane, in PyHurricane.h, in DirectGetBoolAttribute()
    deduce the function name to display in messages from the arguments.
      Idem for DirectIsAFromCStringAttribute(), DirectGetIntAttribute(),
    DirectGetUIntAttribute(), DirectGetDoubleAttribute() and
    DirectGetStringAttribute().
* New: In Hurricane, in PyHurricane.h, new macro DirectGetNameAttribute()
    to build accessors for method returning a Name.
* New: In Hurricane, in PyHurricane.h, new macro DirectSetIntAttribute()
    to build modificators taking int arguments.
* Bug: In Hurricane, in PyHurricane.h, in macro DirectSetBoolAttribute(),
    the check for a boolean PyObject was wrong, leading the macro to
    systematically emit a Python exception.
* Bug: In Hurricane, in PyInstance method table, PyLibrary_create() was
    registered as a NOARGS function, but it *do* have arguments, change
    to VARARGS.
2016-05-01 15:50:27 +02:00
Jean-Paul Chaput 09e5784bc4 Bad active width extension on PTRANS/NTRANS in scmos_deep_018.
* Bug: In CRL Core, in scmos_deep_018/technology.conf, the extension
    width in PTRANS/NTRANS active layer was too big. 4.0l instead of
    3.0l. This was preventing seeing gaps in the active layer by cgt.
    They did show up under Graal though...
2016-04-14 21:35:08 +02:00
Jean-Paul Chaput b46c06042b Added Python support for AllianceLibrary in CRL Core.
* New: In CRL Core, added support for AllianceLibrary.
2016-04-13 18:26:08 +02:00
Jean-Paul Chaput 2a40fa7d92 New "obstacleDw" for Kite.
* New: In CRL Core, in RoutingLayerGauge, adds a new parameter "obstacleDw".
    It represents the distance to add from the *edge* of a blockage segment
    to the next *axis* of a routing track. This was previously computed as
    the pitch minus the mimimum half wire width. This works if the pitch
    is *equal* to the wire width plus the minimal distance (edge to edge).
    But if the wire width is less, than it leads to too great a distance
    around obstacles, making them bigger than they are. And potentially
    blocking everything. To summarize:
         before:  obstacleDw = pitch - wireWidth/2  (deduced)
         after:   obstacleDw = explicitly setup, usually:
                               pitch - max(wireWidth)/2
      Modify the Alliance configuration helper and the various kite.conf
    file accordingly.
* New: In Kite, in BuildPowerRails, make use of "obstacleDw" to compute
    the footprint of a blockage.
2016-04-13 18:21:09 +02:00
Jean-Paul Chaput a4e46444e2 Various problems in the BLIF parser.
* In CRL Core, in BlifParser, when an input terminal of an instance is
    either connected to power or ground, insert a zero_x0 or one_x0
    Cell to avoid direct connection to the supply (the router is not
    able to do it). The names and terminals of the intermediate cells
    are hard-wired for now (to SxLib).
      When merging Nets, always merge internal nets into external ones
    as the other way around is not always legal.
2016-04-04 17:54:09 +02:00
Jean-Paul Chaput d641f236a3 Suppress warnings when flatening a Cell twice.
* In Hurricane, in Cell::flattenedNets(), if the cell has already been
    flattened, do not issue warnings about duplictated flattened nets.
* In Hurricane, in Net, allow Net::setName() to switch the main name
    for an alias without complaining about an already used name.
* In Cumulus, in RSavePlugin.py, when "views" is supplied in keywords
    (kw) arguments, override the default instead of merging with it.
    This is to allow scripts to save exactly what views they want.
2016-04-02 14:47:10 +02:00
Jean-Paul Chaput 6ad644fac2 New relation for slaved ABs. Do *not* delete blockage nets.
* Change: In Hurricane, in DataBase::CellDepths() the recursion stop
    criterion must be Cell::isLeaf() and not Cell::isTerminal() as
    the second one can be used to hide some levels of hierarchy,
    and we want all of them in a blob.
* New: In Hurricane, in Cell, create a new Slaveds relation to keep
    track of all the Cells with a slaved abutment box. This work is
    incomplete as we do not manage the behavior in case of merge or
    Cell destruction or slaving Cells with aready slaveds ones.
      Modify Cell::setAbutmentBox() to work in both autonomous and
    slaved mode.
* New: In Hurricane, in Net, add a new type of Net: BLOCKAGE this
    avoid us to be dependant on the framework pattern recognition.
    (change propagated to the Python support)
* New: In CRL Core, in the various drivers, recognize blockage nets
    as such and set their type accordingly.
* Change: In CRL, in Toolbox::deleteEmptyNets(), preserve blockage
    Nets. This was the cause of crashs in Kite::BuildPowerRails() as
    we where trying to use a deleted blockage net...
* Bug: In Hurricane, in NetAlias, do not write NetAlias as a name
    but as a type. They were not read back and moreover staying in
    the JSON parser stack.
2016-03-30 17:47:00 +02:00
Jean-Paul Chaput a78882fd5b Clocks in BLIF parser. In RSavePlugin, flags to select views to save.
* Bug: In CRL Core, in BlifParser, recognize clocks (Alliance patterns).
* Change: In Cumulus, in RSavePlugin, "kw" manage a new "views" to
    specify which views must be saved. Physical by default, but sometimes
    we need logical as well. If the design contains uniquified cells,
    save the logical view.
      In ClockTree, abort the clock tree building if the design has no
    top level clock.
* Change: In Katabatic, in GCellTopology, adds 2G_5M1 configuration.
* Bug: Kite, in BuildPowerRails, if we are not in a chip the nets
   composing the H-Tree must be protecteds be blockages.
2016-03-26 11:59:32 +01:00
Jean-Paul Chaput 1ef4bc122f Forgot to catch Bug exception. GCell manage 5 terminals of a Net.
* Bug: In Hurricane, in HApplication, ExceptionWidget ans PyHurricane.h,
    forgot to catch the Hurricane::Bug exception which was leading to
    terminate() without explanations.
* Change: In Katabatic, In GCellTopology, now support one GCell with
    five metal1 terminal of the same net. This unlikely configuration
    did appear in the SNX for the first time...
2016-03-17 16:54:53 +01:00
Jean-Paul Chaput b9da9531a7 The VHDL driver must not rename Cell/Instance/Net names.
* Change: In CRL Core, the Alliance VHDL (vst) driver was renaming the
    names of Cells, Instances and Nets into their VHDL conterparts.
    But if we still work on the Cell after saving it, the Net renaming
    will cause touble, especially when there are DeepNets. The name
    of the DeepNet is generated from the Occurrence name with the dot
    separator which is *not* a VHDL valid character for name, thus
    after that the DeepNet name has changed it cannot be reassociated
    with the Occurrence path. This was causing double-flattening issues.
2016-03-14 01:01:21 +01:00
Jean-Paul Chaput b2374c73b8 scmos_deep_018 switched to nsxlib. Minor bugs in plugins. 2016-03-10 17:05:36 +01:00
Jean-Paul Chaput 4262d396e9 Added METCAP layer, for MIM capacitors. 2016-03-06 12:40:23 +01:00