mirror of https://github.com/efabless/caravel.git
285ef6b642
~ update the following views: def mag verilog spef(all corners) + add the ability to override the interactive script filename + add the ability to run openlane regression using regression.config file ~ change GRT ADJUSTMENT values ~ change pointers to some files for workarounds !important the interactive script still needs updates !important this was done using old openlane v0.22 and its matching pdk !important known workarounds: - a custom techlef is used where large metal spacing rules are the only ones present to avoid violations by the router - some odd behaviour happening when a macro has a lef view with a non zero origin. so the power routing cell is (temporarily) modified to have a zero origin and its placement has been shifted which doesn't match the power routing mag. - the old openlane doesn't generate multi spef corners. they are generated using timing-scripts repo |
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| .. | ||
| __user_analog_project_wrapper.v | ||
| __user_project_wrapper.v | ||
| caravan.v | ||
| caravel.v | ||
| caravel_clocking.v | ||
| chip_io.v | ||
| chip_io_alt.v | ||
| constant_block.v | ||
| digital_pll.v | ||
| gpio_control_block.v | ||
| gpio_defaults_block.v | ||
| gpio_defaults_block_0403.v | ||
| gpio_defaults_block_0801.v | ||
| gpio_defaults_block_1803.v | ||
| gpio_logic_high.v | ||
| housekeeping.v | ||
| mgmt_protect.v | ||
| mgmt_protect_hv.v | ||
| mprj2_logic_high.v | ||
| mprj_logic_high.v | ||
| spare_logic_block.v | ||
| user_id_programming.v | ||
| xres_buf.v | ||