caravel/verilog
kareem 285ef6b642 reharden!: caravel
~ update the following views:
def
mag
verilog
spef(all corners)
+ add the ability to override the interactive script filename
+ add the ability to run openlane regression using regression.config
file
~ change GRT ADJUSTMENT values
~ change pointers to some files for workarounds

!important the interactive script still needs updates
!important this was done using old openlane v0.22 and its matching
pdk
!important known workarounds:
- a custom techlef is used where large metal spacing rules are the
only ones present to avoid violations by the router
- some odd behaviour happening when a macro has a lef view
with a non zero origin. so the power routing cell is (temporarily)
modified to have a zero origin and its placement has been shifted
which doesn't match the power routing mag.
- the old openlane doesn't generate multi spef corners. they
are generated using timing-scripts repo
2022-10-10 04:51:05 -07:00
..
dv Corrected the pull-up definition and revised the CSB definition to 2022-10-05 10:02:24 -04:00
gl reharden!: caravel 2022-10-10 04:51:05 -07:00
rtl reharden!: caravel 2022-10-10 04:51:05 -07:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00