manarabdelaty
49c506f052
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 18:36:43 +02:00
manarabdelaty
e68664101c
Update gpio_control_block
2021-11-05 16:54:55 +02:00
manarabdelaty
53b09f43d1
Add gpio_defaults_block views
2021-11-05 12:33:36 +02:00
manarabdelaty
78ce7265c1
Update gpio_control block
2021-11-04 17:58:58 +02:00
manarabdelaty
cb9990f97e
harden gpio_control_block
2021-11-04 16:19:12 +02:00
Tim Edwards
ba932643e6
Changed the chip_io and chip_io_alt layouts to implement the
...
continuous ring of vccd and vssd. The clamp connections for the
vccd1/vssd1 and vccd2/vssd2 pads still need to be done, although
the pads themselves have been changed to the base cell, matching
the new verilog RTL.
2021-11-03 15:57:46 -04:00
Tim Edwards
9fb3925649
Updated the OSHW (open source hardware) icon graphic layout, which was
...
badly digitized, and not taking advantage of the allowance of 45 degree
angles on metal5.
2021-11-01 17:25:34 -04:00
Tim Edwards
dd66d1e5ca
Renamed the poorly and awkwardly named "sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped"
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cell to the simpler (and easier to remember) "xres_buf".
2021-10-31 21:43:09 -04:00
Tim Edwards
3a57940371
Revised the management protect block to include protections against
...
an unconnected wishbone bus (unconnected inputs). Added the missing
signals for the user IRQ enables to management protect (which have
to come from the management SoC).
2021-10-27 19:36:43 -04:00
Tim Edwards
a7148378a0
Added as many of the magic database layout files as are expected to remain
...
unchanged between the caravel and caravel_openframe repositories.
2021-10-26 10:27:03 -04:00