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analysis_sdc_grid_writer.cpp
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[Tool] Adapted tools to support I/O in center grid
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2020-12-04 18:50:13 -07:00 |
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analysis_sdc_grid_writer.h
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adapt analysis SDC writer for grids
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2020-03-02 17:15:01 -07:00 |
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analysis_sdc_option.cpp
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add time unit support on SDC generator. Now users can define time_unit thru cmd-line options
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2020-06-11 19:31:03 -06:00 |
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analysis_sdc_option.h
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add time unit support on SDC generator. Now users can define time_unit thru cmd-line options
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2020-06-11 19:31:03 -06:00 |
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analysis_sdc_routing_writer.cpp
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[Tool] Change routing module port naming to include architecture port names
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2021-03-14 19:35:49 -06:00 |
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analysis_sdc_routing_writer.h
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[Tool] Change routing module port naming to include architecture port names
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2021-03-14 19:35:49 -06:00 |
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analysis_sdc_writer.cpp
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[Tool] Change routing module port naming to include architecture port names
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2021-03-14 19:35:49 -06:00 |
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analysis_sdc_writer.h
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[Tool] Bug fix for defining global ports from tiles
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2020-11-10 20:31:14 -07:00 |
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analysis_sdc_writer_utils.cpp
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fixed a bug in single mode FPGA; add arch to regression test; deploy full testbench verification on Travis CI
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2020-04-15 15:48:33 -06:00 |
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analysis_sdc_writer_utils.h
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adapt analysis SDC writer for grids
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2020-03-02 17:15:01 -07:00 |
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configuration_chain_sdc_writer.cpp
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bug fix in configuration chain sdc writer
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2020-06-11 19:31:06 -06:00 |
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configuration_chain_sdc_writer.h
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add configuration chain sdc writer
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2020-06-11 19:31:06 -06:00 |
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configure_port_sdc_writer.cpp
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[Tool] Support superLUT circuit model in core engine
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2021-02-09 20:23:05 -07:00 |
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configure_port_sdc_writer.h
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add verbose output option to configure port disable timing writer
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2020-06-11 19:31:07 -06:00 |
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pnr_sdc_global_port.cpp
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[Tool] Patch FPGA-SDC to consider time unit in global port timing constraints
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2021-05-27 10:26:20 -06:00 |
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pnr_sdc_global_port.h
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[Tool] Patch FPGA-SDC to consider time unit in global port timing constraints
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2021-05-27 10:26:20 -06:00 |
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pnr_sdc_grid_writer.cpp
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bug fixed in SDC timing writer for primitive pb_type
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2020-06-11 19:31:06 -06:00 |
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pnr_sdc_grid_writer.h
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add SDC hierarchy writer for grids and now support flatten hierarchy in grid timing constraints
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2020-06-11 19:31:05 -06:00 |
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pnr_sdc_option.cpp
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add hierarchy writer to SDC generator
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2020-06-11 19:31:04 -06:00 |
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pnr_sdc_option.h
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add hierarchy writer to SDC generator
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2020-06-11 19:31:04 -06:00 |
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pnr_sdc_routing_writer.cpp
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[Tool] Change routing module port naming to include architecture port names
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2021-03-14 19:35:49 -06:00 |
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pnr_sdc_routing_writer.h
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[Tool] Change routing module port naming to include architecture port names
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2021-03-14 19:35:49 -06:00 |
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pnr_sdc_writer.cpp
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[Tool] Patch FPGA-SDC to consider time unit in global port timing constraints
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2021-05-27 10:26:20 -06:00 |
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pnr_sdc_writer.h
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[Tool] Upgrade openfpga engine to support multi-clock frequency definiton and their usage in testbench/SDC generation
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2021-01-15 12:01:53 -07:00 |
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sdc_hierarchy_writer.cpp
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bug fixed in the SDC CB hierarchy writer
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2020-06-11 19:31:05 -06:00 |
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sdc_hierarchy_writer.h
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add SDC hierarchy writer for grids and now support flatten hierarchy in grid timing constraints
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2020-06-11 19:31:05 -06:00 |
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sdc_memory_utils.cpp
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bug fix in the SDC port generation
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2020-06-11 19:31:05 -06:00 |
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sdc_memory_utils.h
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add options to use general-purpose wildcards in SDC generator
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2020-06-11 19:31:02 -06:00 |
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sdc_mux_utils.cpp
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use constant string for inverted port naming
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2020-06-11 19:31:07 -06:00 |
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sdc_mux_utils.h
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add new command to disable timing for configure ports of programmable modules
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2020-06-11 19:31:06 -06:00 |
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sdc_writer_naming.h
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add SDC hierarchy writer for grids and now support flatten hierarchy in grid timing constraints
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2020-06-11 19:31:05 -06:00 |
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sdc_writer_utils.cpp
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add new command to disable timing for configure ports of programmable modules
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2020-06-11 19:31:06 -06:00 |
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sdc_writer_utils.h
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add new command to disable timing for configure ports of programmable modules
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2020-06-11 19:31:06 -06:00 |
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