69 lines
4.1 KiB
C++
69 lines
4.1 KiB
C++
#ifndef PNR_SDC_ROUTING_WRITER_H
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#define PNR_SDC_ROUTING_WRITER_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <string>
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#include <vector>
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#include "module_manager.h"
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#include "device_rr_gsb.h"
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#include "rr_graph_obj.h"
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#include "device_grid.h"
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#include "vpr_device_annotation.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void print_pnr_sdc_flatten_routing_constrain_sb_timing(const std::string& sdc_dir,
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const float& time_unit,
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const bool& hierarchical,
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const ModuleManager& module_manager,
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const ModuleId& top_module,
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const VprDeviceAnnotation& device_annotation,
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const DeviceGrid& grids,
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const RRGraph& rr_graph,
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const DeviceRRGSB& device_rr_gsb,
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const bool& constrain_zero_delay_paths);
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void print_pnr_sdc_compact_routing_constrain_sb_timing(const std::string& sdc_dir,
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const float& time_unit,
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const bool& hierarchical,
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const ModuleManager& module_manager,
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const ModuleId& top_module,
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const VprDeviceAnnotation& device_annotation,
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const DeviceGrid& grids,
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const RRGraph& rr_graph,
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const DeviceRRGSB& device_rr_gsb,
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const bool& constrain_zero_delay_paths);
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void print_pnr_sdc_flatten_routing_constrain_cb_timing(const std::string& sdc_dir,
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const float& time_unit,
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const bool& hierarchical,
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const ModuleManager& module_manager,
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const ModuleId& top_module,
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const VprDeviceAnnotation& device_annotation,
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const DeviceGrid& grids,
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const RRGraph& rr_graph,
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const DeviceRRGSB& device_rr_gsb,
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const bool& constrain_zero_delay_paths);
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void print_pnr_sdc_compact_routing_constrain_cb_timing(const std::string& sdc_dir,
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const float& time_unit,
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const bool& hierarchical,
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const ModuleManager& module_manager,
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const ModuleId& top_module,
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const VprDeviceAnnotation& device_annotation,
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const DeviceGrid& grids,
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const RRGraph& rr_graph,
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const DeviceRRGSB& device_rr_gsb,
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const bool& constrain_zero_delay_paths);
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} /* end namespace openfpga */
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#endif
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