.. |
bus_group
|
[test] pass
|
2023-01-11 17:10:29 -08:00 |
clock_network
|
[test] debugging 2-clock network
|
2023-04-20 14:44:01 +08:00 |
custom_fabric_netlist_location/config
|
[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention
|
2020-11-22 16:37:19 -07:00 |
explicit_multi_verilog_files/config
|
[test] enable block usage information output when running vpr. Otherwise some testcases miss the information for QoR checks
|
2022-09-20 12:08:24 -07:00 |
fabric_key
|
[test] deploy new tests
|
2023-07-08 21:52:16 -07:00 |
fixed_device_support/config
|
Changed HDL files reading to be as a single compilation unit in yosys_vpr flow for Verific mode. Changed '' variable to 'read_verilog ' in yosys template scripts. Updated task configs accordingly.
|
2022-01-17 13:21:29 +05:00 |
fixed_simulation_settings
|
[test] add a new test case to validate that .act file is not required when power analysis flow is off
|
2022-08-01 18:44:47 -07:00 |
full_testbench
|
LUTRAM Support (#1595)
|
2024-04-19 14:46:38 -07:00 |
generate_fabric
|
[Test] Update generate_fabric and generate_testbench test cases; Now generate_testbench tese case use the fabric netlist generated by the generate_fabric test case to run HDL verification
|
2021-04-11 17:26:27 -06:00 |
generate_template_testbench/config
|
[test] add a new test case to validate the new feature
|
2023-11-02 21:08:36 -07:00 |
generate_testbench/config
|
Changed HDL files reading to be as a single compilation unit in yosys_vpr flow for Verific mode. Changed '' variable to 'read_verilog ' in yosys template scripts. Updated task configs accordingly.
|
2022-01-17 13:21:29 +05:00 |
global_tile_ports
|
[test] use a different W to avoid vvp collapse
|
2024-05-07 12:20:58 -07:00 |
group_config_block
|
[core] ad a new test case
|
2023-10-06 18:31:54 -07:00 |
io_constraints
|
[test] add missing file
|
2022-10-17 19:44:25 -07:00 |
k4_series
|
[test] rework
|
2024-05-20 17:20:04 -07:00 |
mock_wrapper
|
[test] add a new testcase to validate mock wrapper
|
2023-06-26 15:26:50 -07:00 |
module_naming
|
[test] typo
|
2023-09-23 15:12:02 -07:00 |
no_time_stamp
|
[test] update golden copies
|
2024-05-29 10:31:19 -07:00 |
preconfig_testbench
|
[test] added more testcases to validate the dut module option; fixing bugs on preconfigured testbenches
|
2023-06-25 22:49:51 -07:00 |
preload_rr_graph
|
[test] add new tests to verify rr graph preloading in two file formats
|
2024-05-09 23:10:45 -07:00 |
source_command
|
[script] add dedicated testcase for source commands
|
2023-01-01 17:04:24 -08:00 |
tile_organization
|
[test] add a new test to validate ecb when tile modules are used
|
2024-05-20 21:10:49 -07:00 |
verific_test/config
|
Added 'basic_tests/verific_test' test-case.
|
2021-11-01 18:20:57 +05:00 |
vpr_standalone/config
|
[script] fixed some bugs
|
2022-12-30 18:30:52 -08:00 |
write_fabric_pin_phy_loc
|
[test] add new testcases to validate options of write_fabric_pin_physical_location
|
2024-04-11 15:06:50 -07:00 |
write_gsb
|
[test] add more test cases to validate gsb options
|
2022-08-29 22:03:06 -07:00 |
yosys_only/config
|
Test case for yosys-only flow added
|
2022-01-14 15:37:47 +05:00 |