OpenFPGA/vpr7_x2p/vpr/SRC
tangxifan 44301bfd77 updated SPICE generator to avoid issues on clb2clb_direct 2019-07-02 09:01:52 -06:00
..
base bug fixing and reorganize rr_graph builder source files 2019-06-23 16:40:13 -06:00
device/rr_graph update tileable rr_graph generator to improve routability and also enable assoicated testing 2019-06-27 17:52:25 -06:00
fpga_x2p updated SPICE generator to avoid issues on clb2clb_direct 2019-07-02 09:01:52 -06:00
mrfpga cleaned unused variables 2019-05-13 14:45:02 -06:00
pack cleaned unused variables 2019-05-13 14:45:02 -06:00
place cleaned unused variables 2019-05-13 14:45:02 -06:00
power bug fixing for memory leaking in allocating pb_rr_graph and power estimation 2019-06-15 12:23:36 -06:00
route bug fixing and reorganize rr_graph builder source files 2019-06-23 16:40:13 -06:00
timing rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
util basically finished the coding of tileable rr_graph generator. testing to go 2019-06-20 18:17:07 -06:00
ctags_vpr_src.sh Correction of the SDC to remove global clocks 2019-05-30 15:04:21 -06:00
main.c cleaned unused variables 2019-05-13 14:45:02 -06:00
shell_main.c Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00