tangxifan
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f47246e8b7
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Fixed doc ref problem
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2018-09-14 14:02:47 -06:00 |
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tangxifan
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087ba475bb
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debugging bibtex
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2018-09-14 13:58:20 -06:00 |
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tangxifan
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965835debe
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debugging doc ref
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2018-09-14 13:48:57 -06:00 |
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tangxifan
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4afbce10a3
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fixing bugs for doc references
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2018-09-14 13:44:40 -06:00 |
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tangxifan
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5d697da4e7
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refine doc hierarchy
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2018-09-14 13:27:05 -06:00 |
Xifan Tang
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c7783575d9
|
Clean codes
|
2018-09-14 13:16:26 -06:00 |
唐希凡
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0bfbc9b0aa
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update docs
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2018-09-14 13:11:51 -06:00 |
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Xifan Tang
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44e63ec98b
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Test new template
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2018-09-13 23:00:56 -06:00 |
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Xifan Tang
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fec0daa2a8
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Update a draft
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2018-09-13 22:58:54 -06:00 |
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唐希凡
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0f31d51c1a
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update doc html template
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2018-09-13 17:59:53 -06:00 |
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唐希凡
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655baa3cd9
|
Debugged Doc
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2018-09-13 17:39:57 -06:00 |
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Xifan Tang
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cea41801da
|
updating documentation
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2018-09-13 16:25:24 -06:00 |
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Xifan Tang
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c94cc01c83
|
debugging documentation
|
2018-09-13 15:52:08 -06:00 |
|
Xifan Tang
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7261a53f3c
|
update docs theme
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2018-09-13 15:48:10 -06:00 |
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Xifan Tang
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d6d6951496
|
Adding documentation
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2018-09-13 15:38:41 -06:00 |
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Xifan Tang
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d7e2a78d86
|
creating documentation
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2018-09-13 11:52:12 -06:00 |
|
Xifan Tang
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bdffcbd559
|
creating documentations
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2018-09-13 11:51:32 -06:00 |
|
Xifan Tang
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1cf066d3ad
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Fixing minor bugs
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2018-09-06 14:25:23 -06:00 |
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Xifan Tang
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c009a37580
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fix minor bugs
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2018-09-04 17:56:37 -06:00 |
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Xifan Tang
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42da9160f0
|
Clean codes and update
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2018-09-04 17:49:20 -06:00 |
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Xifan Tang
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9f3cb45b85
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Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA
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2018-09-04 17:33:38 -06:00 |
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Xifan Tang
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00ecd0bb1d
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Cleanup codes and organization
|
2018-09-04 17:31:30 -06:00 |
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tangxifan
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d3d95ee842
|
Update getting_started.md
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2018-08-10 14:17:12 -06:00 |
|
Xifan Tang
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cb15bb5082
|
Clean code and fix minor bugs
|
2018-08-10 13:46:00 -06:00 |
|
Xifan Tang
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b0ef554b35
|
Add power property XML
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2018-08-09 11:27:36 -06:00 |
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Xifan Tang
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90669d19c5
|
Update FPGA-SPICE and flow configurations
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2018-08-09 11:27:16 -06:00 |
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Xifan Tang
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4d7f4350de
|
get FPGA-SPICE updated for release - Clear printf and fix assert bugs
|
2018-08-01 14:04:28 -06:00 |
Steve Corey
|
91f073cdc4
|
added build files to .gitignore
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2018-07-30 10:36:34 -06:00 |
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Xifan Tang
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fe13168f8f
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Add ABC and ACE2, fix bugs for fpga_flow and VPR
|
2018-07-27 22:54:52 -06:00 |
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Steve Corey
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b9d583519b
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Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA
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2018-07-26 13:59:26 -06:00 |
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Steve Corey
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be6c296c22
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initial commit of black-box doc
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2018-07-26 13:58:58 -06:00 |
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Xifan Tang
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158dec405e
|
Reorganize the code directory
|
2018-07-26 11:28:21 -06:00 |
|
Steve Corey
|
3abce69f7c
|
multimode clb simple documentation complete
|
2018-07-18 10:54:05 -06:00 |
|
Steve Corey
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c61d11baa6
|
changed some names to make more sense
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2018-07-18 10:53:21 -06:00 |
|
Steve Corey
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9c4e5ca95f
|
ignored vpr output files
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2018-07-18 10:50:37 -06:00 |
|
Steve Corey
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1b36d491c8
|
ignored vpr output files
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2018-07-18 10:48:55 -06:00 |
|
Steve Corey
|
51efa38751
|
continuing simple documentation
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2018-07-17 13:55:10 -06:00 |
|
Steve Corey
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84fd0348af
|
initial commit of simple architecture documentation
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2018-07-16 13:22:18 -06:00 |
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Steve Corey
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6f73b7a874
|
moved architecture documentation to new file
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2018-07-16 13:21:41 -06:00 |
|
Steve Corey
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17988e2ade
|
changed switch names to make more sense
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2018-07-16 13:21:07 -06:00 |
|
Steve Corey
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fa50eef093
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added simple architecture for vpr version 8
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2018-07-11 13:19:40 -06:00 |
|
Steve Corey
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2208916a95
|
updated to line numbers of vpr8 example architecture
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2018-07-10 13:02:21 -06:00 |
|
Steve Corey
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8040328841
|
added notes about CLB
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2018-07-09 13:06:22 -06:00 |
|
Steve Corey
|
8c7a7af458
|
started documenting architecture
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2018-07-06 13:36:55 -06:00 |
|
Steve Corey
|
5b6ce1349e
|
edited to match vtr_release7 version
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2018-07-05 11:54:37 -06:00 |
|
Steve Corey
|
3f00ce365e
|
tutorial additions
|
2018-07-03 15:04:09 -06:00 |
|
Steve Corey
|
2cc4027ab0
|
added tutorial files
|
2018-07-03 14:46:50 -06:00 |
|
Steve Corey
|
122c1b19f7
|
removed cloning
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2018-07-02 11:12:28 -06:00 |
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stevecorey
|
569bdbfb95
|
added submodule instructions
|
2018-06-29 13:30:44 -06:00 |
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stevecorey
|
cfcc177e4b
|
added submodule instructions
|
2018-06-29 13:29:56 -06:00 |