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唐希凡 2018-09-13 17:39:57 -06:00
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# You can set these variables from the command line.
SPHINXOPTS =
SPHINXBUILD = sphinx-build
SPHINXBUILD = sphinx-build-3.6
SOURCEDIR = source
BUILDDIR = build

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Welcome to OpenFPGA's documentation!
====================================
For more information on the ABC see :ref:`ABC`.
For more information on the VPR see :ref:`VTR`
For more information on the original FPGA architecture description language see :ref:`fpga_arch_description`
For more information on the ABC see .
For more information on the VPR see
For more information on the original FPGA architecture description language see
.. toctree::
:maxdepth: 2
:caption: Extended Architecture Description Language
arch_lang/index
arch_lang/index
.. toctree::
:maxdepth: 2
:caption: OpenFPGA VPR Usage
fpga_spice/index
fpga_verilog/index
fpga_bitstream/index
.. toctree::
:caption: FPGA-SPICE: SPICE Auto-Generation
fpga_spice/index
.. toctree::
:caption: FPGA-Verilog: Verilog Auto-Generation
fpga_verilog/index
.. toctree::
:caption: FPGA-Bitstream: Bitstream Generator
fpga_bitstream/index
.. toctree::
:maxdepth: 2
:caption: Tutorial
tutorials/index
tutorials/index
.. toctree::
:maxdepths: 2
:maxdepth: 2
:caption: Appendix
contact
references
reference