Commit Graph

1572 Commits

Author SHA1 Message Date
tangxifan 5c69f57559 sample_arch:move cmos/rram variation to technology library XML nodes 2020-01-16 20:58:45 -07:00
tangxifan 95edd3c091 clean up the sample arch 2020-01-16 20:52:47 -07:00
tangxifan a598929fe7 add circuit library checker in the test 2020-01-16 20:25:00 -07:00
tangxifan f7a7c56366 move OpenFPGAArch to openfpga namespace 2020-01-16 20:22:56 -07:00
tangxifan d6adfa0821 add XML parsing for delay matrix and wire parasitics for circuit library 2020-01-16 20:14:39 -07:00
tangxifan 2e0ce78054 add XML writing for buffers in circuit library 2020-01-16 17:21:41 -07:00
tangxifan 9ba42cd540 add XML writer for circuit ports 2020-01-16 16:05:11 -07:00
tangxifan 0304d723c0 add XML writer for design technology of a circuit model 2020-01-16 14:45:41 -07:00
tangxifan 3ace7f8ef7 move generic data structures to openfpgautil library 2020-01-16 13:26:55 -07:00
tangxifan d232391250 developed XML writer for circuit library and start porting functions to openfpgautil library 2020-01-16 12:32:29 -07:00
tangxifan e282f813bc rename circuit settings to openfpga arch and update sample architecture 2020-01-15 20:28:04 -07:00
tangxifan 264dc8458d add XML parsing for delay matrix in circuit model 2020-01-15 20:21:53 -07:00
tangxifan 602d0bde4c add XML parsing for wire parasitics in circuit model 2020-01-15 19:54:57 -07:00
tangxifan 999c364b25 added XML parsing for circuit model ports 2020-01-15 17:29:49 -07:00
tangxifan c20e1d48d2 added XML parsing for pass-gate-logic in circuit models 2020-01-15 15:49:02 -07:00
tangxifan a9b122d584 add XML parsing for buffer models in circuit library 2020-01-15 15:27:49 -07:00
tangxifan 35d6c9661b Finish the first version of XML parser for design technology of circuit models 2020-01-14 16:24:27 -07:00
tangxifan 5937ffc809 add XML parsing for buffer/pass-gate-logic -related properties 2020-01-14 15:44:24 -07:00
tangxifan 9e911cd288 bug fixing for direct connection when pin duplication is applied 2020-01-14 15:04:47 -07:00
tangxifan 56113e1aab adding XML parsing for design tech of circuit model 2020-01-14 14:10:00 -07:00
tangxifan 2692d0fc35 adding XML parsing for SPICE and Verilog netlist for each circuit model 2020-01-14 08:45:27 -07:00
tangxifan 82d83ddceb reorganized the read XML openfpga arch 2020-01-14 08:33:48 -07:00
tangxifan ca3ca14cc7 fixed bugs in XML when parsing circuit model types 2020-01-13 21:52:13 -07:00
tangxifan db503ffebf add openfpga read xml executable and start min unit test 2020-01-13 21:05:58 -07:00
tangxifan d6c69ea7c6 developing XML parser for circuit model name and type 2020-01-12 23:45:51 -07:00
tangxifan e2f641fdb3 add example architecture for openfpga and developing XML parser 2020-01-12 22:39:38 -07:00
tangxifan 2e986608ba initial commit on parser for reading openfpga arch xml 2020-01-12 21:33:28 -07:00
tangxifan 5dea648be6 add missing CMakeList for libarchopenfpga 2020-01-12 18:15:36 -07:00
tangxifan 48ecb6e48b immigrate XML parser for circuit_lib to library readarchopenfpga 2020-01-12 18:11:00 -07:00
ganeshgore 15ffdc03f0 Merge remote-tracking branch 'origin/ganesh_dev' into dev 2020-01-09 17:15:04 -07:00
ganeshgore f0bed1244c Added blif file folding before VPR run 2020-01-09 16:50:34 -07:00
tangxifan 747fa09a0c Merge branch 'refactoring' into dev 2020-01-08 20:01:40 -07:00
tangxifan 2a3950470e remove redudant net source addition in cbs and sbs 2020-01-08 19:43:53 -07:00
tangxifan 8a34de95fd Merge branch 'refactoring' into dev 2020-01-08 14:23:26 -07:00
tangxifan f67981afa8 update ducoumentation to explain lib_name XML syntax 2020-01-08 14:22:17 -07:00
AurelienUoU ee7b1c9b1d Update architecture for tutorial 2020-01-07 10:08:04 -07:00
AurelienUoU 9e74c3ba5a Merge branch 'master' into dev 2020-01-07 10:04:14 -07:00
AurelienAlacchi 701d3964d2
Merge pull request #35 from skulis/dockerfile_fix
Fix docker file (do not run make multi threaded)
2020-01-07 10:01:08 -07:00
BaudouinChauviere 9701428413
Merge pull request #36 from skulis/fix_tuto
Fix tutorial configuration file
2020-01-06 01:21:01 -07:00
Szymon Kulis 9a6370a7d0 Do not run make with -j in Docker 2020-01-05 22:02:38 +01:00
Szymon Kulis 895aca1bf1 Use template variables 2020-01-05 20:39:10 +01:00
tangxifan 4877cfd36a modify the git ignore list for ctags so that we only ignore those tags in specific folders
This is to avoid any source files to be missed when they are placed in a folder called tags.
Libtatum is any example!
2020-01-03 21:17:40 -07:00
tangxifan 2901a6eec5 add missing tatum file due to the folder name tags is in the git ignore list!!! 2020-01-03 23:13:49 -05:00
tangxifan 60cbcf9104 add missing tatum 2020-01-03 22:42:17 -05:00
tangxifan 7a96f866bb remove tatum temporarily 2020-01-03 22:41:49 -05:00
tangxifan 8b8f09387a add travis packages 2020-01-03 22:34:22 -05:00
tangxifan 0740684567 remove libs from cache list 2020-01-03 22:06:40 -05:00
tangxifan 68bf7a9462 copy missing cmake modules from vtr project 2020-01-03 21:57:19 -05:00
tangxifan b728773159 add vtr assert level and copy missing cmake modules from vtr project 2020-01-03 21:56:15 -05:00
tangxifan 670642ee42 add executable to vpr8 directory 2020-01-03 16:50:29 -07:00