developed XML writer for circuit library and start porting functions to openfpgautil library

libopenfpga/CMakeLists.txt

@@ -1,3 +1,4 @@
 # OpenFPGA-related libraries
 add_subdirectory(libini)
 add_subdirectory(libarchopenfpga)
+add_subdirectory(libopenfpgautil)

libopenfpga/libarchopenfpga/CMakeLists.txt

@@ -19,6 +19,7 @@ set_target_properties(libarchopenfpga PROPERTIES PREFIX "") #Avoid extra 'lib' p
 
 #Specify link-time dependancies
 target_link_libraries(libarchopenfpga
+                      libopenfpgautil
                       libvtrutil
                       libarchfpga
                       libpugixml

libopenfpga/libarchopenfpga/src/circuit_types.h

@@ -39,7 +39,7 @@ enum e_circuit_model_type {
   NUM_CIRCUIT_MODEL_TYPES
 };
 /* Strings correspond to each port type */
-constexpr std::array<const char*, NUM_CIRCUIT_MODEL_TYPES> CIRCUIT_MODEL_TYPE_STRING = {{"CHAN_WIRE", "WIRE", "MUX", "LUT", "FF", "SRAM", "HARDLOGIC", "CCFF", "IOPAD", "INVBUF", "PASSGATE", "GATE"}};
+constexpr std::array<const char*, NUM_CIRCUIT_MODEL_TYPES> CIRCUIT_MODEL_TYPE_STRING = {{"chan_wire", "wire", "mux", "lut", "ff", "sram", "hard_logic", "ccff", "iopad", "inv_buf", "pass_gate", "gate"}};
 
 enum e_circuit_model_design_tech {
   CIRCUIT_MODEL_DESIGN_CMOS, 

libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.h

@@ -1,9 +1,15 @@
 #ifndef READ_XML_OPENFPGA_ARCH_H
 #define READ_XML_OPENFPGA_ARCH_H
 
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
 #include <string>
 #include "openfpga_arch.h"
 
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
 OpenFPGAArch read_xml_openfpga_arch(const char* arch_file_name);
 
 #endif

libopenfpga/libarchopenfpga/src/write_xml_circuit_library.cpp

@@ -0,0 +1,71 @@
+/********************************************************************
+ * This file includes functions that outputs a circuit library to XML format
+ *******************************************************************/
+/* Headers from system goes first */
+#include <string>
+
+/* Headers from vtr util library */
+#include "vtr_log.h"
+#include "openfpga_digest.h"
+
+/* Headers from readarchopenfpga library */
+#include "write_xml_utils.h" 
+#include "write_xml_circuit_library.h"
+
+/********************************************************************
+ * A writer to output a circuit model to XML format
+ *******************************************************************/
+static 
+void write_xml_circuit_model(std::fstream& fp,
+                             const char* fname,
+                             const CircuitLibrary& circuit_lib,
+                             const CircuitModelId& model) {
+  /* Validate the file stream */
+  openfpga::check_file_stream(fname, fp);
+
+  /* Write the definition of circuit model */
+  fp << "\t\t" << "<circuit_model";
+  write_xml_attribute(fp, "type", CIRCUIT_MODEL_TYPE_STRING[circuit_lib.model_type(model)]); 
+  write_xml_attribute(fp, "name", circuit_lib.model_name(model).c_str()); 
+  write_xml_attribute(fp, "prefix", circuit_lib.model_prefix(model).c_str()); 
+  if (true == circuit_lib.model_is_default(model)) { 
+    write_xml_attribute(fp, "is_default", "true"); 
+  }
+  if (true == circuit_lib.dump_structural_verilog(model)) { 
+    write_xml_attribute(fp, "dump_structural_verilog", "true"); 
+  }
+  if (!circuit_lib.model_circuit_netlist(model).empty()) {
+    write_xml_attribute(fp, "circuit_netlist", circuit_lib.model_circuit_netlist(model).c_str()); 
+  }
+  if (!circuit_lib.model_verilog_netlist(model).empty()) {
+    write_xml_attribute(fp, "verilog_netlist", circuit_lib.model_verilog_netlist(model).c_str()); 
+  }
+  fp << ">" << "\n";
+
+  /* Put an end to the XML definition of this circuit model */
+  fp << "\t\t" << "</circuit_model>\n";
+}
+
+/********************************************************************
+ * A writer to output a circuit library to XML format
+ *******************************************************************/
+void write_xml_circuit_library(std::fstream& fp,
+                               const char* fname,
+                               const CircuitLibrary& circuit_lib) {
+  /* Validate the file stream */
+  openfpga::check_file_stream(fname, fp);
+  
+  /* Write the root node for circuit_library, 
+   * we apply a tab becuase circuit library is a subnode 
+   * under the root node <openfpga_arch>
+   */
+  fp << "\t" << "<circuit_library>" << "\n";
+
+  /* Write circuit model one by one */ 
+  for (const CircuitModelId& model : circuit_lib.models()) {
+    write_xml_circuit_model(fp, fname, circuit_lib, model);
+  } 
+
+  /* Write the root node for circuit_library */
+  fp << "\t" << "</circuit_library>" << "\n";
+}

libopenfpga/libarchopenfpga/src/write_xml_circuit_library.h

@@ -0,0 +1,17 @@
+#ifndef WRITE_XML_CIRCUIT_LIBRARY_H
+#define WRITE_XML_CIRCUIT_LIBRARY_H
+
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
+#include <fstream>
+#include "circuit_library.h"
+
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
+void write_xml_circuit_library(std::fstream& fp,
+                               const char* fname,
+                               const CircuitLibrary& circuit_lib);
+
+#endif

libopenfpga/libarchopenfpga/src/write_xml_openfpga_arch.cpp

@@ -0,0 +1,34 @@
+/********************************************************************
+ * This file includes functions that outputs an OpenFPGAArch
+ * data structure to XML format
+ *******************************************************************/
+#include <fstream>
+
+/* Headers from openfpgautil library */
+#include "openfpga_digest.h"
+
+/* Headers from readarchopenfpga library */
+#include "write_xml_circuit_library.h"
+#include "write_xml_openfpga_arch.h"
+
+/********************************************************************
+ * A writer to output an OpenFPGAArch to XML format
+ *******************************************************************/
+void write_xml_openfpga_arch(const char* fname, 
+                             const OpenFPGAArch& openfpga_arch) {
+  /* Create a file handler */
+  std::fstream fp;
+  /* Open the file stream */
+  fp.open(std::string(fname), std::fstream::out | std::fstream::trunc);
+
+  /* Validate the file stream */
+  openfpga::check_file_stream(fname, fp);
+
+  /* Write the root node for openfpga_arch */
+  fp << "<openfpga_architecture>" << "\n";
+
+  /* Write the circuit library */
+  write_xml_circuit_library(fp, fname, openfpga_arch.circuit_lib);
+
+  fp << "</openfpga_architecture>" << "\n";
+}

libopenfpga/libarchopenfpga/src/write_xml_openfpga_arch.h

@@ -0,0 +1,16 @@
+#ifndef WRITE_XML_OPENFPGA_ARCH_H
+#define WRITE_XML_OPENFPGA_ARCH_H
+
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
+#include <string>
+#include "openfpga_arch.h"
+
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
+void write_xml_openfpga_arch(const char* xml_fname, 
+                             const OpenFPGAArch& openfpga_arch);
+
+#endif

libopenfpga/libarchopenfpga/src/write_xml_utils.cpp

@@ -0,0 +1,25 @@
+/********************************************************************
+ * This file includes most utilized function to write an XML file
+ *******************************************************************/
+/* Headers from system goes first */
+#include <fstream> 
+#include <string> 
+
+/* Headers from openfpgautil library */
+#include "openfpga_digest.h" 
+
+/* Headers from readarchopenfpga library */
+#include "write_xml_utils.h" 
+
+/********************************************************************
+ * A most utilized function to write an XML attribute to file
+ *******************************************************************/
+void write_xml_attribute(std::fstream& fp, 
+                         const char* attr,
+                         const char* value) {
+  /* Validate the file stream */
+  openfpga::valid_file_stream(fp);
+
+  fp << " " << attr << "=\"" << value << "\""; 
+}
+

libopenfpga/libarchopenfpga/src/write_xml_utils.h

@@ -0,0 +1,17 @@
+#ifndef WRITE_XML_UTILS_H
+#define WRITE_XML_UTILS_H
+
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
+#include <fstream>
+#include "circuit_library.h"
+
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
+void write_xml_attribute(std::fstream& fp, 
+                         const char* attr,
+                         const char* value);
+
+#endif

libopenfpga/libarchopenfpga/test/main.cpp

@@ -3,11 +3,18 @@
  * 1. parser of data structures
  * 2. writer of data structures
  *******************************************************************/
+/* Headers from vtrutils */
+#include "vtr_assert.h"
 #include "vtr_log.h"
 
+/* Headers from readarchopenfpga */
 #include "read_xml_openfpga_arch.h"
+#include "write_xml_openfpga_arch.h"
 
 int main(int argc, const char** argv) {
+  /* Ensure we have only one or two argument */
+  VTR_ASSERT((2 == argc) || (3 == argc));
+
   /* Parse the circuit library from an XML file */
   const OpenFPGAArch& openfpga_arch = read_xml_openfpga_arch(argv[1]); 
   VTR_LOG("Parsed %lu circuit models from XML into circuit library.\n",
@@ -15,7 +22,14 @@ int main(int argc, const char** argv) {
 
   /* Check the circuit library */
   
-  /* Output the circuit library to an XML file*/
+  /* Output the circuit library to an XML file
+   * This is optional only used when there is a second argument
+   */
+  if (3 <= argc) { 
+    write_xml_openfpga_arch(argv[2], openfpga_arch);
+    VTR_LOG("Echo the OpenFPGA architecture to an XML file: %s.\n",
+            argv[2]);
+  }
 }
 
 

libopenfpga/libopenfpgautil/CMakeLists.txt

@@ -0,0 +1,34 @@
+cmake_minimum_required(VERSION 3.9)
+
+project("libopenfpgautil")
+
+#file(GLOB_RECURSE EXEC_SOURCES test/main.cpp)
+file(GLOB_RECURSE LIB_SOURCES src/*.cpp)
+file(GLOB_RECURSE LIB_HEADERS src/*.h)
+files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS)
+
+#Remove test executable from library
+#list(REMOVE_ITEM LIB_SOURCES ${EXEC_SOURCES})
+
+#Create the library
+add_library(libopenfpgautil STATIC
+            ${LIB_HEADERS}
+            ${LIB_SOURCES})
+target_include_directories(libopenfpgautil PUBLIC ${LIB_INCLUDE_DIRS})
+set_target_properties(libopenfpgautil PROPERTIES PREFIX "") #Avoid extra 'lib' prefix
+
+#Specify link-time dependancies
+target_link_libraries(libopenfpgautil
+                      libvtrutil)
+
+#Create the test executable
+#add_executable(read_arch_openfpga ${EXEC_SOURCES})
+#target_link_libraries(read_arch_openfpga libarchopenfpga)
+
+#Supress IPO link warnings if IPO is enabled
+#get_target_property(READ_ARCH_USES_IPO read_arch_openfpga INTERPROCEDURAL_OPTIMIZATION)
+#if (READ_ARCH_USES_IPO)
+#    set_target_properties(read_arch_openfpga PROPERTIES LINK_FLAGS ${IPO_LINK_WARN_SUPRESS_FLAGS})
+#endif()
+
+#install(TARGETS libarchopenfpga read_arch_openfpga DESTINATION bin)

libopenfpga/libopenfpgautil/src/openfpga_digest.cpp

@@ -0,0 +1,40 @@
+/********************************************************************
+ * This file includes functions that handles the file outputting
+ * in OpenFPGA framework
+ *******************************************************************/
+/* Headers from vtr util library */
+#include "vtr_log.h"
+
+/* Headers from openfpgautil library */
+#include "openfpga_digest.h" 
+
+namespace openfpga {
+
+/********************************************************************
+ * A most utilized function to validate the file stream
+ * This function will return true or false for a valid/invalid file stream 
+ *******************************************************************/
+bool valid_file_stream(std::fstream& fp) {
+  /* Validate the file stream */
+  if (!fp.is_open() || !fp.good()) {
+    return false;
+  }
+
+  return true;
+}
+
+/********************************************************************
+ * A most utilized function to validate the file stream
+ * This function will error out for a valid/invalid file stream 
+ *******************************************************************/
+void check_file_stream(const char* fname, 
+                       std::fstream& fp) {
+
+  if (false == valid_file_stream(fp)) {
+    VTR_LOG("Invalid file stream for file: %s\n",
+            fname);
+    exit(1);
+  }
+}
+
+} /* namespace openfpga ends */

libopenfpga/libopenfpgautil/src/openfpga_digest.h

@@ -0,0 +1,22 @@
+#ifndef OPENFPGA_DIGEST_H
+#define OPENFPGA_DIGEST_H
+
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
+#include <fstream>
+
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
+/* namespace openfpga begins */
+namespace openfpga {
+
+bool valid_file_stream(std::fstream& fp);
+
+void check_file_stream(const char* fname, 
+                       std::fstream& fp);
+
+} /* namespace openfpga ends */
+
+#endif