tangxifan
|
0e9b0ecb6f
|
[core] code format
|
2024-11-26 19:11:17 -08:00 |
|
tangxifan
|
533ca4c5d7
|
[core] typo
|
2024-11-26 19:10:59 -08:00 |
|
tangxifan
|
71085247ac
|
[core] code format
|
2024-11-26 18:10:28 -08:00 |
|
tangxifan
|
296f318745
|
[core] fixed a big
|
2024-11-26 17:37:28 -08:00 |
|
tangxifan
|
a1a5f8cfb6
|
[test] add new test to valid force clock tap mux routing
|
2024-11-26 17:36:02 -08:00 |
|
tangxifan
|
29e15439d9
|
[lib] typo
|
2024-11-26 17:18:33 -08:00 |
|
tangxifan
|
10e3bf1165
|
[core] syntax
|
2024-11-26 16:52:30 -08:00 |
|
tangxifan
|
fdf8b9a57a
|
[lib] upgraded parser for new clock routing -related bitstream setting syntax
|
2024-11-26 14:54:52 -08:00 |
|
tangxifan
|
c5f0010feb
|
[lib] add missing files
|
2024-11-26 13:23:55 -08:00 |
|
tangxifan
|
8429c4b836
|
[lib] update parser
|
2024-11-26 13:23:34 -08:00 |
|
tangxifan
|
346aacefa9
|
[lib] add new feature clock tap routing to bitstream setting database
|
2024-11-26 12:43:27 -08:00 |
|
tangxifan
|
6e89943eb4
|
[core] code format
|
2024-11-25 16:22:01 -08:00 |
|
tangxifan
|
8577513995
|
[core] syntax
|
2024-11-25 15:37:39 -08:00 |
|
tangxifan
|
ed42c16f87
|
[core] support bitstream setting to overwrite default mode bits
|
2024-11-25 15:32:00 -08:00 |
|
tangxifan
|
94005fea99
|
[lib] update API for bitstream setting default mode overwrite
|
2024-11-25 11:20:47 -08:00 |
|
tangxifan
|
a10c683591
|
[lib] update parser to support bitstream setting default mode syntax
|
2024-11-25 11:10:07 -08:00 |
|
tangxifan
|
4533d160c5
|
[core] developming default mode overwrite through bitstream setting file
|
2024-11-24 22:20:59 -08:00 |
|
tangxifan
|
07cbfa612e
|
[core] clang syntax
|
2024-11-13 16:03:06 -08:00 |
|
tangxifan
|
7cea95b209
|
[core] syntax
|
2024-11-13 10:53:55 -08:00 |
Lin
|
4bbd458dc6
|
mod warming message
|
2024-11-01 10:46:29 +08:00 |
|
Lin
|
4a22f6ebfc
|
add warning
|
2024-10-31 15:04:07 +08:00 |
|
Lin
|
64c4f2f7aa
|
bug fix
|
2024-10-31 14:45:31 +08:00 |
|
Lin
|
bd2cf17566
|
reformat code
|
2024-10-31 10:48:41 +08:00 |
|
Lin
|
539e37118a
|
add option reduce error to warning
|
2024-10-31 10:47:26 +08:00 |
Jingrong Lin
|
f4b087a3a7
|
Merge branch 'master' into disable_repack_error_message
|
2024-10-31 10:13:50 +08:00 |
|
tangxifan
|
9f0c2b870b
|
[core] update gen files; Should avoid such dynamic updates later
|
2024-10-17 12:14:05 -07:00 |
|
Lin
|
88e12a0afa
|
modified test cases & xsd file
|
2024-10-09 17:21:49 +08:00 |
|
Lin
|
f0a52bec18
|
auto generate capnp no compile error
|
2024-10-09 14:15:39 +08:00 |
|
Lin
|
9131e74353
|
modified CMakeLists.txt
|
2024-10-08 17:59:20 +08:00 |
|
Lin
|
f0a9ca8b02
|
add xsd file and modified cmakelist
|
2024-10-08 16:30:09 +08:00 |
|
Lin
|
1ba3298dbe
|
add uxsdcxx
|
2024-10-08 16:30:09 +08:00 |
|
Jingrong Lin
|
be3546f7e3
|
Merge branch 'master' into bin_format
|
2024-10-08 13:28:53 +08:00 |
|
tangxifan
|
b9a0b1cdf8
|
[core] code format
|
2024-10-07 14:21:19 -07:00 |
|
tangxifan
|
4f96680e1f
|
[core] adapt to side var changes
|
2024-10-07 14:20:48 -07:00 |
|
Lin
|
ed381692a7
|
read bin format mod (with bug)
|
2024-09-27 18:41:30 +08:00 |
|
Lin
|
ef18d04a3a
|
write bin function works now
|
2024-09-27 17:21:24 +08:00 |
|
Lin
|
3fcdc10d3a
|
write bin function no compile error
|
2024-09-27 11:34:57 +08:00 |
|
Lin
|
5174b7a336
|
add capnp for unique blocks and add write bin function
|
2024-09-26 17:39:52 +08:00 |
|
Lin
|
faa222f2c1
|
create capnp folder
|
2024-09-25 18:42:04 +08:00 |
|
tangxifan
|
415fd9a8fa
|
[core] code format
|
2024-09-21 21:39:30 -07:00 |
|
tangxifan
|
9e461284d0
|
[core] standardize API for clock network intermeidate drivers
|
2024-09-21 21:38:32 -07:00 |
|
tangxifan
|
1332d426c7
|
[core] code format
|
2024-09-20 17:42:53 -07:00 |
|
tangxifan
|
965ee2190e
|
[core] support intermediate driver in clock arch
|
2024-09-20 17:42:26 -07:00 |
|
tangxifan
|
8e04d473f2
|
[core] code format
|
2024-09-18 21:10:31 -07:00 |
|
tangxifan
|
44a07704ff
|
[core] add check codes for last stage pgl model
|
2024-09-18 21:10:02 -07:00 |
|
tangxifan
|
f6b645fd25
|
[core] code format
|
2024-09-18 17:44:55 -07:00 |
|
tangxifan
|
82878063c1
|
[core] syntax
|
2024-09-18 17:32:04 -07:00 |
|
tangxifan
|
47e30c3e4b
|
[core] support last stage mux
|
2024-09-18 17:26:44 -07:00 |
|
tangxifan
|
82cf7bbb8c
|
[core] Add verbose mode on find_node() for clock rr graph
|
2024-08-02 17:47:41 -07:00 |
|
tangxifan
|
ae1100ceba
|
[core] cleanup debug message
|
2024-08-02 17:05:59 -07:00 |