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OpenFPGA
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3,990 Commits 70 Branches 8 Tags 105 MiB
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3990 Commits

Author SHA1 Message Date
Ganesh Gore 0c9893cbae Adding complete yosys directory as artifact to test 2021-10-07 23:55:15 -06:00
Ganesh Gore f40763af0d Merge remote-tracking branch 'origin/master' into yosys_plugin_support_clone 2021-10-07 23:06:56 -06:00
ganeshgore d85e55aef2
Merge pull request #385 from coolbreeze413/add-wget-to-dependencies 
add wget to list of dependencies
 2021-10-07 21:04:29 -06:00
coolbreeze413 f60f5b4ae5 add wget to list of dependencies 2021-10-08 03:22:30 +05:30
kkumar23 0a659bc48b update plugins 2021-09-21 23:02:42 -07:00
Kishor 624f6a0e95
check wget issue 2021-09-22 11:10:04 +05:30
tangxifan 1603c9b404
Merge pull request #374 from foggy-slt/patch-1 
Update fpgaflow_default_tool_path.conf
 2021-09-21 19:02:29 -07:00
Kishor 6a45d959da
fixing cmake issues 2021-09-21 16:33:05 +05:30
Kishor 8252b81850
fix cmake issue 2021-09-21 13:31:09 +05:30
Kishor c00dadedf0
Set dependency for yosys_plugins 2021-09-21 13:14:14 +05:30
Kishor 4a12e6f9bd
Update CMakeLists.txt 2021-09-21 11:37:05 +05:30
Kishor bc26ee0293
Update CMakeLists.txt 2021-09-21 10:54:28 +05:30
Kishor 03e2b0c605
Fix Docker CI issue 
Added yosys path
 2021-09-21 00:05:51 +05:30
Kishor 2b2030e579
Update CMakeLists.txt 
check dependencies
 2021-09-20 23:48:27 +05:30
Kishor e94ae9ae3e
set dependencies for yosys-plugins 2021-09-20 23:36:38 +05:30
Kishor 672ece2ce4
adding wget in install dependencies 2021-09-20 17:38:50 +05:30
Kishor 59806beb46
set wge dependency 2021-09-20 16:56:20 +05:30
kkumar23 036ba997f3 remove path variable for yosys 2021-09-20 04:23:16 -07:00
kkumar23 938728175f update yosys-plugins 2021-09-20 02:47:18 -07:00
slt b867db815f
Update fpgaflow_default_tool_path.conf 
Update regex for VPR
 2021-09-17 14:02:26 +08:00
Kishor c91b77eedd
fix_build_error 2021-09-07 17:53:04 +05:30
kkumar23 e9578f7784 rename to yosys-plugins 2021-09-07 05:01:09 -07:00
kkumar23 700c48c24c restore build.yml 2021-09-07 04:51:11 -07:00
kkumar23 29287cca20 restore build.yml 2021-09-07 04:48:44 -07:00
tangxifan 30feb78469
Merge pull request #364 from lnis-uofu/tutorials 
Tutorials
 2021-09-04 19:07:46 -07:00
tangxifan 801b91f776
Merge branch 'master' into tutorials 2021-08-31 17:17:40 -07:00
Andrew Pond 3c041b6012
Merge pull request #363 from lnis-uofu/compilation_readme 
Update compile.rst
 2021-08-17 11:08:14 -06:00
Andrew Pond 7537118843
Merge branch 'master' into compilation_readme 2021-08-17 10:19:31 -06:00
ANDREW HARRIS POND 1c09b8c3e0 fixed python instruction 2021-08-17 10:18:51 -06:00
ganeshgore d14a7f74f0
Merge pull request #366 from WRansohoff/accept_absolute_task_paths 
Accept absolute project paths in the 'run_fpga_task.py' script
 2021-08-13 11:17:33 -06:00
Will c31c1d8b04 Accept absolute project paths as inputs to the 'run_fpga_task.py' script. 2021-08-13 11:08:09 -04:00
bbleaptrot 814d290463
Merge branch 'master' into tutorials 2021-08-05 10:24:34 -06:00
bbleaptrot c867c7e628
Update index to include FAQ page 2021-07-28 10:14:31 -06:00
bbleaptrot 2bb76e4a82
Update to include suggested changes 2021-07-28 10:13:25 -06:00
bbleaptrot 17d3fb5d5e
Add FAQ to source folder to go along in appendix 2021-07-28 10:10:17 -06:00
Andrew Pond a8a8c25a21
Update compile.rst 2021-07-26 15:18:23 -06:00
Andrew Pond 1c0bec1c5a
Update compile.rst 2021-07-26 15:17:25 -06:00
Andrew Pond 3ce866f2eb
Update compile.rst 2021-07-26 15:12:59 -06:00
tangxifan 223e06d23c
Merge pull request #359 from lnis-uofu/pin_constraint_polarity 
Add Test Cases for the Signal Polarity Support in Pin Constraint Files
 2021-07-02 18:51:24 -06:00
tangxifan 9f03ecb160 [Test] Patch test case due to the changes in counter benchmarks 2021-07-02 17:57:39 -06:00
tangxifan 64dcdaec61 [Test] Update all the tasks that use counter benchmark 2021-07-02 17:29:13 -06:00
tangxifan 5a6874e9f1 [Benchmark] Rename the dual clock counter benchmark to follow the naming convention on counter benchmarks 2021-07-02 17:28:17 -06:00
tangxifan 8baf60603a [Script] Patching the run_fpga_task.py on pin constraint files 2021-07-02 15:59:29 -06:00
tangxifan e9d29e27e5 [Tool] Bug fix 2021-07-02 15:32:30 -06:00
tangxifan fdf94cba83 Merge branch 'ganesh_dev' of https://github.com/LNIS-Projects/OpenFPGA into pin_constraint_polarity 2021-07-02 15:28:34 -06:00
tangxifan 3cbe266c44 [Test] Bug fix on the test case for multi-mode FF and pin constraints 2021-07-02 15:27:27 -06:00
Ganesh Gore c67807868c [bugFix] Benchamrk variable declaration 2021-07-02 15:26:39 -06:00
tangxifan 6e6c3e9fa4 [Tool] Patch the critical bug in the use of signal polarity in pin constraints 2021-07-02 15:26:21 -06:00
tangxifan 3aacce2a96 Merge branch 'pin_constraint_polarity' of https://github.com/LNIS-Projects/OpenFPGA into pin_constraint_polarity 2021-07-02 14:04:42 -06:00
tangxifan a5101be2f6 Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA into pin_constraint_polarity 2021-07-02 13:58:33 -06:00