* Bug: In Hurricane, in Cell::_preDestroy(), the classic mistake again:
do not iterate over a collection while deleting it's elements.
Now should be safe.
* Change: In CRL Core, set the default display style to "Alliance.Classic [black]"
(my favorite).
* New: In boostrap, in ccb.py, added support for the "support" project
which contains external dependencies. Currently contains only
RapidJSON. Those dependencies must be cloned here manually.
* New: In Hurricane, Initializer class for an ordered static initialization
across different compilation modules.
* Change: In Hurricane, at DataBase level, no longer save the Cells in
the libraries, but create and ordered list of Cell. Deepest cells
(leaf cells) first. To avoid dependency problems.
* New: In Hurricane, JSON support for Property.
* New; In CRL, added JSON support for AllianceFramework, Environement &
Catalog and their associated properties. Adjustment of the
AllianceLibrary creation policy.
* Change: In Knik, in Vertex, add a "blocked" flag to signal disabled
vertexes in the grid (must not be used by the global router).
Modificate the Graph::getVertex() method so that when a vertex
is geometrically queried, if is a blocked one, return a non-blocked
neighbor. This mechanism is introduced to, at last, prevent the
global router to go *under* the pad in case of a commplete chip.
* New: In Katabatic, in AutoSegment, a new state has been added: "reduced".
A reduced segment is in the same layer as it's perpandiculars.
To be reduced, a segments has to be connected on source & target to
AutoContactTurn, both of the perpandiculars must be of the same layer
(below or above) and it's length must not exceed one pitch in the
perpandicular direction.
To reduce an AutoSegment, call ::reduce() and to revert the state,
call ::raise(). Two associated predicates are associated:
::canReduce() and ::mustRaise().
Note: No two adjacent segments can be reduced at the same time.
* Bug: In Katabatic, in GCellTopology, add a new method ::doRp_AccessPad()
to connect to the pads. Create wiring, fixed and non managed by
Katabatic, to connect the pad connector layer to the lowest routing
layers (depth 1 & 2). The former implementation was sometimes leading
to gaps (sheared contact) that *must not* occurs during the building
stage.
Remark: This bug did put under the light the fact that the initial
wiring must be created without gaps. Gaps are closed by making doglegs
on contacts. But this mechanism could only work when the database if
fully initialised (the cache is up to date). Otherwise various problems
arise, in the canonization process for example.
* New: In Katabatic, in AutoContactTerminal::getNativeConstraintBox(),
when anchored on a RoutingPad, now take account the potential rotation
of the Path's transformation. Here again, for the chip's pads.
* New: In Kite, support for reduced AutoSegment. TrackSegment associateds
to reduced AutoSegment are *not* inserted into track to become
effectively invisibles. When a segment becomes reduced, a TrackEvent
is generated to remove it. Conversely when it is raised a RoutingEvent
is created/rescheduled to insert it. All this is mostly managed inside
the Session::revalidate() method.
* New: In Kite, in KiteEngine::createGlobalGraph(), in case of a chip,
mark all global routing vertexes (Knik) that are under a pad, as blockeds.
* Bug: In Cumulus, in PadsCorona.Side.getAxis(), inversion between X and
Y coordinate of the chip size. Did not show until a non-square chip
was routed (i.e. our MIPS R3000).
* Change: In Stratus1, in st_placement.py add the ClockBuffer class for
backward compatibility with the MIPS32 bench. Have to review this
functionnality coming from the deprecated placeAndroute.py.
In st_instance.py, no longer creates the Plug ring of a Net.
In my opinion it just clutter the display until the P&R is called.
Can re-enable later as an option (in Unicorn).
* Change: In Unicorn, in cgt.py, more reliable way of loading then running
user supplied scripts. Borrowed from alliance-checker-toolkit doChip.py .
* New: In Hurricane, In Cell, add Placed and Routed flags to know the
state of the Cell.
* Change: In CRL Core, In ApDriver, do not save the RoutingPads as
external connectors if the design is *not* routed (create
conflics on reload with the newly generated RoutingPads).
* Change: In Etesian, set the Placed flag on the Cell.
* Change: In Kite, set the Routed flag on the Cell.
* Change: In Cumulus, in RSavePluginAll, save the layout only if it
has a bounding box.
* New: In Hurricane, In Net & Cell, support for Net aliases names.
Use a structure based on a simple ring of NetAliasHook. The Net
holds a global map, sorted by names of all the aliases of all Nets.
Elements NetAliasesHook of the map are slaves of ring whose master
is an attribute of the Net (it is *not* in the map, as the primary
name of the Net).
In case of merge, the aliases of both Nets are merged and the
name of the merged one become an alias.
The Cell::getNet() looks in both the Net map and the aliases to
find a Net by name.
* Bug: In CRL Core, in coriolisInit.py, reoder the loading of the
configuration files so the real technology is read as early as
possible to set up the <gridsPerLambda> factor before any lambda
is actually computed...
* Bug: In CRL Core, in AcmSigda, do not try to fed the file when it
has failed to be opened. Throw a clean exception instead.
* New: In CRL Core, in Toolbox, add a NamingScheme object to convert
a design into VHDL compliant names (mainly from Blif/Verilog).
This is extensible in any case.
* New: In CRL Core, in BlifParser, slightly more informative warning
messages. Align the loading progress information on the other
parsers.
Add a capability to select which component of the design will
be returned, if there are more than one. Use the "." as separator.
For exemple you can request "Processor.Alu", which will load
the "Alu" component from the design in "Processor.blif".
To be able to save a Blif loaded design, systematically convert
all the name for VHDL compliance, as it is the format used by
the Coriolis native files (vst).
Export the Blif parser to the Python interface.
* New: In Kite, In NegociateWindow, add a counter of the number of
remaining events. Gives an idea of the ETA...
* New: In Unicorn, in cgt.by, add an option to load a Blif design from
the command line.
* New: In Cumulus, new RSave plugin to save both netlist & layout.
Partly redundant with the previous one. Have to better organize
that later.
* Change: In CRL Core, simplify the loading sequence. The technology,
both symbolic and real is now loaded directly from coriolisInit.py
and not through the Alliance loader. This was a leftover from the
time configuration was in XML. Remove others traces of XML loading.
Remove SYMB_TECHNO_NAME, REAL_TECHNO_NAME & DISPLAY from the Alliance
environement, as they was no longer used.
Note that technology *still* need to be loader *after* Alliance
framework has been initialized.
Gauge information is moved from <alliance.conf> to <kite.conf>.
* Bug: In Coloquinte, in optimization_subproblems.cxx static variables
must not be inlined. Generate a problem when linking in debug mode
(seems the symbol gets optimised out).
* Bug: In Katabatic, in Grid::getGCell(), when the coordinate is *outside*
the area, do not try to find a GCell, directly return NULL.
* New: In Unicorn, create a generic command launcher named "coriolis" which
automatically take cares of all environement setup, then run a command
by default, it's <cgt>, but it can be anything. For example: <zsh>.
* New: In CRL Core, remove obsoleted XML files, no longer needed by
Chams. Add stub for technologies CMOS065 (ST) and C35B4, aka
AMS 035.
* Bug: In Knik, update the path where to find the FLUTE lookup tables.
(from 2.4 to 3.1).
* New: In VLSISAPD, in Configuration, add a new priority level UserFile
to distinguish between the system configuration files and the user's
configuration files (which take precedence).
* New: In Hurricane, in Script (Python), improve the API to be able
to support Chams (and remove the duplicate capability from it).
Add separate functions to perform the initialize/run(s)/finalize
cycle step by step.
* Change: In CRL Core, rename real technology <hcmos9> to <hcmos9gp>,
it's offcial name from CMP/ST. This is the 130nm.
Move the reading of the symbolic & real technologies names from
coriolisInit.py to helpers.__init__.py, to be shared with
chamsInit.py.
To avoid a clash of names inside of helpers, the two variables
of techno.py are renamed "symbolicTechnology" and "realTechnology".
Move python init system from crlcore/src/crlcore to crlcore/python.
* New: In CRL Core, In Utilities, add site-packages/pharos to the
PYTHONPATH.
* Change: In Kite, move python init system from kite/src/init to
kite/python.
* Change: In Bootstrap & ccb, the coloquinte project is renamed into
"importeds", it will be the home of all the externally
devellopped softwares that are needed to build Coriolis.
Add explicit support for Fedora ("Linux.fc") and uses
site-packages, as everybody else.
* New: In CRL Core, in etc/, adds the configuration files for Etesian.
* New: In Etesian, activate the Configuration object. Now uses it's
own configuration variables instead of borrowing those of
Nimbus & Mauka.
* Change: In Documentation, updated User's Guide to present Etesian
as the placer, instead of Mauka.
* Change: In Cumulus, slight change in ClokTreePlugin and ChipPlugin
to match the new Etesian/Python interface.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
given a path and a leaf net. This method is slow and must not be
used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
of clock nets was incomplete. The case of unrouted clock nets
that where not connected to the top core clock net, like the
one in the datapath registers was faulty. They were partly
recognized as unrouteds and partly as blockage generating a
routing deadlock: routage impossible due to blockage generated
from itself...
* New: In Stratus1, add a buildModel() utility function to automate
the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
* Bug: In Bootstrap, in coriolisEnv.py, check if devtoolset-2 is already
active before launching it as a sub-shell.
* Bug: In Isobar, In PyHurricane.h, DBoDestroyAttribute() set the proxy
pointer toward the C++ object to NULL. So when the Python object is
deleted no double-deletion occurs on the C++ object.
Add some more trace information in Python link/dealloc.
* Change: In CRL Core, in cyclop, make CMakeLists.txt automatically
choose the right rule for linking the binary wether we use Qt 4 or
Qt 5. Very irksome problem.
* New: In EtesianEngine::addFeed(), do not take into account instances
that are not placed entirely inside the top cell abutment box (was
causing a core dump).
* Bug: In Katabatic, in GCellQueue, correct a mismatch between a GCell
set and the iterators used upon it.
* Bug: In Mauka, in Row & Surface correct a mismatch between a container
and it's iterator.
* New: In Etesian, updated to work with the latest Coloquinte, patch
contributed by G. Gouvine.
Added EtesianEngine::setDefaultAb() to compute an abutment box if
the Cell is completly unplaced.
* New: In cumulus, in ClockTree, now the placer can be configured to be
either Mauka (slow simulated annealing) or Etesian (fast analytic).
New setting 'clockTree.placerEngine' in plugin settings.
* New: In Bootstrap, in Builder & coriolisEnv.py support for RHEL7/SL7.
The sub-directory name is 'el7_64'.
In qt_setup() add QtSvg to list of Qt5 & Qt4 used libraries.
* New: In Hurricane, In Cell add a placeholder for flags. First use to
store whether the Nets have been transhierarchically flatteneds.
* New: In Hurricane, In NetRoutingState add an Unconnected flag for
more accurate diagnosis.
* New: Hurricane, in CellViewer add an entry menu for stress tests.
The script must be named "stressScript.py" in the cwd.
* Change: In CRL Core, in display.conf add a scaling parameter for the
display threhold of the layer. This way we can adapt to different
standard cells height.
* Change: In CRL Core, in ISPD05 bookshelf loader, use the pitch of the
cell gauge instead of a hard-wired 5.0.
* Change: In Cumulus, in ClockTreePlugin, add support for Etesian placer
and a new configuration parameter to choose between Mauka/Etesian.
* New: In Etesian, support for the latest Coloquinte.
Add feed insertion stage.
* Bug: In Kite, In BuildPowerRails, check that _ck is not NULL before
tring to access it's name...
* Change: In Kite, check if the Cell has it's Nets flattened before
doing it (or not).
* Change: In CRL Core, in coriolisInit.py now read the configuration
files from a ".coriolis2/" directory. This is to avoid too many
dot files in the user's directory. Files have also been renamed:
.coriolis2.conf ==> .coriolis2/settings.conf
.coriolis2_techno.conf ==> .coriolis2/techno.conf
* Change: In Kite, in kiteInit.py follow the same policy as CRL Core
for configuration file.
.coriolis2.kite.py ==> .coriolis2/kite.py
* Change: In Hurricane, the NetRoutingProperty is moved into Hurricane
from Katabatic. Needed for Knik to be able to access thoses
informations.
* Change: In Hurricane, in RoutingPad::setOnBestComponent(), now in
case of identical area, select the component of lowest id.
This should not be needed if the component ordering was fully
deterministic as it should be (will investigate later).
This is to ensure that the choosen component is always the
same, especially between save/load of a global routing.
* Bug: In Katabatic, in AutoContactHTee::updateTopology(), invalidate
the segments only if the topology is valid (no NULL in the
cached segments).
* Bug: In Katabatic, in GCellTopology::construct(), throw an error
if the topology is bad instead of trying to continue (and core
dump later... ).
* Bug: In Kite, in BuildPowerRails, distinguish the name of the master
net in the pad (for vddi, vssi, vdde, vsse, ck, cki & cko) and the
name of the net in the *chip* netlist. Must use the later to make
comparison as they may differs.
* Change: In Knik, in save/load solution, exclude nets that are not
globally routed by Knik. That is which NetRoutingProperty is not
*Automatic*.
* Bug: In Cumulus, in chip.BlockPower take account of the layer
width extention to sligthy shrink the connector thus avoiding a
notch with standart cell in some cases.
* Change: In Cumulus, in chip.ClockTree disable the use of fixed Steiner
trees for the leaf clocks, as it seems overconstrained for the
router. First move was to lower them in M2/M3 (instead of M3/M4)
but that was not sufficent.
* New: In Cumulus, RSavePlugin for recursively saving a physical
hierarchy.
* New: In documentation, first embryo for RDS file. Should have been
in Alliance git, but I prefer to keep newest doc in Coriolis.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
* New: In ClockTree plugin, select the name of the buffer cell through
configuration (parameter: "clockTree.buffer"), and guess the I/O
name of this buffer automatically.
Put configuration parameters in plugin.conf and not mauka.conf.
Bug: strangely triggers a coredump in components collection
when used with <vsxlib>. Some debug printing still active until
that is solved.
* New: In Chip plugin, make the size and numbers of the block rails
configuration parameters (in plugin.conf).
* New: In CRL Core, added configuration for SCMOS_DEEP symbolic technology
up to 180nm "scmos_deep_018". It is postfixed "_018" because it is not
yet compliant with 130nm (asymetrical VIA metal extensions).
Added the associated real technology SCN6M_DEEP (TSMC 180nm).
* Change: In CRL Core, in Alliance.py, no longer requires the
configuration file to uses symbols from CRL.Environment or
CRL.RoutingLayerGauge. This way the <alliance.conf> file can be
parsed by a different parser.
In <alliance.conf>, for the various technologies, make uses
of the new C++ independent constants.
* New: In CRL Core, in helpers/__init__.py, provide a "Dots" class
(rewrite the C++ one in pure Python).
* New: In Cumulus, new Alliance.py module (*not* a plugin) providing
an encapsulation for Alliance command line tools. The other main
feature is that it provides a "Makefile like" behavior. Based on
the command dependencies a DAG is contructed, then a static
ordering of the commands. Commands are then executed to rebuild
outdated target.
The Alliance environment supplied to the commands is read from
the Coriolis configuration file <alliance.conf>.
For this first evaluation version, only <boom>, <boog> and
<loon> support are provided.
It still not clear how to encapsulate the Coriolis tools in
the same way.
* Change: In CRL Core, in helpers/__init__.py, change the way the static
initialization (module) is done. All the commands are put inside
a "staticInitialization()" function, which is then explicitly
called by others. This is a better solution agains *no* or *twice*
initialization. Modificate <coriolisInit.py> accordingly (as
<Alliance.py> from Cumulus.
Finally get rid of the demonic code from Wu Yifei...
* New: In Isobar, added encapsulation of Interval (don't know how have
forgotten it for so long).
* Change: In Isobar, In PyLayer, new PyLink_LayerDerived() function to
create/link the C++ object to the correct derived class and not the
base one (PyLayer) which then prevent to use the specialized methods.
Must replace PyLink_Layer() througout all the code.
* Change: In Isobar, in PyPoint the "setX()" & "setY()" methods where
still capitalized.
* Change: In Isobar, in PyQuery, complete the exportation of the C++
interface. remove the code belonging to a more "boost" way of
building the Python interface (will do that in a far future).
* New: In CRL Core, In PyAllianceFramework, export isPad() method.
* Change: In Unicorn, in unicornInit.py, protect the loading of each
single plugin by a "try" / "except" clause to the failing of one
plugins do not stop the loading of the next one.
Pass the same dictionnary argument to unicornHook() as for
ScripMain(), this is more uniform this way.
* New: In Cumulus, complete replacement of the chip placement scripts
from Wu Yifei (at last!). The clock-tree integration is still to
be done.
________________________________________________________________________
* Change: In Kite, Katabatic & Knik, express the number of tracks truly
available to the global router by the number of tracks reserved to
the local routage inside a GCell. Replace the ratio parameter
"hEdgeCapacity" by an integer parameter "hTracksReservedLocal"
(duplicate for verticals).
It is more explicit to give directly the number of tracks that
are to be used locally, and potentially saves us from rouding
problems when calculating the number of availables tracks.
Note: we cannot do that for the layer saturateRatio as it
uses the density ratio that take account local wires, leading
to fractional results.
* Change: In Katabatic, in <GCellGrid>, rename checkEdgeSaturation()
into checkEdgeOverflow(), more explicit.
* Change: In Knik, in <Graph>, display the computed capacities of the
lower left node edges (should be the same througout all the grid).
* Change: In Unicorn, in <cgt.py>, uses the new parameters names for
edge density.
Placement management:
* Change: In <metis>, always disable the hMetis support regardless of
it being detected or not as the placer is still unable manage the
final bin contents.
Routing gauge management:
* Bug: In CRL Core, <vsclib/alliance.conf>, set the correct pitches and
size for the routing layers and the cell gauge.
* Change: In Katabatic & Kite, extract the correct extension cap for each
routing layer from the layers characteristics (cache then in
Katabatic::Configuration).
* Change: In Katabatic, <AutoSegment>, create segment with the wire width
defined in the gauge. For AutoSegment created on already existing
Segment from the global routing, adjust the width.
* Change: In Katabatic, <AutoSegment>, more accurate information about how
a segment is connected to terminal via source and/or target.
The flag SegStrongTerminal is splitted into SegSourceTerminal and
SegSourceTarget (but still used as a mask). So now we can know by
which end an AutoSegment is connected to a terminal.
* Change: In Katabatic, ::doRp_Access(), create constraint freeing segments
not only when HSmall but also when VSmall (more critical for <vsclib>).
Otherwise we may see AutoSegments with incompatible source/target
constraints.
* Change: In Kite, BuildPowerRails, do not create blockage on PinOnly
layers *but* still create power rails planes. This is a temporary
workaround for <vsclib> where the METAL1 blockages overlaps the
terminals (it was fine for Nero, but they shouldn't for Kite).
* Change: In Kite, <RoutingEvent>, if a TrackSegment is overconstrained,
directly bybass it's slackening state to DataNegociate::Slacken.
Also rename the flag "_canHandleConstraints" to "_overConstrained",
seems clearer to me.
Miscellaneous:
* Change: In CRL Core, <Utilities>, add a "pass-though" capability on the
mstream to temporarily make them print everything.
In CRL Core configuration files, "display.conf", "patterns.conf" and
"technology.conf" share most of their code. So that common part is put
into "common/" and sourced from the final configuration file.
Update the documentation according the the new initialization scheme.
In CRL Core, the layout of the files under "/coriolis2/etc" changes.
Instead of having them directly under "etc", they are now replicated,
in subdirectories. Each subdirectory having the name of the associated
symbolic or real technology (they are kept separated). We have, for
now:
* etc/cmos/ : symbolic, the Alliance original one.
* etc/vsc200/ : symbolic, for G. Petley vsclib.
* etc/hcmos9/ : real, generic fake (130nm).
To tell which pair (symbolic,real) technologies must be used we create
a *second* (sigh) configuration file "coriolis2_techno.conf", and it's
hidden counterpart in the user's account, to set it up. It needs to be
separate because it is read as early as possible and select which set
of configuration files would be read.
Also add support up to METAL8 and POLY2 in CRL core and it's Alliance
parser/drivers.
Miscellaneous:
* Change: In <crlcore>, in display.conf use the same display threshold
for both METAL2 & METAL3.
In alliance.conf, the side of VIAs in the gauge is 2l (not 3l).
In kite.conf, separate edge densities for H/V.
* Change: In <Cell>, in flattenNets() use flag as argument, not a
boolean. Do not create rings for clock or supply nets.
* Change: In <DeepNet>, in _createRoutingPads() do not create rings
for clock or supply net (duplicated policy as in Cell::flattenNets()).
* Bug: In <ControllerWidget>, at last find the bad signal disconnect
that was causing ungraceful messages.
* Change: In <knik>, in Edge display occupancy/capacity in the string
name. Improved display progress and debugging capabilities.
Improved exception catch & breakpoint managment:
* Bug: In <PaletteWidget>, in updateExtensions() replace the calls to
deleteLayer() by delete. This cause the widget to be immediatly
erased instead of waiting for the event queue to be completly
processed. This was causing the widget to be left in a incoherent
state when stoping at a breakpoint.
* Bug: In <BreakpointWidget>, in execNoModal(), flush the main event
loop (QApplication::flush()) *before* lauching the *local* event
loop. This is to ensure all widgets are in their final state when
waiting (especially <PaletteWidget>).
* Change: In <ExceptionWidget>, new method catchAllWrapper() to
execute any std::function< void() > function/method with a "try"/
"catch" wraparound and lauch the widget in case something is catch.
* New: In <hurricane>, support for a oberver pattern, backported from
<katabatic> with an Obervable capable of being linked to any
number of Obervers.
* New: In <Cell>, made it observable to detect Cell change, currently
emit two kind of signals:
- Cell::CellAboutToChange : *before* any change.
- Cell::CellChanged : *after* the change has been completed.
* New: In <UpdateSession>, in Go::invalidate() add the Cell owning the
Go to the UPDATOR_STACK (of course the cell is added only once).
In addition, when the Cell is added, send a notification of
Cell::CellAboutToChange to all it's observers. The slave instances
are also invalidated.
Conversely in UpdateSession::_preDestroy() for each invalidated
Cell send a Cell::CellChanged notification to all observer.
The UPDATOR_STACK has been slightly amended to accept Cell which
are not Gos. Prior to this, the Cell where completly excluded from
the UpdateSession mechanism, so it's instances where never actualised
of anything referring to the Cell for that matter.
Note: we use two different mechanisms to transmit a Cell change,
observers and the slave instance map. I think at some point it
should be unificated.
* Change: In <CellViewer>, make it a Cell observer to redraw when the
cell is modificated (also update the palette).
Uses the catchAllWrapper() to protect all critical actions.
* Change: In <GraphicTool>, no longer need of cellPreModificated and
cellPostModificated signals. Now done through the Cell obersvers.
* Change: In <mauka>, <etesian> & <kite> now uses the catchAllWrapper
method for protection (need to split methods in two, to be able
to pass it as argument). No longer emit cellPreModificated and
cellPostModificated.
Support for RoutingGauge in P&R:
* Bug: In <placeandroute.py>, the connection from the internal power
ring to the connectors was not done correctly. Wrong contact layers
leading to a gap.
* Change: In <BuildPowerRails>, detection of the corona signals based
on how the "pck_px" pad is connected. No longer based on name
matching.
* Change: In <placeandroute.py>, support for 2 routing metal only
(3 metal in the technology).
* Change: In <katabatic> & <kite> support for a "top layer" limitation
on the routing gauge, this allows to use only two routing metals
(METAL2 & METAL3). Work in progress.
Documentation restructuration:
* Bug: in <hurricane>: bad figure for transf-R1.
* Change, in <kite>: Remove deprecated configuration variables.
* New: documentation <tool> to regroup all documentation not directly
related to one tool.
* Change, in <crlcore>, move the user's guide and the top doc index
into <documentation>.
* New, in <documenation>: added Python script demo based on AM2901.
- Change: In Cell, added doc about PlacementStatus.
- Change: In Transformation, more detailed explanations about the
orientations. A little beautifying too...
- Change: RoutingPad doc update.
- Change: Entity doc update (for id).
- Change: In HTML header/footer uses the new SoC.css.
* ./crlcore/src:
- Change: In DefDriver, added support for placement exportation.
- New: In Utility, added a "paranoid" output stream (for my extra
warnings in the router).
- Bug: In ApParser, correct parsing of connectors index (recreate
the vector).
- Change: In alliance.conf, make "blockageNet" case insensitive.
- Change: In misc.conf, added support for paranoid stream.
- Change: In x2y and CyclopMain correct verbose flags positionning.
* ./crlcore/doc:
- Change: Updated style and added some documenation.
- Bug: In CMakeLists.txt, when our custom macro "setup_boost()" is used,
do not call find_package() afterward, it corrupt the library pathes
from '/usr/lib/' to '/usr/lib/lib/'.
- Bug: In Histogram::addSample(), reject the sample if iset is superior
OR EQUAL to the sets size...
- Change: In etc/mauka.conf, sets "mauka.standardAnnealing" to True. Otherwise,
when hMetis (4-part) is not used, this leads toward very poor placements.
- New: In UsersGuide, add a third style variant for the soc-extras site.
- New: Added FreeBSD/Ubuntu patches from Otacilio De Araujo
(<otaciliodearaujo@gmail.com>).
* ./crlcore:
- New: In Utilities, cbug stream to separate all the scary messages
from Kite/Katabatic and maybe others.
- New: In stratus1.conf, adds default settings previously in st_config.
- New: Moves Python configuration helpers from under /etc/coriolis2
into PYTHON_SITE_PACKAGES/crlcore. Adapt Utilities so coriolisInit.py
is now searched in that directory. This way only true configuration
files remains under /etc/coriolis2
- Change: In helpers/__init__.py, do not try to guess the sysConfDir
when not run through coriolisInit.py. This is done by exploring the
call stack with traceback.
- Change: In ApDriver, when a physical view is driven, update the flag
in the catalog state telling that this view is present. This is far
from satisfactory as this flag should be set as soon as any physical
component is created.
- A complete sweep of cleanup to suppress allmost all compiler warnings.
* ./crlcore:
- New: Extented Python support for all objects needed to configure Coriolis.
- New: Configuration files and load helpers completly written in Python.
An XML emulation mode is still avalaible.
- New: UsersGuide, as a replacement for README, written in ReST.
- New: Start of Doxygen documentation (mostly for documenting the initialisation
objects & methods).
- New: In GraphicsParser, read the new darkening scheme (HSV ratio).
"display.xml" configuaration file modificated accordingly. May be some
tuning needed for white background styles.
- New: Histogram object, imported from Kite. Made more generic to be reusable
by all.
- Change: In Measures, added Inspector support.
NOTE: The hidden property holding MeasuresDatas no longer uses a pointer
a value. This forces us to enable the copy constructor. It is needed
for some inner STL container manipulation, but should *not* be used
with non-empty datas. The copy constructor *do not* copy the internal
datas (reset the object).
- New: In Measurments, support for complex data sets, saved in separate Gnuplot
<.dat> files. Used to integrate Histogram.
- New: In Histogram, now a supported Measure type so it can be integrated along
all others measurments.
- Bug: In display.xml, forgotten gcut description in Alliance Classic black
style.
- Change: Rename "obstacle" to "blockage" in all the places it still appears
to be completly homogeneous.
- New: In Catalog, adds a "Pad" attribute to mark cells that are pads.
- Change: In ApParser, discard "padreal" instances as a cause for a Cell to
be non-terminal. This is for LeafPlugOccurrences to consider the terminals
of those cells.
- Change: In ApParser, makes use of the new Pad flag in Catalog.
- New: Inspector support enabled for AllianceFramework and most of it's
sub-objects. Attached as a property on the DataBase to be browsable
through the Inspector.
- Change: Now also read a <.coriolis2.configuration.xml> in the user's
root account (before the directory specific one and after the system-
wide).
- Change: In verbose mode, also display what environment files are being
read.
- Change: No more reference to CRL_CATA_LIB in error messages.
- Change: Suppress stratus2sxlib obsolete library.
- New: In Utilities, uses the new Backtrace to print the stack before
core-dumping.
- New: In Environment, pattern recognition of Pad model names.
- New: In AllianceFramework, pattern recognition of Pad model names.
- Bug: In Measures, add inspector support and uses pointer to prevent using
copy construction. Makes the inspector to core-dump.
- New: In RoutingLayerGauge, inspector support for Constant::Direction.
- Change: In ApDriver, correct managment of BIGVIA sizes. BIGVIA in one
metal keep their sizes, but BIGVIA whith cut must be expandeds to
contains their enclosure in metals. In Hurricane VIA size are relatives
to the cut but in Alliance, to the biggest metal.
Generate correct direction (always UP or RIGHT) for segments.
- Change: In ApParser, shrink BIGVIA to the size of their cut from the
Alliance format. Avoid VIA "bloating".
More thorough verification of Segment data coherency, mainly with
direction.
Suppress warning of non-existent logical instance in the special
case of "padreal".
- Change: In VstParserGrammar, perform an explicit plug connection on globals
Nets if the names of globals Nets differs.
- New: In display.xml, add style for printers (B&W).
- Bug: In technology.symbolic.xml, BLOCKAGE6 was associated to metal6 instead
of blockage6.
Correct extensions value for VIA metal layers above cut1.
- Bug: In Utilities, in System singleton constructor check of duplicated
type_info/RTTI initialization. Occurs when python modules are useds.
CRL must always be included first.
- New: In tools.configuration.xml, add default values for METAL minimum break
lengths.
- Change: In AcmSigda, makes the parser an autonomous one, like for ICCAD or
ISPD.
- Change: Remove AcmSigda, Bookshelf and LEF/DEF parsers from the Alliance
builtins. They are now to be used through import/export.
- Bug: In Utilities, the <misc.logMode> parameter boolean parameter was used
the wrong way (true/false).
- New: In AllianceFramework constructor, now look for an XML configuration
file in the current directory (<cwd>/.environment.alliance.xml).
- New: DefParser, DefDriver & LefDriver are replaced by DefImport, DefExport
and LefExport (resp.). LEF/DEF parser/driver are no longer integrated
in among Alliance ones due to too much difference in data organisation.
Instead they are build as Import/Export utilities.
- New: Iccad04Lefdef import the ICCAD'04 benchmarks into the SxLib format
suitable for Knik/Kite. They are derived from the ISPD'98 (ibm01--ibm18)
benchmarks. Many corrections are applieds to ensure a more realistic
representation.
Generate a new library from the LEF file "on the fly".
- New: Ispd04Bookshelf import the ISPD'04 benchmarks in SxLib from bookshelf.
Thoses benchmarks can be placeds whith fastplace. Unfortunatly fastplace
do not manage blocks and reduce them to standard cell which is not
usable for detailed placement. Too bad, the parser exists still.
Make uses of the new vlsisapd/bookshelf parser. A whole library is
generated "on the fly" on the basis of "one node, one Cell" (so we have
a bijection between Cell and Instance). The result of this parsing is
different from the one of the stand-alone ispd04 binary in the sense it
fits the circuit to the SxLib gauge thus changing the routing capacity:
from 16 to 20.
- Change: In ApDriver, the lookup modify the lookup table for matching
Alliance layers against Hurricane ones, "OBSTACLEx" became "BLOCKAGEx".
- Change: In default <enviromnent.alliance.xml> adds the name of the
blockage net: "^obstacleNet$". Some work over the coherency of the
blockage managment remains to be done.
- Change: In AllianceFramework, partial rewrite of the get/creation of
AllianceLibrary to fit the requirements of the "on the fly" generation
from the benchmarks loaders. And correct some bugs by the way.
- Change: In Environment, suppress any reference to LEF technology as LEF/
DEF is now used as import/exports.
- Bug: In VstDriver, perform only one lookup for global signals among all
nets and not for each instance master cell. That was making the driver
quadratic! Now it's linear and reasonably fast.
- New: In Utilities, automatic setting of STRATUS_MAPPING_NAME. It's put
back into the environment from the configuration. This suppress the
need for the last environment variable under cgt.
Jean-Paul Chaput
Roselyne Chotin
Damien Dupuis