Add a state to Cell to know if is placed and/or routed.

* New: In Hurricane, In Cell, add Placed and Routed flags to know the
    state of the Cell.
* Change: In CRL Core, In ApDriver, do not save the RoutingPads as
    external connectors if the design is *not* routed (create
    conflics on reload with the newly generated RoutingPads).
* Change: In Etesian, set the Placed flag on the Cell.
* Change: In Kite, set the Routed flag on the Cell.
* Change: In Cumulus, in RSavePluginAll, save the layout only if it
    has a bounding box.
This commit is contained in:
Jean-Paul Chaput 2015-04-16 16:52:33 +02:00
parent ef9936e87c
commit 4023481da3
6 changed files with 20 additions and 82 deletions

View File

@ -1,5 +0,0 @@
# -*- Mode:Python; explicit-buffer-name: "etesian.conf<cmos>" -*-
import helpers
execfile( helpers.sysConfDir+'/common/etesian.conf' )

View File

@ -241,7 +241,8 @@ void DumpContacts(ofstream& ccell, Cell *cell)
forEach ( Net*, net, cell->getNets() ) {
forEach ( Component*, component, net->getComponents() ) {
if ( (rp = dynamic_cast<RoutingPad*>(*component)) ) {
if ( !net->isExternal() ) continue;
if ( not net->isExternal() ) continue;
if ( not cell->isRouted() ) continue;
external = true;
segment = dynamic_cast<Segment*>(rp->getOccurrence().getEntity());

View File

@ -43,7 +43,9 @@ except Exception, e:
sys.exit(2)
# Write back layout to disk if everything has gone fine.
# Write back netlist & layout to disk. Layout is written
# *only* if there is an abutment box otherwise the cell is
# considered as unplaced.
# Must write all the sub-blocks of the core but *not* the
# standard cell (mainly the feed-through).
@ -54,7 +56,11 @@ def rsave ( cell, depth=0 ):
if depth == 0: print ' o Recursive Save-Cell.'
print ' %s+ %s (netlist+layout).' % ( ' '*(depth*2), cell.getName() )
framework.saveCell( cell, CRL.Catalog.State.Views )
flags = CRL.Catalog.State.Logical
if not cell.getAbutmentBox().isEmpty():
flags |= CRL.Catalog.State.Physical
framework.saveCell( cell, flags )
for instance in cell.getInstances():
masterCell = instance.getMasterCell()

View File

@ -799,6 +799,8 @@ namespace Etesian {
( " - RMST", DbU::getValueString( (DbU::Unit)get_RSMT_wirelength(_circuit,_placementUB )*getPitch() ) ) << endl;
_placed = true;
getCell()->setFlags( Cell::Placed );
}

View File

@ -76,6 +76,8 @@ class Cell : public Entity {
, CellChanged = 0x0002
// Cell states
, FlattenedNets = 0x0001
, Placed = 0x0002
, Routed = 0x0004
};
public: typedef Entity Inherit;
public: typedef map<Name,ExtensionSlice*> ExtensionSliceMap;
@ -315,6 +317,8 @@ class Cell : public Entity {
public: bool isLeaf() const;
public: bool isPad() const {return _isPad;};
public: bool isFlattenedNets() const {return _flags & FlattenedNets;};
public: bool isPlaced() const {return _flags & Placed;};
public: bool isRouted() const {return _flags & Routed;};
public: bool isNetAlias(const Name& name) const;
// Updators
@ -326,6 +330,8 @@ class Cell : public Entity {
public: void setFlattenLeaf(bool isFlattenLeaf) {_isFlattenLeaf = isFlattenLeaf;};
public: void setPad(bool isPad) {_isPad = isPad;};
public: void flattenNets(unsigned int flags=BuildRings);
public: void setFlags(unsigned int flags) { _flags |= flags; }
public: void resetFlags(unsigned int flags) { _flags &= ~flags; }
public: void materialize();
public: void unmaterialize();
public: void addObserver(BaseObserver*);

View File

@ -490,80 +490,6 @@ namespace Kite {
if (getState() >= Katabatic::EngineGlobalLoaded)
throw Error ("KiteEngine::runGlobalRouter(): Global routing already done or loaded.");
// Test signals from <multi4_a>.
//DebugSession::addToTrace( getCell(), "aux34" );
// Test signals from <addaccu>.
//DebugSession::addToTrace( getCell(), "auxsc37" );
// Test signals from <amd2901_core_flat>.
//DebugSession::addToTrace( getCell(), "cout" );
//DebugSession::addToTrace( getCell(), "acc_reg_ckx" );
//DebugSession::addToTrace( getCell(), "acc_reg_nckx" );
//DebugSession::addToTrace( getCell(), "i(0)" );
//DebugSession::addToTrace( getCell(), "ram_nmux_0_sel0" );
//DebugSession::addToTrace( getCell(), "ram_adrb_14" );
//DebugSession::addToTrace( getCell(), "ram_adrb_9" );
//DebugSession::addToTrace( getCell(), "ram_adra(11)" );
//DebugSession::addToTrace( getCell(), "ram_adra(7)" );
//DebugSession::addToTrace( getCell(), "ram_adrb(8)" );
//DebugSession::addToTrace( getCell(), "alu_carry(1)" );
//DebugSession::addToTrace( getCell(), "alu_np(0)" );
//DebugSession::addToTrace( getCell(), "ram_q2(0)" );
//DebugSession::addToTrace( getCell(), "ram_q1(0)" );
//DebugSession::addToTrace( getCell(), "ram_i_up" );
// Test signals from <amd2901> (M1-VLSI).
//DebugSession::addToTrace( getCell(), "zero_to_pads" );
//DebugSession::addToTrace( getCell(), "shift_r" );
//DebugSession::addToTrace( getCell(), "cin_from_pads" );
// Test signals from <MIPS> (R3000,micro-programmed).
//DebugSession::addToTrace( getCell(), "scout" );
//DebugSession::addToTrace( getCell(), "adr_1_n" );
//DebugSession::addToTrace( getCell(), "codop_18" );
//DebugSession::addToTrace( getCell(), "frz_ctl(10)" );
//DebugSession::addToTrace( getCell(), "ctl_seq_mbk_not_ep_80" );
//DebugSession::addToTrace( getCell(), "ctl_sts_mbk_not_ctlrw_in_2" );
//DebugSession::addToTrace( getCell(), "dpt_wm_rf_adr4x" );
//DebugSession::addToTrace( getCell(), "crsrin_1" );
//DebugSession::addToTrace( getCell(), "ctl_seq_oa2ao222_x2_2" );
//DebugSession::addToTrace( getCell(), "dpt_ishifter_muxoutput_81" );
//DebugSession::addToTrace( getCell(), "ctl_seq_mbk_not_ep_7" );
//DebugSession::addToTrace( getCell(), "ctl_sts_mbk_not_adel_r" );
//DebugSession::addToTrace( getCell(), "ctl_seq_no2_x1_88" );
//DebugSession::addToTrace( getCell(), "ctl_seq_ep_31" );
//DebugSession::addToTrace( getCell(), "dpt_opyir16ins_mxn1" );
//DebugSession::addToTrace( getCell(), "dpt_ishifter_muxoutput_132" );
// Test signals from <MIPS> (R3000,pipeline).
//DebugSession::addToTrace( getCell(), "nb(0)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_mux32_data_e_sm_sel0" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_lo_rw(16)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_hi_rw(27)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_data_e_sm(25)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_nul_s_eq_z_sd_nul_3" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_shift32_rshift_se_muxoutput(143)" );
//DebugSession::addToTrace( getCell(), "rsdnbr_sd(19)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_res_se(14)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_res_re(0)" );
//DebugSession::addToTrace( getCell(), "wreg_sw(1)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_shift32_rshift_se_msb" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_ct_mx2_x2_2_sig" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_mux32_s_mw_se_sel0" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_mux32_badr_sd_sel1" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_addsub32_carith_se_pi_3_21" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_dp_addsub32_carith_se_pi_4_26" );
//DebugSession::addToTrace( getCell(), "mips_r3000_1m_ct_cause_rx(1)" );
// Test signals from <MIPS> (R3000,pipeline+chip).
//DebugSession::addToTrace( getCell(), "mips_r3000_core.mips_r3000_1m_dp.banc.reada0" );
//DebugSession::addToTrace( getCell(), "mips_r3000_core.mips_r3000_1m_ct.i_ri(29)" );
//DebugSession::addToTrace( getCell(), "mips_r3000_core.mips_r3000_1m_ct.not_opcod_re(4)" );
//DebugSession::addToTrace( getCell(), "d_out_i(10)" );
//DebugSession::addToTrace( getCell(), "dout_e_i(0)" );
//DebugSession::addToTrace( getCell(), "dout_e_i(1)" );
//DebugSession::addToTrace( getCell(), "dout_e_i(2)" );
//DebugSession::addToTrace( getCell(), "i_ack_i" );
//DebugSession::addToTrace( getCell(), "mips_r3000_core.mips_r3000_1m_dp.data_rm(7)" );
// Test signals from <snx2013>.
//DebugSession::addToTrace( getCell(), "core.snx_inst.not_v_inc_out(9)" );
Session::open( this );
if (mode & KtLoadGlobalRouting) {
@ -804,6 +730,8 @@ namespace Kite {
KatabaticEngine::finalizeLayout();
ltrace(90) << "State: " << getState() << endl;
getCell()->setFlags( Cell::Routed );
ltraceout(90);
}