* Change: In CRL Core, replace duplicated libraries, even when performing
a Append/Prepend operation. Also correct a bug in library name
uniquification, event if it's no used. The policy in cas of duplicate
libraries is not completly clear for me, still.
* New: In Hurricane, in Graphics, add a new static method ::isHighDpi()
which returns true if the DPI is greater than 192. A "normal" screen
is typically 96dpi, we sets the trigger at twice that value.
Then in all the widgets with size settings, we uses that method to
select the more appropriate size.
* New: In Kite, in BuildPowerRails more accurate GCell density computation
under the pad area, to limit the overloaded messages.
* New: In Cumulus, In BlockCorona, remove the vertical METAL3 blockages
and replace them by horizontal blockages completly enclosing the
corona big vias in all layers. This way the I/O wires that goes
through the corona are guided to be straight and do not creates
unsolvable doglegs due to the presence of big vias.
* Change: In Kite & Etesian, small typo: refactor the method
"::wipeOutRouting()" into "::wipeoutRouting()" (indulge me, I'm a
code maniac).
* Bug: In Hurricane, in PyHurricane.h the macro HCATCH was not catching
standard STL exceptions. This was the source of the cryptic message:
"Fatal Python error: Py_EndInterpreter: thread still has a frame"
The Python interpreter was interrupted uncleanly bypassing it's own
exceptions mechanism.
In PyViewer, the Viewer *do not* inherit from a base class (in the
Python export).
* New: In Hurricane, in DbU, compute maximum values (in double) for
grid, lambda & physical (in meter) so now the DbU::toGrid(),
DbU::toLambda() & DbU::toPhysical() methods can check for out of
bound values, and throw an exception.
* Change: In Hurricane, ExceptionWidget::catchAllWrapper() now returns
a boolean, set to <true> if an exception has been catched. Allow
callers to interrupt themselves if a problem has occured.
* Bug: In Kite & Etesian, in the Python wrapper, send a Python exception
if catchAllwrapper() did return true, instead of continuing...
* Change: In Kite & Etesian, adds a setViewer() method (exported in Python)
to use the graphical ExceptionWidget when in graphic mode.
* Bug: In Cumulus, in PadsCorona.py the check for the core vs. chip size
was not returning False when invalid.
* New: In CRL Core, in Vst driver, add a support IEEE VHDL. Inactive for
now as I don't see clearly the policy for selecting it or not.
Remove the code of the old Vst driver.
In Blif parser, check for non-existent models (incomplete or
corrupted Blif file). Found by G. Gouvine.
* New: Added extras file for IDE-like support under Emacs.
* New: In CRL Core, in VstParser, support IEEE VHDL, with tokens
<library> and <use>. If "use IEEE.std_logic_1164.ALL" is present
the file will be considered to be IEEE compliant.
To be precise, the parser now support any mix between Alliance
and IEEE VHDL. So you can have both <std_logic> and <wor_bit>
in the same file, but it is unclean to do that.
The two extensions ".vhd" & ".vhdl" are supported.
The drivers still always creates Alliance VHDL.
* New: In CRL Core, created a LibraryManager widget. It provides a
composite information based on what is present, for each
Alliance library:
1. - A Cell in memory, without Catalog::State.
2. - A Catalog::State, with or whithout the Cell in memory.
3. - The files of the Cell in the librariy's directory.
4. - A file with a format referenced for one of the importers.
File type recognition is based *only* on the file extension,
so it may easily confused. Be careful about what you put in
the library's directory.
One of the big limitation is that it will not display Hurricane
libraries that do not have the AllianceLibrary extension.
This widget is put in a separate library <libmanager>, included
in the default CRLCORE_LIBRARIES.
* Change: In CRL Core, in State (through the loader), now sets the
InMemory flag (event if nobody uses it yet...). Display it in
the state _getString().
In AllianceFramework, new getAllianceLibraries() method.
In CatalogExtension, make the static method "get()" publicly
accessible, for sometimes we want the whole State.
* Bug: In vlsisapd, in Path, the pathcache was not rebuild when it
should, leading to incorrect results.
* New: In vlsisapd, in Path, added a listdir() method to access the
contents of a directory and a stat() method to poll the status
of a file/directory.
Rename the ".string()" method in ".toString()" to avoid
tricky name resolution with std::string, refactor in all the
other tools.
* Change: In Hurricane, in Controller, no longer oversize the fonts
of the table's headers.
* New: In Unicorn, in UnicornGui, integrate LibraryManager.
* Error messages are more explicit in Ap and Blif parsers
* Warns when not using tie cells
* New layer synonym in ApParser for easier format conversion
* Blif import is now on top
* Bug: In Hurricane, in NetAlias, bad Record construction of the _next
field.
* New: In CRL Core, in VstDriver complete replacement of the old Vst
driver. Needed cleaner architecture to manage correctly files
importeds through the Blif parser, which are Verilog like.
It is build as an extension trough property and is not kept
in sync with the Cell. So it's use should be transient only.
* Change: In CRL Core, in NamingScheme forgot to change '.' (dot)
forbidden character into '_'.
* Change: In Cumulus, in the RSave plugins, remove the VHDL extensions
after saving.
* New: In Hurricane, In NetAlias & Net, add an AliasList collection to
iterate over all the aliases names (this *not* include the main
net name).
* New: In Hurricane, In Cell, Instance & Net add support for cloning and
uniquification (update documentation).
All Cells that are uniquified from a given model are kept in an
Uniquify relation. This relation allows to get all the clones and
generate unique clone names by adding a "_uXX" suffix.
* Bug: In Hurricane, the Cell::_isFlattenLeaf attribute was not initialized
in the constructor.
* Change: In CRL Core, in AllianceFramework::getCell(), no longer destroy
a partially loaded Cell in case of parser failure, let the incomplete
Cell be.
* New: In CRL Core, in ApParser, if all the instances are placed, sets the
Cell::Placed flag.
* Change: In CRL Core, in BlifParser, complete rewrite of the parser.
Not so good an idea afterwards...
* New: In Etesian, uniquify the design before placing.
* Change: In Kite, display the list of unrouted wired after all other
statistics.
* New: In Hurricane, In Cell, add Placed and Routed flags to know the
state of the Cell.
* Change: In CRL Core, In ApDriver, do not save the RoutingPads as
external connectors if the design is *not* routed (create
conflics on reload with the newly generated RoutingPads).
* Change: In Etesian, set the Placed flag on the Cell.
* Change: In Kite, set the Routed flag on the Cell.
* Change: In Cumulus, in RSavePluginAll, save the layout only if it
has a bounding box.
* New: In Hurricane, In Net & Cell, support for Net aliases names.
Use a structure based on a simple ring of NetAliasHook. The Net
holds a global map, sorted by names of all the aliases of all Nets.
Elements NetAliasesHook of the map are slaves of ring whose master
is an attribute of the Net (it is *not* in the map, as the primary
name of the Net).
In case of merge, the aliases of both Nets are merged and the
name of the merged one become an alias.
The Cell::getNet() looks in both the Net map and the aliases to
find a Net by name.
* Bug: In CRL Core, in coriolisInit.py, reoder the loading of the
configuration files so the real technology is read as early as
possible to set up the <gridsPerLambda> factor before any lambda
is actually computed...
* Bug: In CRL Core, in AcmSigda, do not try to fed the file when it
has failed to be opened. Throw a clean exception instead.
* New: In CRL Core, in Toolbox, add a NamingScheme object to convert
a design into VHDL compliant names (mainly from Blif/Verilog).
This is extensible in any case.
* New: In CRL Core, in BlifParser, slightly more informative warning
messages. Align the loading progress information on the other
parsers.
Add a capability to select which component of the design will
be returned, if there are more than one. Use the "." as separator.
For exemple you can request "Processor.Alu", which will load
the "Alu" component from the design in "Processor.blif".
To be able to save a Blif loaded design, systematically convert
all the name for VHDL compliance, as it is the format used by
the Coriolis native files (vst).
Export the Blif parser to the Python interface.
* New: In Kite, In NegociateWindow, add a counter of the number of
remaining events. Gives an idea of the ETA...
* New: In Unicorn, in cgt.by, add an option to load a Blif design from
the command line.
* New: In Cumulus, new RSave plugin to save both netlist & layout.
Partly redundant with the previous one. Have to better organize
that later.
* Change: In CRL Core, simplify the loading sequence. The technology,
both symbolic and real is now loaded directly from coriolisInit.py
and not through the Alliance loader. This was a leftover from the
time configuration was in XML. Remove others traces of XML loading.
Remove SYMB_TECHNO_NAME, REAL_TECHNO_NAME & DISPLAY from the Alliance
environement, as they was no longer used.
Note that technology *still* need to be loader *after* Alliance
framework has been initialized.
Gauge information is moved from <alliance.conf> to <kite.conf>.
* Bug: In Coloquinte, in optimization_subproblems.cxx static variables
must not be inlined. Generate a problem when linking in debug mode
(seems the symbol gets optimised out).
* Bug: In Katabatic, in Grid::getGCell(), when the coordinate is *outside*
the area, do not try to find a GCell, directly return NULL.
* New: In Unicorn, create a generic command launcher named "coriolis" which
automatically take cares of all environement setup, then run a command
by default, it's <cgt>, but it can be anything. For example: <zsh>.
* Change: coriolis2.spec.in, Makefile.package and Builder/ccb now support
RHEL6, RHEL7 & Fedora.
* Change: In Bootstrap, added a flag to activate compilation with
openmp.
* New: In CRL Core, remove obsoleted XML files, no longer needed by
Chams. Add stub for technologies CMOS065 (ST) and C35B4, aka
AMS 035.
* Bug: In Knik, update the path where to find the FLUTE lookup tables.
(from 2.4 to 3.1).
* Change: In documentation UserGuide, under RHEL7 documents generated
with pdflatex tends to make evince core-dump while trying to print.
So use latex+dvipdfm instead. Images then needs to be pdf with an
auxiliary .bb file (the BoundingBox line extracted from the .eps).
* Bug: In Hurricane, In CellViewer, pass by a temporary pixmap when
shitfing right (and bottom). We were already using the AutoCopy
buffer for the opposites moves... Seems that the drawPixmap()
may have changed of implementation.
Explanation of the diagonal lines, see QTBUG-31579 that affect
Qt 4.8.5. Temporary work around, force the pen to have a width
of 2 pixels (for _normalPen & _linePen).
* Change: In Hurricane, in CellViewer remove the redraw by whole
strip mechanism (offsetVA).
* New: In Hurricane, In CellViewer::DrawingPLanes add a tracking of
the brush offset to avoid small irregularities at the border of
two separately drawed areas.
* Bug: In Hurricane, in Graphics, display a warning about the
diagonal lines when using Qt 4.8.5.
Jean-Paul Chaput
Gabriel Gouvine