Targets "esp32c2" and "esp32c3" should not be mentioned in the doc
under "target types" because these are not standalone OpenOCD
targets.
They are merely a set of .cfg files which use the generic
"riscv" target.
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Add a new riscv specific commands to disable triggers
Change-Id: Ic1842085aa66851c740e0abcbfbe0adbe930920e
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Extend riscv set_ebreak* commands.
Now it can be called without args to print current value.
riscv_ebreak* flags are moved to riscv_info struct.
Change-Id: Ib46e6b6dfc0117599c7f6715c7aaf113e63bd7dc
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
add refresh command for lattice devices
rename gowin reprogram to refresh
rename virtex2 program to refresh
Change-Id: I9da83a614b96da3e947ac4608b0a291b1d126914
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7839
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Jtagspi is using a proxy bitstream to "connect" JTAG to the
SPI pins. This is not possible with all FPGA vendors/families.
In this cases a dedicated procedure is needed to establish such
a connection.
This patch adds a jtagspi-mode for these cases. It also adds the
needed interfaces to jtagspi and the pld-driver so the driver
can select the mode and provide the necessary procedures.
For the cases where a proxy bitstream is needed, the pld driver
will select the mode and provide instruction code needed in this
case.
Change-Id: I9563f26739589157b39a3664a73d91152cd13f77
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7822
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added NPCX flash driver to support the Nuvoton NPCX4/K3 series
microcontrollers. Add config file for these series.
Change-Id: I0b6e128fa51146b561f422e23a98260594b1f138
Signed-off-by: Luca Hung <YCHUNG0@nuvoton.com>
Signed-off-by: Mulin CHao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7794
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Enumerator's case were not specified in the coding style.
Add enumerators together with macros for upper-case preference.
While there, add the word CamelCase beside the less common, but
already used, MixedCaps. This could help linking this chapter to
the output of checkpatch script.
Change-Id: I6d4af06cc6f4bc46f525e99e9a74ecc167606c49
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7875
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
add new i2c bit-banging feature, we can now connect in JTAG with the SoC
target and in i2c with the main board components at the same time.
Change-Id: I8e4516fe1ad5238e0373444f1c3c9bc0814d0f52
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7796
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This emulation mode supports software translation of an AP request
into an address mapped transaction that does not rely on physical AP
hardware. This is necessary in some hardware such as K3 SoCs since the
hardware architecture anticipates a potential race condition between
AP doing direct memory access generating transactions back to system
bus and firewalls that data path out.
This emulation mode allows direct memory driver to emulate CoreSight
Access Port (AP) and reuse the SoC configuration meant for JTAG
debuggers.
Since the address ranges are flat in nature, the requisite memory base
and size will need to be provided a-priori to the driver for mapping.
The other design alternative would be to map requested memory map for
every register operation, but, that would defeat our intent of getting
max debug performance.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jason Peck <jpeck@ti.com>
Change-Id: I2d3c5f7833f1973e90b4f6b247827f62fc2905d0
Reviewed-on: https://review.openocd.org/c/openocd/+/7089
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Direct memory driver support for CoreSight Access Port(AP).
Even though we emulate SWD (serial wire debug), we aren't actually
using swd. Instead, we are using a direct memory access to get to the
register set. This is similar in approach to other fast access native
drivers such as am335xgpio drivers.
Example operation on Texas Instrument's AM62x K3 SoC:
+-----------+
| OpenOCD | SoC mem map
| on |--------------+
| Cortex-A53| |
+-----------+ |
|
+-----------+ +-----v-----+
|Cortex-M4F |<───────| |
+-----------+ | |
| DebugSS |
+-----------+ | |
|Cortex-M4F |<───────| |
+-----------+ +-----------+
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jason Peck <jpeck@ti.com>
Change-Id: I8470cb15348863dd844b2c0e3f63a9063cb032c6
Reviewed-on: https://review.openocd.org/c/openocd/+/7088
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This is the driver code for NanoXplore's ANGIE USB-JTAG Adapter.
The driver is based on the openULINK project.
This driver communicate with ANGIE's firmware in order to establish
JTAG protocol to debug the target chip.
Since the ANGIE Adapter has a Spartan-6 FPGA in addition to the
FX2 microcontroller, the driver adds two functions, one to download
the firmware (embedded C) to the FX2, and the second to program
the FPGA with its bitstream.
Add ANGIE's configuration file to tcl/interface/
Add the device VID/PID to 60-openocd.rules file.
Add ANGIE to OpenOCD's documentation
Change-Id: Id17111c74073da01450d43d466e11b0cc086691f
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7702
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This is ANGIE's firmware and bitstream code.
The 'Embeded C' code is based on the openULINK project.
The hdl bitstream source code is for the spartan-6 FPGA included in
ANGIE.
Since ANGIE has a different microcontroller (EZ-USB FX2) than openULINK
(EZ-USB AN2131), the registers file (reg_ezusb.h) has been changed
completely, so are the descriptors, interruptions and the endpoints
configuration.
Change-Id: I70590c7c58bac6f1939c5ffba57e87d86850664d
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7701
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
1. update RISCV_MAX_HARTS to 2^20 according to SPEC
2. remove RISCV_MAX_REGISTERS, it's not used anywhere anymore
3. add parentheses
Change-Id: Iadf0fa1ba3bbe5b9420b8430883e140db87f4f9e
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
STLINK-V3PWR is both a standalone debugger probe compatible with
STLINK-V3 and a source measurement unit (SMU).
Link: http://www.st.com/stlink-v3pwr
This code adds support for the debugger probe functionality.
Change-Id: Ib056e55722528f922c5574bb6fbf77e2f2b2b0c1
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7755
Tested-by: jenkins
To start a ipdbg server one needs to know the tap and the
instruction code to reach the IPDBG-Hub. This instruction is
vendor/family specific. Knowledge which can be provided by the
pld driver.
Change-Id: I13eeb9fee895d65cd48544da4704fcc9b528b869
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7369
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior
Change-Id: I469453d95e7c1640a91bc60d80c854404e508535
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
This patch adds support for the NXP QN908x family of Bluetooth
microcontrollers, such as the QN9080. This chip features a Cortex-M4F
with 512 KiB of flash on all the available versions, although the
documentation suggests that there might be 256 kB versions as well.
The initial support allows to read, erase and write the whole user flash
area. Three new sub-commands under the new "qn908x" command are added
in this patch as well: disable_wdog to disabled the watchdog,
mass_erase to perform a mass erase and allow_brick to allow programming
images that disable the SWD interface.
Disabling the watchdog is required after a "reset halt" in order to run
the CRC algorithm from RAM when verifying the chip. However, this is not
done automatically on probing or other initialization since disabling
the watchdog might interfere with debugging real applications.
The "mass_erase" command allows to erase the whole flash without
probing it, since in some scenarios the chip can be locked such that no
flash or ram can be accessed from the SWD interface, allowing only to
run a mass_erase to be able to flash the program.
The flashing process allows to compute a checksum, similar to the
lpc2000 driver "calc_checksum" but done over a different region of the
memory. This checksum is required to be present for the QN908x
bootloader ROM to boot, and otherwise is useless. As with the lpc2000
design, verification when using "calc_checksum" is expected to fail if
the checksum was not valid in the image being verified.
This was manually tested on a QN9080, including the scan-view,
AddressSanitizer/UBSan and test coverage configurations.
Change-Id: Ibd6d8f3608654294795085fcaaffb448b77cc58b
Co-developed-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: iosabi <iosabi@protonmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5584
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The bcm2835gpio driver preferred /dev/gpiomem for access to
memory mapped GPIO control and used /dev/mem as a fallback
only if it couldn't open /dev/gpiomem.
/dev/mem usually requires elevated rights or specific capabilities
of the opening process, so the fallback failed anyway.
Although /dev/gpiomem is the strongly preferred option with respect
to security, there could be also use cases which require /dev/mem
even if /dev/gpiomem is available (e.g. changing the GPIO pad
settings is necessary or testing/debugging OpenOCD).
It was difficult to handle such cases because they required
to block globally the system device /dev/gpiomem
(remove, rename or chmod).
Drop the fallback feature and select the memory device
by 'bcm2835gpio peripheral_mem_dev' configuration command.
Use /dev/gpiomem as a default.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I60e427bda795d7a13d55d61443590dd31d694832
Reviewed-on: https://review.openocd.org/c/openocd/+/7350
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
The pads were configured at a wrong memory address
if /dev/gpiomem was mapped.
The pad setting registers are not accessible in mapped /dev/gpiomem,
disable the pads setting if the driver doesn't open /dev/mem.
While on it, do not fail the driver initialization if pad mapping fails
- just emit a warning and work with unchanged pad setting.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I0bce76cade8f7efd75efd9087a7d9ba6511a6239
Reviewed-on: https://review.openocd.org/c/openocd/+/7684
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tim Newsome
Jan Matyas
Kirill Radkin
Daniel Anselmi
Luca Hung
Antonio Borneo
Evgeniy Naydanov
Ahmed BOUDJELIDA
Jason Peck
Nishanth Menon
Parshintsev Anatoly
Mark Zhuang
Laurent LEMELE
iosabi
Erhan Kurubas
Tomas Vanek