This allows to merge the implementation in `batch.c` with the one in
`riscv-013.c`.
Change-Id: Ic3821a9ce2d75a7c6e618074679595ddefb14cfc
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
The logic in `init_registers()` was quite convoluted.
Initialization of each `struct reg` field is separated into function
`gdb_regno_<field_name>()`.
IMHO, this makes it much easier to reason about the code.
Change-Id: Id7faa1464ce026cc5025585d0a6a95a01fb39cee
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
find members of a union, nested in struct.
Allows file to be compiled with GCC 4.0
Signed-off-by: Sevan Janiyan <venture37@geeklan.co.uk>
Change-Id: Ied68668d3b5f811573a20e11e83aceff268963eb
Reviewed-on: https://review.openocd.org/c/openocd/+/8120
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add more debug messages connected with triggers.
Update names for internal flags to make them more clarified.
Change-Id: I5642346ce4a1e9bf79b22cdbf36bd757a7beffa8
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Fixes:
- Data types of address & data parameters in riscv_batch_add_*()
and riscv*_fill_dm*() changed to uint64_t and uint32_t.
- Corrected the comparison in riscv_batch_full().
- Corrected assertions in riscv_batch_get_dmi_read_op()
and riscv_batch_get_dmi_read_data().
Cleanup:
- Simplified calloc() fail handling in riscv_batch_alloc().
- Added explicit NULL assignments in riscv_batch_alloc()
for clarity and readability. Don't rely on calloc().
- Removed suffix `_u64` from riscv_*_fill_dm*() since it
does not have any meaning.
- Renamed *dmi_write_u64_bits() to *get_dmi_scan_length()
which better describes its purpose.
Change-Id: Id70e5968528d64b2ee5476f1c00e08459a1e291d
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
If targets are in a halt group, and a target in the group reaches a
breakpoint, the target's state was able to remain `TARGET_RUNNING`.
Addresses issue #1010
Change-Id: I734bc6da71d289c4d05b417c8bf67a7d1a56574f
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
The function in question does not need to change target state. It is a
target-type-dependant function, however, IMHO, it is safe to assume that
any target type would not need to change type-independant state of a
target to figure out the arch.
Change-Id: I607cb3aee6529cd5a97bc1200a0226cf6ef43caf
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8093
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This reverts commits 2e920a212f and
8dbb1250f5.
The reason is, after `openocd_is_shutdown_pending()` becomes true,
arbitrary command may be executed:
* In `target_destroy()` and the corresponding
`target->type->deinit_target()`.
* In user-specifyed `pre_shutdown_commands` list.
Change-Id: Icd00d1d954cd45e255880a6f76c3a74c098d6a17
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
The reason for the change is a conflict: `dcsr[5]` is `dcsr.v` in
current spec, but it is `dcsr.debugint` in 0.11. This causes `priv`
register to be read incorrectly.
Change-Id: If2d8fdcd8536afa4c7149c453101b00ce0df1ce0
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
There was an error in `dm_read`/`dm_write`: DMI address was checked
against DM registers disregarding DM base address.
To solve the issue `dmi_address()` function was introduced.
Change-Id: Ia3be619417b5f5b53db5dfe302db05170d6787c9
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
The motivalion for the change:
* `riscv_hart_count()` is used only once to print the value into the log
during exmination.
* The returned value is a bit confusing: it's not the total number of
targets on the TAP. It is the number of targets accessable through the
same DM. So the name of the function is misleading.
* This value is already reported on `-d3` level.
So the function seems redundant and can be safely removed.
Change-Id: Iac9021af59ba8dba2cfb6b9dd15eebc98fe42a08
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
In loops that typically take longer time to complete, check if there is
a pending shutdown request. If so, terminate the loop.
This allows to respond to a signal requesting a shutdown during some
loops which do not return control to main OpenOCD loop.
Change-Id: Iace0b58eddde1237832d0f9333a7c7b930565674
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Now it returns `resource not available`
Change-Id: Ifbbd468bdf62023850690eb96fe8a16f4114e915
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Compilers are good at optimizing, and with functions it's abundantly
clear what all the types involved are. This change means we don't have
to be super careful about the type of values because of what the macro
might do to them that might cause overflow.
The only place where the return type matters is in printf-style
functions, and I made get_value32() for those cases where a change was
needed.
This should set the stage for simply copying the latest debug_defines.h
from the debug spec build again.
Change-Id: I5fb19d0cfc1e20137832a7b344b05db215ce00e1
Signed-off-by: Tim Newsome <tim@sifive.com>
By definition in `target/target.h`, `coreid` is not a unique identifier
of a target -- it can be the same for targets on different TAPs.
Change-Id: Ifce78da55fffe28dd8b6b06ecae7d8c4e305c0a2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This patch replaces ~(typeof(watchpoint->mask))0 with
WATCHPOINT_IGNORE_DATA_VALUE_MASK. This improves
readability and moves the RISCV target in line with
other targets.
Change-Id: I15ac4d4ee76098b304d9b22f720911ba4329c190
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Depending on configuration, the existing implementation of watchpoints is
rather inefficient for certain scenarios. Consider HW that:
1. triggers 0-3 can be used as instruction breakpoints
2. triggers 4-7 can be used as data breakpoints (watchpoints)
3. NAPOT triggers are not supported.
Now, consider that we have a pending watchpoint. And we perform a "step"
operation. According to the current implementation:
* OpenOCD will disable watchpoints
* Perform a single-step
* Will try to restore the original watchpoints. It will need 12 attempts
to find a suitable trigger: (8 attempts to try NAPOT, and another 4 to try
GE+LE).
This patch introduces a dedicated cache for requests to triggers. It
significantly speeds things up, since we cache failed attempts and no
additional interactions with HW is necessary.
Change-Id: Ic272895eaa763a7ae84d14f7633790afd015ca9d
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
Otherwise it won't compile for me. Not sure why that doesn't affect the
automated builds.
Change-Id: Ic66c743e1698c4c0772e5601723cb5c711b4fa5c
Signed-off-by: Tim Newsome <tim@sifive.com>
Since DPC is WARL (same rules as MEPC according to
the specification), it is possible that
writes to it won't result in the exact value present.
Therefore, writes to it shouldn't be cached, same as
with other WARL registers.
Change-Id: I818c0cef9727b999b7d84b19f9f42cd706c99d69
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Added the ability to enter dimensionless registers
Change-Id: I1b781959ce4690ec65304142bd9a7c6f540b3e86
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
Now:
1) If mmu is disabled, virt2phys succeeded and returns physical address
2) If mmu is enbaled, but translation fails, read/write_memory fails
Change-Id: I312309c660239014b3278cb77cadc5618de8e4de
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Evgeniy Naydanov
Evgeniy Naydanov
Sevan Janiyan
Kirill Radkin
Jan Matyas
Jan Matyas
Parshintsev Anatoly
Tim Newsome
Marek Vrbka
Anastasiya Chernikova
liangzhen