Commit Graph

2274 Commits

Author SHA1 Message Date
Andreas Fritiofson 2d73fd8686 target: Don't poll until the target is examined.
The timer callback is started on target init, but it makes no sense to
poll until the target is fully setup.

Change-Id: I118201e125e39be3d0a920e3ef9a3f68a2035f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2041
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-17 12:46:14 +00:00
Andreas Fritiofson 17fddb4289 stlink: Use callback to increase frequency of trace data sampling
The ST-LINK/V2 has limited internal buffering, such that trace data
can be missed if the target is generating data at a rate quicker than
the OpenOCD trace sampling. The issue of lost data is compounded since
individual TPIU packets may be split across individual STLINK_TRACE_EP
reads, and misleading results can occur if mid-packet loss occurs.

This patch increases the frequency of checking for pending trace data
with the aim of minimising such losses. Note: With the limited (I/O
and memory) bandwidth of the ST-LINK/V2 there cannot, however, be a
guarantee against trace data loss.

The timer callback is only added when enabling tracing, and is removed
when tracing is disabled.

Change-Id: Ibde9794b77793d3068f88cb5c1a26f9ceadcbd8a
Signed-off-by: James G. Smith <jsmith@ecoscentric.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1661
Tested-by: jenkins
2014-03-07 21:19:12 +00:00
Kamal Dasu 7e1dfcbe2d cortex_a: Fix endianess issues in cortex_a8_*_apb_ab_memory
Make the APB-AB memory read routines handle endianess order
when running on big endian host. cortex_a8_read_apb_ab_memory
is also called by cortex_a8_write_apb_ab_memory and was breaking
both APB-AB read and write functions. Also fixed bug in write
function in calculating the offset of end of buffer data. The
change aslo fixes the read issues with all combinations of
aligned unaligned memory access found by 'test_mem_access' cmd.

Tested with target "test_mem_access 4000", also size 1-9,
'mdb/h/w' 'mwb/h/w' cmds and equivalent gdb 'x' 'set' cmds.

Change-Id: Ia927c60c4837617f5342a9beb6fdab1f061855fe
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1781
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2014-03-07 18:53:35 +00:00
Paul Fertser 42881f95ce target: add CoreSight PMU and an unidentified component to "dap info"
Change-Id: I705eae46b190dbd89ab01bc086c49eb04368d9b3
Reported-by: Brad Riensche <brad.riensche@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1928
Tested-by: jenkins
Reviewed-by: Brad Riensche <brad.riensche@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-03-07 18:50:55 +00:00
Brad Riensche 77aecd5376 target: "dap info" command cosmetic output changes
This makes the listing easier to read, imho. The tab indentation
technique causes the base address to precess as the parser proceeds
through the subtables, and can easily wrap.

Change-Id: Iea5e678255e6314a9d532e4b222a2572b5394390
Signed-off-by: Brad Riensche <brad.riensche@gmail.com>
Reviewed-on: http://openocd.zylin.com/1518
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-03-07 18:50:35 +00:00
Chris Johns 623eb336cf targets: Print nested ROM tables with the 'dap info' command.
Move the ROM table printing into a separate function to allow
recursive calls with nested tables. ROM tables can nest. The
printing is limited to 16 levels.

Update the types of tables printed. When an entry can't be read, print
a warning and continue.

Change-Id: Ib134edd9e987af2f5f606071521885b17af4d70f
Signed-off-by: Chris Johns <chrisj@rtems.org>
Reviewed-on: http://openocd.zylin.com/1427
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-03-07 18:47:29 +00:00
Christian Eggers 9b2577742c Constify received GDB packet
v2:
- Split work into separate patches

The received packet will not be altered in any of the processing functions.
Some it can be made "const".

Change-Id: I7bb410224cf6daa74a6c494624176ccb9ae638ac
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Reviewed-on: http://openocd.zylin.com/1919
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-04 20:17:34 +00:00
Antony Pavlov bc1340cf0b mips32: build register cache in a more clear way
This commit is inspired by armv7m_build_reg_cache().

Change-Id: I62b51b2a5f0fed788af167b6f8e60c09b53181be
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1943
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-02-24 12:10:29 +00:00
Paul Fertser 6c74255ee2 arm926ejs: fix write memory operations with caches enabled
Perform proper ICache flush operations on memory writes. This should fix
inability to use software breakpoints for debugging with caches
enabled.

This patch is only compile-time tested.

Commit 1137eaedaf fixed the same issue
for arm920t. Among all the arm7_9_common targets only arm926ejs seems
to be broken in the same way.

Change-Id: I575306ac4319a69fc637b42f7c958f4595c5e81f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1912
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-11 13:38:39 +00:00
Adrian Burns 1338cf60b9 quark_x10xx: add new target quark_x10xx
Intel Quark X10xx SoC debug support added
Lakemont version 1 (LMT1) is the x86 core in Quark X10xx SoC
Generic x86 32-bit code is in x86_32_common.c/h

Change-Id: If2bf77275cd0277a82558cd9895b4c66155cf368
Signed-off-by: adrian.burns@intel.com
Reviewed-on: http://openocd.zylin.com/1829
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-11 13:07:29 +00:00
Paul Fertser ddef36905c cortex_a: do not try to use MMU for translation if it wasn't enabled on target stop
On a target where AHB AP memory access is unavailable, care should be
taken to avoid treating addresses as virtual if the MMU was disabled
at the time the target was stopped.

Without this it's impossible to peek memory with Gdb when debugging
e.g. a bootloader because cortex_a8_read_memory() unconditionally
tried (and failed because of a sanity check in cortex_a8_mmu_modify)
to enable MMU.

Change-Id: Id7c63f4912920fb71a6104226ec6428d18c96a56
Reported-by: mbm@openwrt.org
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1787
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-06 22:21:57 +00:00
Paul Fertser 279878ccd7 target/nds32_disassembler: fix format specifiers warnings
According to the standard every operation returns at least an integer,
so PRIu8 format specifier is not suitable for these values as is.

This breaks build on OS X (x86_64-apple-darwin13.0.0) with "Apple LLVM
version 5.0 (clang-500.2.79) (based on LLVM 3.3svn)".

Fix by adding appropriate casts. In fact there's plenty of room (and
I'd say necessity) for factoring out common code in there, but it's
too invasive for a non-maintainer.

Change-Id: I7d2182eb1d2f86fa22c882fbbaa6cfadf1c3e8fc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1878
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-02-04 21:18:27 +00:00
Spencer Oliver 47d4224d48 doc: add missing reg command argument 'force'
The argument 'force' enables a user to bypass the internal cache and read
a target register directly. However it is missing from the user guide.

Change-Id: I26f689eec20b38a0dc5294626b25df566b554446
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1897
Tested-by: jenkins
2014-02-04 20:53:49 +00:00
Paul Fertser 1137eaedaf arm920t: fix write memory operations with caches enabled
Commit ff5ec942d8 made this target
always use generic arm7_9 memory write routines for software
breakpoints which resulted in inability to debug and single-step
sources in Gdb when icache is active as generic routine doesn't
invalidate it. This should fix it (and is real-life tested against
Samsung S3C2442). I expect other arm7-9 targets to be affected as
well.

Change-Id: Id7980e370ae4db47ac6b1490321d81ffe85711c0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1817
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-24 12:48:43 +00:00
Luca BRUNO 2efb1f14f6 Add GDB remote target description support for ARM4
This commit adds support for passing the ARM4 target description to GDB
when enabling gdb_target_description, in order to expose all banked
registers.

Change-Id: Id618bc6226f00fe83397ea28888a84b64b09cafd
Signed-off-by: Luca BRUNO <lucab@debian.org>
Reviewed-on: http://openocd.zylin.com/1810
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-23 21:39:13 +00:00
Andreas Fritiofson 63fa73169b Retire jtag_add_dr_out
The out only version of jtag_add_dr_scan smells like a bogus optimization
that complicates the minidriver API for questionable gain.

The function was only used by four old ARM targets. Rewrite the callers
to use the generic function and remove all implementations.

Change-Id: I13b643687ee8ed6bc9b6336e7096c34f40ea96af
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1801
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-20 13:28:26 +00:00
Spencer Oliver 009f5c2af0 target: fix typos
Change-Id: Icdb517224e8bcf41a16498088e09955048077d35
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1864
Tested-by: jenkins
Reviewed-by: Bill Traynor <btraynor@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-19 19:26:12 +00:00
Spencer Oliver c46dd490d1 cortexm: use Cortex-M rather than cortex-m3 for dwt registers
Change-Id: I28e3a8c65ccc4a4e3ec94e41c846e6a263c165e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1865
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-19 19:24:34 +00:00
Hsiangkai Wang 94d64ccaeb Conform to C99 integer types format specifiers
Review and modify to conform to C99 integer types format specifiers.
Use arm-none-eabi toolchain to build successfully.

Change-Id: If855072a8f88886809309155ac6d031dcfcbc4b2
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Signed-off-by: Hsiangkai <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1794
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-15 12:40:42 +00:00
Andreas Fritiofson 178b5d072e cortex_m: Avoid unnecessary saving and restoring of DCRDR
This is used for the emulated DCC channel which is only maintained as long
as target->dbg_msg_enabled is set. Skip the saving and restoring if not
enabled to save one dap_run() per core register access.

Note that we could've probably queued all core register accesses in the
same transaction if the armv7 register framework hadn't required
synchronous register accesses.

Change-Id: I4fe6d713261ee5db42422203eb63035fdcc48891
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1848
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-11 22:22:25 +00:00
Andreas Fritiofson bd0fbef5c8 adi_v5: Remove unnecessary MEM-AP access functions
It's far nicer to pass a size parameter than to split the calls to
separate wrappers which are combined to a single function anyway.

Change-Id: I716741ebf916f6f8e9358a31c8f4fe761107c82f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1847
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-11 22:22:18 +00:00
Andreas Fritiofson 6647131ff5 cortex_m: Fix possible endianness problem in emulated DCC channel
Change-Id: If7104464a8c65085f3ceac445e9c9be8446f2da9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1846
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-11 22:21:35 +00:00
Andreas Fritiofson e65817653f target: Add test bench for memory access functions
Change-Id: I86e6fe4d0b4d580389ae5e1d3f4813d1e25b2613
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1629
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-11 22:21:04 +00:00
Spencer Oliver 4dc8cd201c cmsis-dap: add initial cmsis-dap support
This is based on work from:
https://github.com/TheShed/OpenOCD-CMSIS-DAP/tree/cmsis-dap

Main changes include moving over to using HIDAPI rather than libusb-1.0
and cleaning up to merge into master. Support for reset using srst has
also been added.

It has been tested on all the mbed boards as well as the Freedom board
from Freescale. These boards only implement SWD mode, however JTAG mode
has been tested with a Keil ULINK2 and a stm32 target - but requires a lot
more work.

Change-Id: I96d5ee1993bc9c0526219ab754c5aad3b55d812d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1542
Tested-by: jenkins
2014-01-09 15:20:51 +00:00
Franck Jullien f4947e8b88 target/image: allow for comments in IHEX files
This is not in the Intel hex file format specification but
some hex files may include comments (i.e. Altera USB-Blaster II
firmware) starting with '#'.

This patch makes image_ihex_buffer_complete_inner to skip
comment lines.

Change-Id: Id1f57d84d75da45e592f1c72b2b8c29193bc14e3
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1842
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-30 15:49:15 +00:00
Per Ekman 624e74ec40 kinetis : Add timeouts to flash status checking in dap_syssec_kinetis_mdmap().
Change-Id: Ifc8fe7aa4c2a40a78fa0655435e82418f549bad3
Signed-off-by: Per Ekman <pekenator@gmail.com>
Reviewed-on: http://openocd.zylin.com/1819
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-22 20:25:10 +00:00
Sergio Chico 93a3a82e49 topic: Support for the Xilinx BSCAN_* Virtual JTAG in Openrisc
This add support to the Xilinx BSCAN_* virtual JTAG interface.
This is the Xilinx equivalent of the Altera sld_virtual_jtag interface,
it allows a user to connect to the debug unit through the main
FPGA JTAG connection.

Change-Id: Ia438e910650cff9cbc8f810b719fc1d5de5a8188
Signed-off-by: Sergio Chico <sergio.chico@gmail.com>
Reviewed-on: http://openocd.zylin.com/1806
Tested-by: jenkins
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-14 21:53:16 +00:00
Dongxue Zhang 4516eebaba [PATCH 1/2]support64: Add functions into types and target
Add functions into types.h, target.c, target.h to operate 64bits data.
Prepare for 64bits mips target.

Change-Id: I668a8a5ac12ba754ae310fa6e92cfc91af850b1c
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Reviewed-on: http://openocd.zylin.com/1700
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-12-01 12:39:36 +00:00
Per Ekman 88e9d0f408 kinetis : Fix broken check for mass erase.
If the flash is not ready (MDM_STAT_FREADY is 0) then
dap_syssec_kinetis_mdmap() would act as if the MDM_STAT_SYSSEC bit was
set and erase the flash. Wait until MDM_STAT_FREADY is set before
checking the MDM_STAT_SYSSEC bit.

Change-Id: I5c3352f625599016625ed9be8787033f49bfacea
Signed-off-by: Per Ekman <pekenator@gmail.com>
Reviewed-on: http://openocd.zylin.com/1762
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-11-08 15:09:00 +00:00
Mathias K 1e6970dafd hla: Make consistent parameter naming
Rename fd to handle.

Change-Id: I98615aed1546976d00b0f20856d4e8e75f83c575
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1761
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-11-07 22:19:50 +00:00
Spencer Oliver edfb677d34 target: use target_buffer_set_u32_array
Attempt to use target_buffer_set_u32_array to convert to target endian
arrays rather reimplementing code.

This also removed cfi_fix_code_endian as its functionality is also
repeated.

Change-Id: I7c359dbe46ea791cd5f6fb18d8b0fb6895c599d3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1783
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-11-07 21:38:49 +00:00
Mathias K a3c0f05461 target: fix mem2array/array2mem
if data size is bigger than transfer buffer, all portions are
 transferred from/to the same target address - address advance
 after successful transmission missed.

Change-Id: I79a6c388af197ac062d2807e397a2d7947400520
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1679
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
2013-10-31 21:11:48 +00:00
Andreas Fritiofson 4f6f065201 smp: Fix byte order bug
Found by grepping for pointer casts.

Also rewrite to reduce scope and allocate the few bytes needed on stack
instead of on heap.

Change-Id: Ia2a369fb612e807b981ee60ebcfd9c09c2fbdf4c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1779
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31 20:45:55 +00:00
Andreas Fritiofson 13f6c889ab Remove unnecessary (void *)
When pointer casts are needed, cast directly to the correct type, instead
of going via void*.

Don't explicitly cast to void* if it would have been done implicitly.

Change-Id: I4093209200051c5eb62847d00a4b9c8567480068
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1669
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31 20:42:47 +00:00
Andreas Fritiofson 517ba0690d Clean up const usage to avoid excessive casting
Don't use const on pointers that hold heap allocated data, because that
means functions that free them must cast away the const.

Do use const on pointer parameters or fields that needn't be modified.

Remove pointer casts that are no longer needed after fixing the constness.

Change-Id: I5d206f5019982fd1950bc6d6d07b6062dc24e886
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1668
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31 20:42:34 +00:00
Paul Fertser f132fcf636 Clean up many C99 integer types format specifiers
This eliminates most of the warnings reported when building for
arm-none-eabi (newlib).

Hsiangkai, there're many similar warnings left in your nds32 files, I
didn't have the nerve to clean them all, probably you could pick it
up.

Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31 20:40:03 +00:00
Spencer Oliver 3b3e3f67c1 cortex_m: set fpb_enabled on enabling fpb
If the fpb_enabled is not set then as part of cortex_m3_set_breakpoint we
enable the fpb, however we do not signal the fpb as being enabled.

This issue only effects the hla target as the current cortex_m code enables
the fpb during cortex_m3_endreset_event.

Change-Id: I44d3fc65916c131b7a226869dd16aed5afb441b4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1634
Tested-by: jenkins
2013-10-29 22:55:04 +00:00
Andreas Fritiofson 6ef28babe3 nds32: Remove unused declaration
Change-Id: Ie0df720b2adacc8f10474f88f15142fa94c388b8
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1686
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-15 20:41:27 +00:00
Sergey A. Borshch 3da319e8b1 hla_target: Update target state when polling
Polling target does not change stste information
    except if new state is TARGET_HALTED.
    Connecting to the runing target result in target->state
    not updated with retrieved value and remains "UNKNOWN"
    until 'halt' command issued.

Change-Id: I803d6c0207f7f8699e648779d1df342c9ee7315a
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/1680
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-15 20:41:18 +00:00
Andreas Fritiofson ff5ec942d8 arm7_9: Avoid infinite loops in bulk write dispatching
Add a mandatory field in struct arm7_9_common for regular, non-optimized
memory writes. Together with the existing bulk_memory_write field, this
allows variants to select any combination of implementations for regular
and bulk writes, without risking infinite loops from accidentally using
bulk writes for implementing bulk writes.

ARM 7/9 targets may now select arm7_9_memory_write_opt as their
target.write_memory implementation, which will dispatch to
arm7_9_common.bulk_write_memory if possible, or fallback to
arm7_9_common.write_memory otherwise.

To avoid loops, bulk write implementations mustn't call any other
functions than arm7_9_write_memory_no_opt() to write memory; it will
unconditionally call arm7_9_common.write_memory. If they fail, they should
simply return error to allow the caller to fallback to regular writes.

Tested on a regular ARM7TDMI only.

Change-Id: Iae42a6e093e2df68c4823c927d757ae8f42ef388
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1685
Tested-by: jenkins
Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-15 20:41:08 +00:00
Franck Jullien 8e6e7948de openrisc/tap_vjtag: fix IR setting
Change-Id: I2b1f057dc9777ff263d6cefa4ff5958e85607a22
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1694
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-15 20:40:45 +00:00
Franck Jullien 49b7f68806 openrisc/du_adv: check or1k_adv_jtag_init return value
Change-Id: I784c16b8137b4269254c86007e6766b1a2297aa2
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1693
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-15 20:40:41 +00:00
Spencer Oliver 1c975fe30b cortex_m: target implementation renames cortex_m3 to cortex_m
We changed the actual target name quite a while ago.
This changes the actual target function names/defines to also match
this change.

Change-Id: I4f22fb107636db2279865b45350c9c776e608a75
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1626
Tested-by: jenkins
2013-10-10 20:51:03 +00:00
Andreas Fritiofson c8492ee2d4 cortex_m: Call mem_ap_read/write directly
Change-Id: I52e1d8babf7bf9fcde4094046d29b817c15c0562
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1659
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-02 21:54:20 +00:00
Andreas Fritiofson d3c6a071e6 arm_adi_v5: Rewrite MEM-AP transfer implementation
Create a single pair of relatively simple functions to handle all variants
of MEM-AP transfers. This replaces the many separate functions that
handled different access sizes and packed or non-packed transfers, which
were all implemented rather differently.

With this single implementation, performance should be more consistent,
regardless of transfer type.

Change-Id: I89960e437fc6ba68a389c074fab8eac91abcf844
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1658
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-02 21:54:13 +00:00
Andreas Fritiofson 9697e3e5e6 cortex_m: mem_ap access functions take number of bytes, not words
Accessing one byte of memory using a 16-bit access is not well defined.
The current implementation is forgiving and rounds up, but it should not
be relied upon.

Also, I suspect this code might fail if the byte order differs between
target and host, but I have no way of verifying it so I left it as it is.

Change-Id: I8d6a511151a194ed419f141703201f0632d84fc8
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1657
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-02 21:54:07 +00:00
Andreas Fritiofson 23fb298651 arm_adi_v5: Fix packed transfers crossing TAR auto-increment block
The word count returned from max_tar_block_size() was compared with the
count of half-word/bytes in the u16 and u8 packed access functions,
causing an infinite loop if the access actually crossed the boundary.

Change max_tar_block_size() to return a byte count, and scale at the call
site.

Change-Id: I2fe9b5941eb485f3d8219cfdd29fb71e02006de4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1649
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-02 21:53:59 +00:00
Andreas Fritiofson 2ab5d672ea arm_adi_v5: Fix packed and unaligned memory writes
For packed and/or unaligned accesses, the write functions reordered the
source buffer in place. Causing in the best case a segfault, in the worst
case silent data corruption.

Rewrite the data fetching to directly match the byte lane mapping
according to IHI0031C, without destroying the buffer.

Also slightly clean up variable usage and harmonize all the write
functions.

Change-Id: I9a01cfc5578653f9ec02043ff6b61a7a20f90d67
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1646
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-02 21:53:52 +00:00
Franck Jullien 4e79b48e2c Add new target type: OpenRISC
Add support for OpenRISC target. This implementation
supports the adv_debug_sys debug unit core. The mohor
dbg_if is not supported. Support for mohor TAP core
and Altera Virtual JTAG core are also provided.

Change-Id: I3b1cfab1bbb28e497c4fca6ed1bd3a4362609b72
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1547
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-26 09:52:56 +00:00
Andreas Fritiofson 322f7dccea target: Fix strange ordering in target_read_u8
It's been like this since the check was added, in 5aa93a5e.

Change-Id: Iaa0586e0cd1ce57ad92735dcc3e51108a133fe96
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1640
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-25 14:44:34 +00:00