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adi_v5: Remove unnecessary MEM-AP access functions 

It's far nicer to pass a size parameter than to split the calls to
separate wrappers which are combined to a single function anyway.

Change-Id: I716741ebf916f6f8e9358a31c8f4fe761107c82f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1847
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Andreas Fritiofson 2013-12-29 21:14:58 +01:00 committed by Spencer Oliver
parent 6647131ff5
commit bd0fbef5c8
3 changed files with 36 additions and 151 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

88
src/target/arm_adi_v5.c
View File

@ -368,22 +368,6 @@ int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size, ui
return retval;
}
/* Compatibility wrappers around mem_ap_write(). Note that the count is in bytes for these. */
int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address, bool addr_incr)
{
return mem_ap_write(dap, buffer, 4, count / 4, address, true);
}
int mem_ap_write_buf_u16(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
{
return mem_ap_write(dap, buffer, 2, count / 2, address, true);
}
int mem_ap_write_buf_u8(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
{
return mem_ap_write(dap, buffer, 1, count, address, true);
}
/**
* Synchronous read of a block of memory, using a specific access size.
*
@ -510,26 +494,6 @@ int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size, uint32_t
return retval;
}
/* Compatibility wrappers around mem_ap_read(). Note that the count is in bytes for these (despite
* what their doxygen documentation said). */
int mem_ap_read_buf_u32(struct adiv5_dap *dap, uint8_t *buffer,
int count, uint32_t address, bool addr_incr)
{
return mem_ap_read(dap, buffer, 4, count / 4, address, addr_incr);
}
int mem_ap_read_buf_u16(struct adiv5_dap *dap, uint8_t *buffer,
int count, uint32_t address)
{
return mem_ap_read(dap, buffer, 2, count / 2, address, true);
}
int mem_ap_read_buf_u8(struct adiv5_dap *dap, uint8_t *buffer,
int count, uint32_t address)
{
return mem_ap_read(dap, buffer, 1, count, address, true);
}
/*--------------------------------------------------------------------*/
/* Wrapping function with selection of AP */
/*--------------------------------------------------------------------*/
@ -561,60 +525,32 @@ int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
return mem_ap_write_atomic_u32(swjdp, address, value);
}
int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address)
int mem_ap_sel_read_buf(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_read_buf_u8(swjdp, buffer, count, address);
return mem_ap_read(swjdp, buffer, size, count, address, true);
}
int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address)
int mem_ap_sel_write_buf(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_read_buf_u16(swjdp, buffer, count, address);
return mem_ap_write(swjdp, buffer, size, count, address, true);
}
int mem_ap_sel_read_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address)
int mem_ap_sel_read_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_read_buf_u32(swjdp, buffer, count, address, false);
return mem_ap_read(swjdp, buffer, size, count, address, false);
}
int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address)
int mem_ap_sel_write_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_read_buf_u32(swjdp, buffer, count, address, true);
}
int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_write_buf_u8(swjdp, buffer, count, address);
}
int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_write_buf_u16(swjdp, buffer, count, address);
}
int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_write_buf_u32(swjdp, buffer, count, address, true);
}
int mem_ap_sel_write_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address)
{
dap_ap_select(swjdp, ap);
return mem_ap_write_buf_u32(swjdp, buffer, count, address, false);
return mem_ap_write(swjdp, buffer, size, count, address, false);
}
#define MDM_REG_STAT 0x00

54
src/target/arm_adi_v5.h
View File

@ -403,26 +403,6 @@ int mem_ap_read_atomic_u32(struct adiv5_dap *swjdp,
int mem_ap_write_atomic_u32(struct adiv5_dap *swjdp,
uint32_t address, uint32_t value);
/* MEM-AP memory mapped bus block transfers */
int mem_ap_read_buf_u8(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address);
int mem_ap_read_buf_u16(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address);
int mem_ap_read_buf_u32(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address, bool addr_incr);
int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size,
uint32_t count, uint32_t address, bool addrinc);
int mem_ap_write_buf_u8(struct adiv5_dap *swjdp,
const uint8_t *buffer, int count, uint32_t address);
int mem_ap_write_buf_u16(struct adiv5_dap *swjdp,
const uint8_t *buffer, int count, uint32_t address);
int mem_ap_write_buf_u32(struct adiv5_dap *swjdp,
const uint8_t *buffer, int count, uint32_t address, bool addr_incr);
int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size,
uint32_t count, uint32_t address, bool addrinc);
/* Queued MEM-AP memory mapped single word transfers with selection of ap */
int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t ap,
uint32_t address, uint32_t *value);
@ -435,26 +415,24 @@ int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
uint32_t address, uint32_t value);
/* Non incrementing buffer functions for accessing fifos */
int mem_ap_sel_read_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address);
int mem_ap_sel_write_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address);
/* Synchronous MEM-AP memory mapped bus block transfers */
int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size,
uint32_t count, uint32_t address, bool addrinc);
int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size,
uint32_t count, uint32_t address, bool addrinc);
/* MEM-AP memory mapped bus block transfers with selection of ap */
int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address);
int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address);
int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, int count, uint32_t address);
/* Synchronous MEM-AP memory mapped bus block transfers with selection of ap */
int mem_ap_sel_read_buf(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
int mem_ap_sel_write_buf(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address);
int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address);
int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, int count, uint32_t address);
/* Synchronous, non-incrementing buffer functions for accessing fifos, with
* selection of ap */
int mem_ap_sel_read_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap,
uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
int mem_ap_sel_write_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
/* Initialisation of the debug system, power domains and registers */
int ahbap_debugport_init(struct adiv5_dap *swjdp);

45
src/target/cortex_a.c
View File

@ -279,8 +279,8 @@ static int cortex_a8_read_regs_through_mem(struct target *target, uint32_t addre
if (retval != ERROR_OK)
return retval;
retval = mem_ap_sel_read_buf_u32(swjdp, armv7a->memory_ap,
(uint8_t *)(&regfile[1]), 4*15, address);
retval = mem_ap_sel_read_buf(swjdp, armv7a->memory_ap,
(uint8_t *)(&regfile[1]), 4, 15, address);
return retval;
}
@ -1891,8 +1891,8 @@ static int cortex_a8_write_apb_ab_memory(struct target *target,
goto error_unset_dtr_w;
/* Do the write */
retval = mem_ap_sel_write_buf_u32_noincr(swjdp, armv7a->debug_ap,
tmp_buff, (total_u32)<<2, armv7a->debug_base + CPUDBG_DTRRX);
retval = mem_ap_sel_write_buf_noincr(swjdp, armv7a->debug_ap,
tmp_buff, 4, total_u32, armv7a->debug_base + CPUDBG_DTRRX);
if (retval != ERROR_OK)
goto error_unset_dtr_w;
@ -2011,7 +2011,7 @@ static int cortex_a8_read_apb_ab_memory(struct target *target,
dscr = (dscr & ~DSCR_EXT_DCC_MASK) | DSCR_EXT_DCC_FAST_MODE;
buff32[1] = dscr;
/* group the 2 access CPUDBG_ITR 0x84 and CPUDBG_DSCR 0x88 */
retval += mem_ap_sel_write_buf_u32(swjdp, armv7a->debug_ap, (uint8_t *)buff32, 8,
retval += mem_ap_sel_write_buf(swjdp, armv7a->debug_ap, (uint8_t *)buff32, 4, 2,
armv7a->debug_base + CPUDBG_ITR);
if (retval != ERROR_OK)
goto error_unset_dtr_r;
@ -2025,7 +2025,7 @@ static int cortex_a8_read_apb_ab_memory(struct target *target,
*
* This data is read in aligned to 32 bit boundary, hence may need shifting later.
*/
retval = mem_ap_sel_read_buf_u32_noincr(swjdp, armv7a->debug_ap, (uint8_t *)tmp_buff, (total_u32-1) * 4,
retval = mem_ap_sel_read_buf_noincr(swjdp, armv7a->debug_ap, (uint8_t *)tmp_buff, 4, total_u32 - 1,
armv7a->debug_base + CPUDBG_DTRTX);
if (retval != ERROR_OK)
goto error_unset_dtr_r;
@ -2112,21 +2112,7 @@ static int cortex_a8_read_phys_memory(struct target *target,
if (armv7a->memory_ap_available && (apsel == armv7a->memory_ap)) {
/* read memory through AHB-AP */
switch (size) {
case 4:
retval = mem_ap_sel_read_buf_u32(swjdp, armv7a->memory_ap,
buffer, 4 * count, address);
break;
case 2:
retval = mem_ap_sel_read_buf_u16(swjdp, armv7a->memory_ap,
buffer, 2 * count, address);
break;
case 1:
retval = mem_ap_sel_read_buf_u8(swjdp, armv7a->memory_ap,
buffer, count, address);
break;
}
retval = mem_ap_sel_read_buf(swjdp, armv7a->memory_ap, buffer, size, count, address);
} else {
/* read memory through APB-AP */
@ -2206,22 +2192,7 @@ static int cortex_a8_write_phys_memory(struct target *target,
if (armv7a->memory_ap_available && (apsel == armv7a->memory_ap)) {
/* write memory through AHB-AP */
switch (size) {
case 4:
retval = mem_ap_sel_write_buf_u32(swjdp, armv7a->memory_ap,
buffer, 4 * count, address);
break;
case 2:
retval = mem_ap_sel_write_buf_u16(swjdp, armv7a->memory_ap,
buffer, 2 * count, address);
break;
case 1:
retval = mem_ap_sel_write_buf_u8(swjdp, armv7a->memory_ap,
buffer, count, address);
break;
}
retval = mem_ap_sel_write_buf(swjdp, armv7a->memory_ap, buffer, size, count, address);
} else {
/* write memory through APB-AP */