Commit Graph

8267 Commits

Author SHA1 Message Date
Tim Newsome 11c261cd50 Add `riscv expose_csrs` command.
This lets users tell OpenOCD which non-standard CSRs exist on their
target, that will also be accessible and whose existence will be
communicated to gdb.

Change-Id: I56163a9fcb84ad7ebe815ae74fbd9fcc208f5a9d
2017-12-19 10:41:48 -08:00
Tim Newsome 5f86f7208d Hide supervisor registers if there is no S mode.
Also update encoding.h.

Change-Id: I275be7de0aa1af64d13ea191b9f4ff391cfb16dc
2017-12-19 10:41:48 -08:00
Tim Newsome f55d1a2030 Give FPRs ABI names.
Change-Id: If198d10e16671b9868836e23386aaf8d4b05f317
2017-12-19 10:41:48 -08:00
Tim Newsome c7cddd2b5c Remove some debug printfs.
Change-Id: I09989d4c0e102889ecb0eedbd3f4138f8b7bdb8c
2017-12-19 10:41:48 -08:00
Tim Newsome 56ad0e5b30 Avoid another assertion failure.
Change-Id: Ia54f778152974164697b712c360918e17a127d95
2017-12-19 10:41:48 -08:00
Tim Newsome 10c17fdf17 Read misa before using it to check for extensions.
Change-Id: I7a172d83055d8bd833e3349a5b22b47dd5f31f5c
2017-12-19 10:41:48 -08:00
Tim Newsome ec1c814017 Don't rely on hart count until it's correct.
Change-Id: I4e05eb091823b2e0fb481ca0b599072ba1ca70f2
2017-12-19 10:41:48 -08:00
Tim Newsome 46715c7d8a Remove no-longer-true comment.
Change-Id: I888680e73682582438a0de0496238867f1604754
2017-12-19 10:41:48 -08:00
Tim Newsome 120477b2a2 Simplify examine()
Now we don't have to play tricks fooling other parts of our code that
might assert.

Change-Id: Ia574378e1f95ed62d297e6b2e852245e58c9ffc9
2017-12-19 10:41:48 -08:00
Tim Newsome 37278cf2ec Make priv register 8 bits.
(It's really only 2 bits, but something wonky happens between gdb and
OpenOCD if I make it that size.)

Change-Id: I562a65cb0ebe5aa0edcc54c251d0fea0e26f9cb1
2017-12-19 10:41:48 -08:00
Tim Newsome f341db9f72 WIP xml register for 0.11.
On HiFive1, FPRs show up with no name, and misa is 0x1105 instead of
0x40001105.

Change-Id: I4ee223c905ad7d860147014e7b6394668658c6ea
2017-12-19 10:41:48 -08:00
Tim Newsome 8926e66d3a Hide unknown registers, which probably don't exist
Change-Id: Iffa8fa5ff4b0a01abd30fa302b7087e2011337bf
2017-12-19 10:41:48 -08:00
Tim Newsome 26a54452d2 Fix register names.
Use the ABI ones for every register that we have one for.

Change-Id: I2a993abff416d2652dbe026b3fb498e144a5006f
2017-12-19 10:41:48 -08:00
Tim Newsome 7c989698a1 WIP better CSR names, and include only existing
Change-Id: I1a234ee07c417ba56da10a61fc2bdbdcc60490a8
2017-12-19 10:41:48 -08:00
Tim Newsome a5cb0b2270 WIP. Hide FPRs if the hart doesn't support F/D.
Change-Id: I988c0c36f2de8157d76874a697b3c054773b787d
2017-12-19 10:41:48 -08:00
Tim Newsome e648856a41 `make all` debug tests now pass.
Also properly support (I think) D extension on RV32.

Change-Id: I2f0162d36e4c18c251f99b6943403cef30d17d29
2017-12-19 10:41:48 -08:00
Tim Newsome c421fefdcb Checkpoint that seems to work.
Change-Id: I9599aacc256f6340795097732b6f8e8869c2099f
2017-12-19 10:41:48 -08:00
Tim Newsome 1e43d32e01 Use %ll instead of %L instead of scanf.
Mac build barfs on L, and the manpage says they're equivalent.

Hopefully fixes #147

Change-Id: I3aa57775731f3f5ceb03097cae2a9dc6fd426dcd
2017-12-15 15:31:36 -08:00
Tim Newsome b8db82fb57
Merge pull request #146 from riscv/scratch_ram
Fix cut and paste bug.
2017-12-14 14:22:10 -08:00
Tim Newsome 6aff46adcc Fix cut and paste bug.
Now reading 64-bit FPRs on 32-bit harts using scratch memory might work.

Change-Id: Ie8c0fc689386c6e724ecab5e8c855e725fa8dd97
2017-12-14 13:51:13 -08:00
Tim Newsome 7eceac758c Use abstraction because Windows is not POSIX
Fixes #138

Change-Id: I4d9b49762e318fe91f1561ed315829b43daefef4
2017-12-14 12:36:42 -08:00
Tim Newsome 3624d5e5eb Add win32 build to travis.
Change-Id: I8ce62ff321c6f3627d42fff13236f7fc9440d429
2017-12-14 12:36:21 -08:00
Tomas Vanek 19f8f58c0d target: remove unused event definitions
Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.

Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-12 21:18:10 +00:00
Tomas Vanek 3f6ab8e6a6 flash/nor/stm32f2x: fix erase on STM32F413/423
Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
	'stm32x device protected'
on F413/423.

Drop sector number translation for devices without has_large_mem flag.

Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:24 +00:00
Tomas Vanek 90a6245eec flash/nor/stm32f2x: fix protection block size for F767 in dual bank mode
A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.

Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:21 +00:00
Spencer Oliver 0422763489 doc: improve stm32 flash driver documentation
also remove legacy footnote as it adds no value.

Change-Id: I3892acf244bd8fba6f844a5d82a66004e193a395
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4309
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2017-12-12 21:15:09 +00:00
Paul Fertser 31c58c139d jtag: drivers: stlink: handle all versions with single config
Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.

Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:13:55 +00:00
Tim Newsome 20236ca817
Merge pull request #143 from riscv/fmv
Fix build.
2017-12-11 13:07:35 -08:00
Tim Newsome 0a65a6527d Fix build.
Change-Id: I4e3a36fac77fefa271ae9facbaa990fa330501ae
2017-12-11 12:58:20 -08:00
Tim Newsome e50ee46a6f
Merge pull request #131 from riscv/small_progbuf
Support program buffers that are just 2 instructions large
2017-12-11 12:52:31 -08:00
elmot eb26a884e0 config: stm32l01x and stm32l02x chips support
New low-end chips have only 2k of RAM, workarea size adjusted

Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe
Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com>
Reviewed-on: http://openocd.zylin.com/4308
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-08 14:59:22 +00:00
Spencer Oliver 9021210428 docs: add missing stm32 flash driver documentation
Change-Id: I433780646e6fdfd0c2527b4a68025946ccb79d8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4307
Tested-by: jenkins
Reviewed-by: <alexandre.torgue@st.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-07 11:14:10 +00:00
Ake Rehnman 020cb12077 stm8 : new target
New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.

Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-07 07:53:13 +00:00
Alexandre Torgue 6090a5b158 Add STM32H7 config files
Add 2 target files:
-stm32h7x.cfg
-stm32h7x_dual_bank.cfg

Add 2 config files for:
-STM32H743zi-nucleo bord
-STM32H743i and STM32H753i eval boards.

Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4182
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:41 +00:00
Alexandre Torgue 6a66cccbad flash: Add new stm32h7x driver support
Add basic support for:
     -STM32H7x (Embedded flash 2M)

Erase and write tested on stm32h743.

Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:10 +00:00
Bas Vermeulen 06aebfacda Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled
The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).

Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.

Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2017-12-06 21:07:10 +00:00
Robert Jordens 5d6bf8704c spi: add n25q256 flash
* 256 MBit SPI flash
* https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs
* used e.g. on Xilinx KCU105

Change-Id: I18b19292b4869627adb9071266271962fec68fb4
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:06:00 +00:00
Marc Schink 5679dc657c server/gdb: Use 'bool' instead of 'int' for boolean values
Change-Id: I71c2f2553a29e9ef167ff3313cc06c7b31c64190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4278
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:39 +00:00
Marc Schink 8bb7021ca8 server/gdb: Use get_target_from_connection()
Change-Id: I2c66bf6da734a3b71e358553943e9fc3c6578c39
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4277
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:33 +00:00
Marc Schink 2fcbe3b8f7 target: Constify parameter of is_armv7m()
Change-Id: Ieea1b0dec88818e9e8d5c8c5d54aa8959556d77b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4275
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:19 +00:00
Marc Schink dba9293a89 rtos: Use 'bool' as return type for detect_rtos()
Change-Id: I91ad0431d44ed94f48d20c4690f8642d66f52a9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4274
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:12 +00:00
Jonas Norling 7e64451097 adi_v5_swd: Add error message when SWD fails to connect
Error message instead of failing silently.

Change-Id: Ie54a5bf68459d3c0e96cc38080ffad8de0a4b5ce
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4269
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-06 20:55:14 +00:00
Tim Newsome 7a6704c5c6
Merge pull request #140 from riscv/encoding
Update encoding.h.
2017-11-27 13:48:56 -08:00
Tim Newsome 4d5f74fbe6 Update encoding.h.
Change-Id: Id653500aa525746e8824ff5fd2850c62c8c21c08
2017-11-27 13:23:33 -08:00
Tim Newsome 52cdf286ca Add missing return.
Change-Id: Ida32482903cdfd8eeb043088e84bb1f4f5ac673c
2017-11-16 15:58:08 -08:00
Tim Newsome 9b4628c9fc
Merge pull request #127 from riscv/jtag_debug
Clean up this JTAG debug code.
2017-11-14 09:59:25 -08:00
Palmer Dabbelt 055a70f66f
Merge pull request #133 from riscv/no-russian
No Russian
2017-11-03 13:15:07 -07:00
Megan Wachs 9f56a9643d riscv-compliance: remove some compile warnings 2017-11-02 09:34:43 -07:00
Megan Wachs e435011713 Merge commit '8304e1b' into HEAD 2017-11-01 13:44:51 -07:00
Tim Newsome e28abf7c9e Merge branch 'riscv' into small_progbuf
Change-Id: I1d48cb1f8448ebbf98c8bb369928d1e7a7a78c75
2017-11-01 13:38:17 -07:00