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Avoid another assertion failure. 

Change-Id: Ia54f778152974164697b712c360918e17a127d95
This commit is contained in:
Tim Newsome 2017-12-11 15:32:01 -08:00
parent 10c17fdf17
commit 56ad0e5b30
1 changed files with 5 additions and 1 deletions
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6
src/target/riscv/riscv-013.c
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@ -1193,11 +1193,15 @@ static int examine(struct target *target)
RISCV_INFO(r);
r->impebreak = get_field(dmstatus, DMI_DMSTATUS_IMPEBREAK);
// Don't call any riscv_* functions until after we've counted the number of
// cores and initialized registers.
for (int i = 0; i < RISCV_MAX_HARTS; ++i) {
if (!riscv_rtos_enabled(target) && i != target->coreid)
continue;
riscv_set_current_hartid(target, i);
r->current_hartid = i;
riscv013_select_current_hart(target);
uint32_t s = dmi_read(target, DMI_DMSTATUS);
if (get_field(s, DMI_DMSTATUS_ANYNONEXISTENT)) {
break;