riscv-compliance: remove some compile warnings
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@ -2229,7 +2229,7 @@ int riscv013_test_compliance(struct target *target) {
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for (int i = 0; i < riscv_count_harts(target); i +=32){
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uint32_t haltstat = dmi_read(target, 0x40 + (i / 32));
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uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFF : ((1 << (riscv_count_harts(target) % 32)) - 1);
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uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFFU : ((1U << (riscv_count_harts(target) % 32)) - 1);
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COMPLIANCE_TEST(haltstat == haltstat_expected, "Halt Status Registers should report all halted harts.");
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}
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@ -2276,7 +2276,6 @@ int riscv013_test_compliance(struct target *target) {
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// But at any rate, this is not legal and should cause an error.
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dmi_write(target, DMI_COMMAND, 0xAAAAAAAA);
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COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xAAAAAAAA, "COMMAND register should be R/W");
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uint32_t result = dmi_read(target, DMI_ABSTRACTCS);
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COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \
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"Illegal COMMAND should result in UNSUPPORTED");
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dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR);
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@ -2291,7 +2290,7 @@ int riscv013_test_compliance(struct target *target) {
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uint32_t busy;
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command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3:2);
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command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1);
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for (int i = 1 ; i < 32 ; i = i << 1) {
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for (unsigned int i = 1 ; i < 32 ; i = i << 1) {
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command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_X0 + i);
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command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1);
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dmi_write(target, DMI_DATA0, i);
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@ -2375,7 +2374,7 @@ int riscv013_test_compliance(struct target *target) {
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}
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// Core Register Tests
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uint64_t bogus_dpc;
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uint64_t bogus_dpc = 0xdeadbeef;
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for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){
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riscv_set_current_hartid(target, hartsel);
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@ -2450,8 +2449,9 @@ int riscv013_test_compliance(struct target *target) {
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// verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be,
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// just verify that at least it's not the bogus value anymore.
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uint64_t dpc = riscv_get_register(target, GDB_REGNO_DPC);
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COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)");
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COMPLIANCE_TEST(bogus_dpc != riscv_get_register(target, GDB_REGNO_DPC), "NDMRESET should move $DPC to reset value.");
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COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt");
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// DMACTIVE -- deasserting DMACTIVE should reset all the above values.
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