Commit Graph

7554 Commits

Author SHA1 Message Date
Paul Fertser 99b03d3bfb doc: add SVF optional arguments descriptions
Change-Id: I1a3e5b04b6bc4821c4d11c8fcb33b426d6d41bfb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4314
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2018-01-13 08:45:35 +00:00
Paul Fertser 12a838c6d4 server: gdb: always print target information in multi-target setups
When multiple targets are declared, it's not always obvious which
target the connection was made for, this can lead to very confusing
errors.

Reported by zjason on IRC.

Change-Id: I52906320394e89cb6cfe82054a3f94b27c999689
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4135
Tested-by: jenkins
2018-01-13 08:44:57 +00:00
Paul Fertser b95e0c13aa flash/startup: make program accept filenames with spaces and other characters
This should allow to process any path names excluding those that have
curly braces.

Change-Id: I87bf9ddede11e2b28d5826878eb1338143f73c03
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4083
Tested-by: jenkins
2018-01-13 08:43:26 +00:00
Paul Fertser 3cb7fd4a60 tools: release.sh: produce only SHA256 hashes
Both MD5 and SHA-1 shouldn't be relied upon since long.

Change-Id: I0dea92fbf0f68b900c0d3a314fb3956d08ba0d48
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3949
Tested-by: jenkins
2018-01-13 08:41:23 +00:00
Paul Fertser 85ac081c22 jtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srst
This doesn't seem to make any sense.

Change-Id: I272de0ea3c0e86cc9a798cbd864050aaa597c3f0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3933
Tested-by: jenkins
2018-01-13 08:40:44 +00:00
Paul Fertser fe577e0b63 target: arm: disassembler: decode v6T2 ARM MOV{W,T} instructions
Change-Id: I32cf2669b1b22d4142f30674cf918e36561a885e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3899
Tested-by: jenkins
2018-01-13 08:36:37 +00:00
Paul Fertser 2420aa00a4 target: arm: disassembler: decode v6T2 ARM ISB instruction
Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3895
Tested-by: jenkins
2018-01-13 08:36:29 +00:00
Paul Fertser c26bbf7a1b target: arm: disassembler: decode v6T2 ARM DSB instruction
Change-Id: Id91b1a87d34982c72f2a8ab46564c961d1fef9dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3894
Tested-by: jenkins
2018-01-13 08:36:17 +00:00
Paul Fertser de974eaed3 target: arm: disassembler: add v5T Thumb BLX decoding
Reported by thesourcerer on IRC.

Change-Id: I36d4d95de176a19fdd0bf80d8b419be6ca637e98
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3893
Tested-by: jenkins
2018-01-13 08:36:03 +00:00
Paul Fertser c652f44ca3 flash: startup.tcl: do not disable polling when not exiting
Change-Id: I31b8a8b4519d65d6587207a71eb08dcee8ddd6fd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4243
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-01-13 08:17:21 +00:00
Aleksey Shargalin b34e013965 remote_bitbang_sysfsgpio: fix reset handling
When both SRST and TRST asserted, 'u' is sent to remote bitbang.
Fix for correct handling of such a case

Change-Id: I2a93ff71f5bbae658e6c0c3649a9fbcca2c5a14b
Signed-off-by: Aleksey Shargalin <myokaski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4283
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-13 06:35:55 +00:00
Pushpal Sidhu 133e01d2af board: consolidate st_nucleo_l4 boards
We can now use the generic stlink.cfg which allows for both ST-LINK/V2
and V2-1 debuggers.

Change-Id: I229c6fe5f6a6a4f2d3c787a49939846f102f9e24
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
Reviewed-on: http://openocd.zylin.com/4313
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-13 06:27:11 +00:00
Ake Rehnman cf2b9cbf5c Added config files for stm8l152 stm8s003 and stm8s105
Change-Id: I26cc401aafac01e5aed8eac605488da5221ffdc2
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4268
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-12 20:22:46 +00:00
Ake Rehnman a6dea119a3 stlink_usb: Changes to make connect_under_reset work
Leaving mode before closing added
Resolved a collision with JTAG API v1 error/status
checking overwriting SWIM status bytes

Change-Id: I35444ec0e6caace3e072c60085059602f4cdf0a4
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4265
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-12 20:19:42 +00:00
Ake Rehnman 3de6b5f6e5 jtag/drivers/stlink_usb : implemented and repaired SWIM support
Fixed a bug in stlink_usb_read_mem/write_mem preventing large data transfers

The SWIM support in stlink_usb was basically non existent so I have
implemented the missing parts. The bCBWCBLength and dCBWDataTransferLength
for STLINK-V1 protocol was not correct so that was fixed. The reason for
adding SWIM support is to add STM8 support for OpenOCD.

I have tested the driver on:
STM8 discovery board with the built-in STLINK-V1
STM8 discovery board with STLINK-V2 dongle
STM32 vldiscovery board with the built-in STLINK-V1
STM32F1xxx processor with STLINK-V2 dongle

Change-Id: I4aa80a92fb0226174356adaf2f8ff949920a621f
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3952
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-12 20:17:55 +00:00
Tomas Vanek 779e95cc32 arm_adi_v5: fix regression from 4553abf906
Functions mem_ap_read() and mem_ap_write() incremented address even
if addrinc=false. I overlooked this fact and moved mem_ap_setup_tar()
set wrong addresses in no-incr mode.

Fixed by preventing address increment in no-incr mode.

Change-Id: I512e12a6a64e30cf6bc5bf77e3d57d35cc33e058
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-11 08:28:29 +00:00
Forest Crossman 6f5e9941df jtag/drivers/kitprog: Enable LOG_DEBUG_IO
Change-Id: Ic01b0acf01e18bcb2bf98c101c7b5888cdc10186
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4323
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-09 16:22:30 +00:00
Matthias Welwarsky 3cba4bd4cb aarch64: fix crash on single-stepping
Make sure to skip un-examined targets (e.g. targets with deferred
examination) on single-stepping

fixes bug #158

Change-Id: Ib40c6fee03079fd078bd52a84615e6f8a081d128
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4184
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-09 09:37:14 +00:00
Tomas Vanek 81a33244df arm_adi_v5: reduce some CSW writes
MEM-AP access through banked data registers MEM_AP_REG_BD0..3
does not increment TAR regardless of the current autoincrement mode.
mem_ap_read_u32() and mem_ap_write_u32() can keep the current
autoincrement mode instead of switching autoincrement off.

Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4163
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-05 10:06:39 +00:00
Tomas Vanek 4553abf906 arm_adi_v5: fix wrong addressing after change of CSW_ADDRINC
Problem: If the same memory location is accessed alternatively
by MEM-AP banked data registers without autoincrement and by standard
autoincremented read/write, TAR register is not updated correctly.

How to replicate: On a Cortex-M issue
    mdw 0xe000edf0
multiple times. When poll is on (poll reads the same memory location)
only the first read is correct.
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 20002640
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 00000000

No problems with poll off.
0xe000edf0: 01000000
0xe000edf0: 01000000
0xe000edf0: 01000000

mem_ap_setup_tar() writes to MEM_AP_REG_TAR if requested TAR value
changed or CSW_ADDRINC_... is currently active.
However if an autoincremented access has been issued and autoinc
switched off in CSW afterwards, TAR does not get updated.

The change introduces mem_ap_update_tar_cache() which is called
after queuing of any access to MEM_AP_REG_DRW. It simulates
TAR increment to keep tar_value in sync with MEM_AP.
Crossing tar autoincrement block boundary invalidates cached value.

mem_ap_write() and mem_ap_read() do not check tar autoincrement
block boundary, mem_ap_setup_tar() is called before each transfer instead.

dap_invalidate_cache() is introduced to ensure invalidation
of all cached values during dap_dp_init() and swd_connect()

Change-Id: I815c2283d2989cffd6ea9a4100ce2f29dc3fb7b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4162
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-05 10:06:30 +00:00
Bas Vermeulen ada631cc5f target aarch64: rework memory read/write to use 8/16/32 bit operations
The existing code only used Memory Access mode to read memory,
which uses 32 bit operations only.
Rework the code to check the alignment/size of the read/write operation,
and use the Memory Access mode to read aligned 32 bit memory.
When using unaligned access, or 8 or 16 bit reads, use LDR{BHW} and STR{BHW}
instead.

The exception handling is still the same as it was before (meaning it breaks
when things go wrong), but I can now read an 8 bit register correctly.

Change-Id: I739a5ee825c0226ed4a89c32895cc2a047b8dc15
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4301
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-04 09:09:46 +00:00
Tomas Vanek bb976e3c38 jtag/drivers/cmsis-dap: fix connect under reset
Commit ef02b69b14 included
a call to cmsis_dap_cmd_DAP_Connect() before calling
cmsis_dap_cmd_DAP_SWJ_Sequence(). According to comment
it is necessary for at least Keil ULINK-ME.

Commit 72c3464be4 added
a cmsis_dap_cmd_DAP_Disconnect() before connect call to pair
connection/disconnection. It solves some problems on Atmel EDBG.

Unfortunately calling either of cmsis_dap_cmd_DAP_Connect()
or cmsis_dap_cmd_DAP_Disconnect() deasserts reset signal.
So these workarounds break ability to connect under reset.

Use cmsis_dap_cmd_DAP_Disconnect() and cmsis_dap_cmd_DAP_Connect()
pair only if both SRST and TRST are deasserted.

Change-Id: I0914dae0a1360b8c7fe48231ff3867caedfb2dbe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Leonardo Sabino dos Santos <leonardo.sabino@gmail.com>
Reviewed-on: http://openocd.zylin.com/4100
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-03 10:56:32 +00:00
Jiri Kastner 1c2e3d41de config for ESPRESSObin from Globalscale Tech. Inc.
Change-Id: I77f536a9d2e901ebcef0a7dd0f205e5332b1d382
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4303
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-20 19:47:11 +00:00
Jiri Kastner 84d68579eb configs for Marvell Armada 3700
Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4302
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-20 19:46:20 +00:00
Tomas Vanek 19f8f58c0d target: remove unused event definitions
Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.

Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-12 21:18:10 +00:00
Tomas Vanek 3f6ab8e6a6 flash/nor/stm32f2x: fix erase on STM32F413/423
Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
	'stm32x device protected'
on F413/423.

Drop sector number translation for devices without has_large_mem flag.

Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:24 +00:00
Tomas Vanek 90a6245eec flash/nor/stm32f2x: fix protection block size for F767 in dual bank mode
A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.

Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:21 +00:00
Spencer Oliver 0422763489 doc: improve stm32 flash driver documentation
also remove legacy footnote as it adds no value.

Change-Id: I3892acf244bd8fba6f844a5d82a66004e193a395
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4309
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2017-12-12 21:15:09 +00:00
Paul Fertser 31c58c139d jtag: drivers: stlink: handle all versions with single config
Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.

Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:13:55 +00:00
elmot eb26a884e0 config: stm32l01x and stm32l02x chips support
New low-end chips have only 2k of RAM, workarea size adjusted

Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe
Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com>
Reviewed-on: http://openocd.zylin.com/4308
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-08 14:59:22 +00:00
Spencer Oliver 9021210428 docs: add missing stm32 flash driver documentation
Change-Id: I433780646e6fdfd0c2527b4a68025946ccb79d8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4307
Tested-by: jenkins
Reviewed-by: <alexandre.torgue@st.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-07 11:14:10 +00:00
Ake Rehnman 020cb12077 stm8 : new target
New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.

Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-07 07:53:13 +00:00
Alexandre Torgue 6090a5b158 Add STM32H7 config files
Add 2 target files:
-stm32h7x.cfg
-stm32h7x_dual_bank.cfg

Add 2 config files for:
-STM32H743zi-nucleo bord
-STM32H743i and STM32H753i eval boards.

Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4182
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:41 +00:00
Alexandre Torgue 6a66cccbad flash: Add new stm32h7x driver support
Add basic support for:
     -STM32H7x (Embedded flash 2M)

Erase and write tested on stm32h743.

Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:10 +00:00
Bas Vermeulen 06aebfacda Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled
The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).

Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.

Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2017-12-06 21:07:10 +00:00
Robert Jordens 5d6bf8704c spi: add n25q256 flash
* 256 MBit SPI flash
* https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs
* used e.g. on Xilinx KCU105

Change-Id: I18b19292b4869627adb9071266271962fec68fb4
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:06:00 +00:00
Marc Schink 5679dc657c server/gdb: Use 'bool' instead of 'int' for boolean values
Change-Id: I71c2f2553a29e9ef167ff3313cc06c7b31c64190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4278
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:39 +00:00
Marc Schink 8bb7021ca8 server/gdb: Use get_target_from_connection()
Change-Id: I2c66bf6da734a3b71e358553943e9fc3c6578c39
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4277
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:33 +00:00
Marc Schink 2fcbe3b8f7 target: Constify parameter of is_armv7m()
Change-Id: Ieea1b0dec88818e9e8d5c8c5d54aa8959556d77b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4275
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:19 +00:00
Marc Schink dba9293a89 rtos: Use 'bool' as return type for detect_rtos()
Change-Id: I91ad0431d44ed94f48d20c4690f8642d66f52a9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4274
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:12 +00:00
Jonas Norling 7e64451097 adi_v5_swd: Add error message when SWD fails to connect
Error message instead of failing silently.

Change-Id: Ie54a5bf68459d3c0e96cc38080ffad8de0a4b5ce
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4269
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-06 20:55:14 +00:00
Jonas Norling 41092636d1 ftdi: Enable SWDIO output before sending data on it
The SWDIO buffer has to be enabled, by setting SWDIO_OE, for data on
SWDIO to reach the target. Explicitly do this before sending the
switch sequences for JTAG-to-SWD, etc.

This makes the code insensitive to the state of SWDIO_OE specified in
ftdi_layout_init. It used to work only on adapters with a non-inverted
SWDIO_OE inited to 1, or inverted SWDIO_OE inited to 0.

Change-Id: I4b9e520ac1c7ce2a437251a05fc036bc68de718e
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4270
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-27 11:48:36 +01:00
Jonathan McDowell c0881ba2d5 tcl/interface/ftdi/openrd: Fix FTDI channel + device description
Similar to the Sheevaplug fix inf95f8b70fbd0f7e9c91a2d9006b1abb2dd07ebf2
the OpenRD device has its JTAG interface on the first channel of the
ft2232, which is 0 for the new driver but was 1 for the old one. Correct
the config file appropriately. Also the device description was missing
the trailing " B" and thus not picking up the device correctly. Finally
add an adapter_khz setting in the OpenRD board configuration file - set
to 2MHz to match the Sheeva variant.

Confirmed as working thanks to Phil Hands providing me access to his
hardware to test on.

See also Debian Bug#793214; https://bugs.debian.org/793214

Change-Id: Ifacf53124eaa330bbbdf36dfa79e3256bf2a5201
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4254
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-27 11:48:05 +01:00
Christopher Head bca67d107f Cortex-M: Delete an unnecessary local variable
The dhcsr_save variable was used to save the value of
cortex_m->dcb_dhcsr so it could be restored later. However, all writes
in between the save and the restore use mem_ap_write_atomic_u32, not
cortex_m_write_debug_halt_mask, which means cortex_m->dcb_dhcsr isn’t
changed anyway. Delete the unnecessary local.

Change-Id: I064a3134e21398e1ecfc9f1fa7efd7b020b52341
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4240
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-10-27 11:47:22 +01:00
Christopher Head 02df0abb54 Cortex-M: fix stale DHCSR cache values
In cortex_m_assert_reset, in two locations, DHCSR is written directly
using mem_ap_write_u32. This means that the cached version,
target_to_cm(target)->dcb_dhcsr, is not updated when these writes are
performed, so subsequent writes to DHCSR that use
cortex_m_write_debug_halt_mask will change those bits back to their old
values which, unless modified in that particular invocation, come from
the cache. This causes an actual, observable bug on an STM32F7 in which
running “reset run” immediately after “program” can in some cases result
in execution proceeding with C_MASKINTS set (it is cleared on line 1021
but is then set immediately afterward in cortex_m_clear_halt), causing
failure of the application. Replace these mem_ap_write_u32 calls with
cortex_m_write_debug_halt_mask calls to do the same jobs.

Change-Id: Id35ca7f6057c2df2ba9cd67c53a73b50816d0b71
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4239
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-10-27 11:47:16 +01:00
Freddie Chopin 079d78f7de Fix GCC7 warnings about string truncation
GCC7 with -Wall warns about possible string truncation with
snprint()-type functions with "directive output may be truncated writing
1 byte into a region of size between 0 and 9
[-Werror=format-truncation=]" + "note: ‘snprintf’ output between 5 and
14 bytes into a destination of size 12" (or similar). Fix this by
increasing sizes of buffers.

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Ib848f2a56dd658783534158947ae1be7c0e99d45
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4175
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2017-10-23 10:54:24 +01:00
Freddie Chopin 9364b0dba4 Fix GCC7 warnings about switch-case fallthroughs
GCC7 with -Wextra warns about switch-case blocks which fallthrough with
"this statement may fall through [-Werror=implicit-fallthrough=]". This
can be fixed by adding "special" comments: "/* fallthrough */".

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Iba0be791dbdd86984489b2d9a0592bb59828da1e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4174
Tested-by: jenkins
2017-10-23 10:54:16 +01:00
Andreas Fritiofson ef49b34b2a arm: semihosting: set command line arguments
Add "arm semihosting_cmdline [argv0 argv1 ...]" for setting the
command line arguments for the debuggee.

[andreas.fritiofson@gmail.com]: Dynamic allocation, empty default

Change-Id: I831ddd161d602f251940e29608a154e9590fdee1
Signed-off-by: Christian Groessler <chris@groessler.org>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3106
Tested-by: jenkins
2017-10-22 23:06:09 +01:00
Tim Newsome 1662508911 Differentiate "target not halted" messages.
Change-Id: I8728fa007289d7af5c6791142e76eb5777c83ca4
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4244
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-18 08:38:18 +01:00
Tim Newsome 1356be121e Document `struct reg` fields.
Change-Id: I286316079e2e4d4f09427a4ffbecadb48c5dc9d9
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4250
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-18 08:35:42 +01:00