target: arm: disassembler: decode v6T2 ARM ISB instruction

Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3895
Tested-by: jenkins
This commit is contained in:
Paul Fertser 2016-12-02 20:15:46 +03:00
parent c26bbf7a1b
commit 2420aa00a4
2 changed files with 13 additions and 0 deletions

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@ -170,6 +170,18 @@ static int evaluate_pld(uint32_t opcode,
return ERROR_OK;
}
/* ISB */
if ((opcode & 0x07f000f0) == 0x05700060) {
instruction->type = ARM_ISB;
snprintf(instruction->text,
128,
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tISB %s",
address, opcode,
((opcode & 0x0000000f) == 0xf) ? "SY" : "UNK");
return ERROR_OK;
}
return evaluate_unknown(opcode, address, instruction);
}

View File

@ -107,6 +107,7 @@ enum arm_instruction_type {
ARM_MRRC,
ARM_PLD,
ARM_DSB,
ARM_ISB,
ARM_QADD,
ARM_QDADD,
ARM_QSUB,