This allows to eliminate up to two DMI NOPs.
Change-Id: I09a18bd896fce2392d1b65d4efb38b53e334a358
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Code cleanup: "slot_t" is unused in riscv013 - remove it.
Change-Id: I9d5a0cf8446a180b1d13a9ce2c86d904b946cf28
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
hide_csrs should not emit warnings on an attempt to hide non-exitents CSR.
hide_csrs funcitonality is intended to be used for scenarios when we don`t
want certain groups of registers to be available in GDB. Typically this is
needed to simplify integration with various IDE. In such scenarious it may
be impractical/unfeseable to figure out which register is present on a
target. So reporting a situation when a user wants to hide a non-existent
register creates way too much noise. This commit reduces severity of
relevant debug message to LOG_TARGET_DEBUG
Before this patch the following behavior is observed on targets that do
not support hit bit:
```
bp 0x80000004 4 hw
resume 0x80000000
riscv.cpu halted due to watchpoint
```
This happens because the current implementation relies on the presence
of hit bit way too much. While working on this patch few defects in
hit bit-based trigger detection were discovered, added appropriate
TODOs.
This would elliminate the need for an extra nop in-between the two reads
in case of a 64-bit register.
Change-Id: I2cddc14f7f78181bbda5f931c4e2289cfb7a6674
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
There was an error introduced by
8319eee9e1.
According to RISC-V Debug Spec 1.0.0-rc1 [3.14.2. Debug Module Contro]:
> 0 (inactive): The module’s state, including authentication mechanism,
takes its reset values (the dmactive bit is the only bit which can be
written to something other than its reset value).
`dmactive` was written together with `hartsel` and `hasel` in
8319eee9e1.
Change-Id: I11fba35cb87f8261c0a4a45e28b2813a5a086078
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
For GDB to fully support hardware watchpoints, OpenOCD needs to tell GDB
which data address has been hit. OpenOCD relies on a target-specific
hit_watchpoint function to do this. If GDB is not given the address, it
will not print the hit variable name or its old and new value.
There does not seem to be a way for the hardware to tell us which
trigger
was hit (0.13 introduced the 'hit bit' but this is optional).
Alternatively,
we can decode the instruction at dpc and find out which memory address
it accesses.
This commit adds support for RVC (compressed) load and store
instructions.
Related to:
https://github.com/riscv-collab/riscv-openocd/issues/688https://github.com/riscv-collab/riscv-openocd/pull/291
This commit is related to testing how OpenOCD responds to `dmi.busy`.
Consider testing on Spike (e.g. `riscv-tests/debug` testsuite). Spike
returns `dmi.busy` if there were less then a given number of RTI cycles
(`required_rti_cycles`) between DR_UPDATE and DR_CAPTURE:
https://github.com/riscv-software-src/riscv-isa-sim/blob/master/riscv/jtag_dtm.cc#L145https://github.com/riscv-software-src/riscv-isa-sim/blob/master/riscv/jtag_dtm.cc#L202
`required_rti_cycles` gets it's value from `--dmi-rti` CLI argument and
is constant throughout the run.
OpenOCD learns this required number of RTI cycles by starting with zero
and increasing it if `dmi.busy` is encountered. So the required number
of RTI cycles is learned during the first DMI access in the `examine()`.
To induce `dmi.busy` on demand `riscv reset_delays <x>` command is
provided. This command initializes `riscv_info::reset_delays_wait`
counter to the provided `<x>` value. The counter is decreased before a
DMI access and when it reaches zero the learned value of RTI cycles
required is reset, so the DMI access results in `dmi.busy`.
Now consider running a batch of accesses. Before the change all the
accesses in the batch had the same number of RIT cycles in between them.
So either:
* Number of accesses in the batch was greater then the value of
`riscv_info::reset_delays_wait` counter and there was no `dmi.busy`
throughout the batch.
* Number of accesses in the batch was less or equal then the value of
`riscv_info::reset_delays_wait` counter and the first access of the
batch resulted in `dmi.busy`.
Therefore it was impossible to encounter `dmi.busy` on any scan of the
batch except the first one.
Change-Id: Ib0714ecaf7d2e11878140d16d9aa6152ff20f1e9
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Recently, (after b503fdef02) OpenOCD started to notify user about hart
state updates. This causes confusion in some cases since some internal
updates to the hart state should not be visible to the user as these are
implementation details. For example situation like this:
```
> reset halt
JTAG tap: riscv.tap tap/device found: 0xdeadbeef ...
> resume
[riscv.cpu0] Found 4 triggers
riscv.cpu0 halted due to single-step.
[riscv.cpu1] Found 4 triggers
riscv.cpu1 halted due to single-step.
[riscv.cpu2] Found 4 triggers
riscv.cpu2 halted due to single-step.
[riscv.cpu3] Found 4 triggers
riscv.cpu3 halted due to single-step.
```
likely confuse people.
There is no issue with the resume functionality. It`s just that
resume internally causes single-step that causes hart state
to change.
This commit disable calling of user-specified (and default)
callbacks during the "hidden" step operation disabling these
confusing messages
Change-Id: I3412a089e2abdcd315d86cec7ee732fdd18c1601
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Prior to the commit, pc was cached at `info->dpc`, but dpc at register
cache.
Change-Id: I369788441dbe21bcf8fc360d2e97e98096b25e3a
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
`reg` is a number in register cache, as evident by the following call to
`reg_cache_set()`. `CSR_DCSR` is `GDB_REGNO_DCSR - 65`. This results in
setting cache value for another register, which does not exist, and
causes a segfault if all non-existent registers are not allocated a
value (`reg->value == NULL`).
Change-Id: Iab68a4bb55ce6d4730804e9709e40ab2af8a07c6
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This allows to merge the implementation in `batch.c` with the one in
`riscv-013.c`.
Change-Id: Ic3821a9ce2d75a7c6e618074679595ddefb14cfc
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
According to the RISC-V Debug Spec (1.0.0-rc1)[3.7 Abstract Commands]:
> While an abstract command is executing (busy in abstractcs is high), a
debugger must not change hartsel, and must not write 1 to haltreq,
resumereq, ackhavereset, setresethaltreq, or clrresethaltreq.
The patch ensures the rule is followed.
Change-Id: Id7d363d9fdeb365181b7058e0ceb0be0df39654f
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This allows to examine each DM ones (e.g. enumerating harts assigned to
the DM). Additionaly, it is guaranteed that the DM is reset before the
examination.
Change-Id: I2333d06ff1152bf51c647d59baa55cb402054cb9
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
According to the RISC-V Debug Spec (1.0.0-rc1)[3.7 Abstract Commands]:
> While an abstract command is executing (busy in abstractcs is high), a
debugger must not change hartsel, and must not write 1 to haltreq,
resumereq, ackhavereset, setresethaltreq, or clrresethaltreq.
Tracking `abstractcs.busy` allows to enforce this rule.
Change-Id: If5975b48cf9fd379033268145c79103c36fb8134
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Checkpatch complains for extra parenthesis not required.
Drop them.
Change-Id: I311409f5732acf10a4910de5dcf0fb05f43e21b5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8187
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Initialized `value` variables that could only be set in a branch.
Change-Id: Iec7413ade9d053c93352a58ff954ad49a6545923
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8179
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
It was noticed that the remote_bitbang protocol has a design issue:
SWD and sleep commands cannot be implemented at the same time, because
they overlap:
- SWD uses d,e,f,g for setting pin state
- sleep uses d,D for microsecond and millisecond sleep, respectively
This has previously been reported by Marek Vrbka, but it wasn't fixed.
This commit does the following to resolve the issue:
- Change the sleep commands to 'Z' for 1 ms, 'z' for 1 µs
- Document 'D' and 'd' as deprecated aliases
- Switch the remote_bitbang driver in OpenOCD to 'Z' and 'z'
Unfortunately that's a breaking change, because existing adapter-side
implementations of the protocol will have to implement the new commands
to keep working with future versions of OpenOCD. Fortunately, the
remote sleep commands haven't been part of an OpenOCD release yet,
which should limit the breakage somewhat.
Reported-by: Marek Vrbka <marek.vrbka@codasip.com>
Link: https://sourceforge.net/p/openocd/mailman/openocd-devel/thread/670d28d2-75a1-45ec-afe5-541415701d7a%40codasip.com/
Fixes: e8e09b1b5 ("remote_bitbang: add use_remote_sleep option to send delays to remote")
Change-Id: I04d2790a33bff9d47eb7f69b3275fd9a271625ae
Signed-off-by: J. Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.openocd.org/c/openocd/+/8191
Reviewed-by: David Ryskalczyk <david.rysk@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jeremy Herbert <jeremy.006@gmail.com>
Commit 290eac04b9 ("drivers/linuxgpiod: Migrate to adapter gpio
commands") introduced an incorrect check to determine if the
library libgpiod declares the line request flags:
GPIOD_LINE_REQUEST_FLAG_BIAS_DISABLE
GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP
GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_DOWN
The names above are declared by the library inside an enum, thus
cannot be used by the C preprocessor in a #ifdef.
Determine in configure if the version of libgpiod provides the
line request flags for "bias" and define a C macro.
Use the new macro in the driver code.
Change-Id: Iaa452230f4753fce4c6e9daa254299cedb7cab7f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 290eac04b9 ("drivers/linuxgpiod: Migrate to adapter gpio commands")
Reviewed-on: https://review.openocd.org/c/openocd/+/8186
Tested-by: jenkins
Reviewed-by: Michael Heimpold <michaheimpold@gmail.com>
The API in libgpiod v2 have changed, and current driver code for
linuxgpiod does not build anymore.
Prevent building the current driver linuxgpiod with the new
library.
Change-Id: Ie673db786dc50ae18a263d2c0a2b46b106866450
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8185
Reviewed-by: Michael Heimpold <michaheimpold@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Move setting of do_reconnect flag from swd_run_inner()
to swd_run(). Reconnect is not used at the inner level
and the flag had to be cleared after swd_run_inner()
to prevent recursion.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ib1de80bbdf10d1cbfb1dd351c6a5658e50d12af2
Reviewed-on: https://review.openocd.org/c/openocd/+/8155
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
The file 'list.h', copied from FreeBSD, does not depend from any
OpenOCD specific include file, but only needs 'stddef.h' for the
type 'size_t'.
Let 'list.h' to include the correct header file, then fix the now
broken dependencies in the other files that were incorrectly
relying on 'list.h' to include 'helper/types.h'
Change-Id: Idd31b5bf607e226cac44ef41b2aa335ae4dbf519
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8173
Tested-by: jenkins
The file list.h was originally taken from the Linux kernel code,
thus under license GPL-2.0-only. This locks OpenOCD to follow the
same license, even if the majority of OpenOCD files are licensed
as GPL-2.0-or-later.
A similar file is also present in FreeBSD code base under the more
permissive license BSD-2-Clause.
Drop the code from Linux kernel and replace it with the code from
FreeBSD 13.3.0.
Adapt the code to OpenOCD coding style by fixing the majority of
issues identified by checkpatch.
Add the OpenOCD specific macros and comments.
Unfortunately this causes the lost of all the doxygen comments.
Checkpatch-ignore: MACRO_ARG_REUSE, MACRO_ARG_PRECEDENCE
Change-Id: I6d86752c50158f3174c4e8c4add81e9998d01e0e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8172
Tested-by: jenkins
Evgeniy Naydanov
Anatoly Parshintsev
Evgeniy Naydanov
Jan Matyas
Parshintsev Anatoly
Aleksey Lotosh
Tommy Murphy
Antonio Borneo
Walter Ji
J. Neuschäfer
Dominik Wernberger
Emmanuel Blot
Steven Chang
Tomas Vanek