* Registers were not invalidated if the hart became unavailable.
* Improved logging in the case register invalidation involves loss of
information.
Change-Id: Icfb5e190dd6dcb1a97e4d314d802466cab7a01e4
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This changes will allow to unite read_memory/write_memory fucntions
to one access function
(1) Replaced read/write functions arguments with one structure
(2) Unified read_memory/write_memory function pointers
to be stored in same structure
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
Conflicts are related to `unsigned`->`unisgned int` cleanup:
* `src/jtag/drivers/ftdi.c` -- between
6749c70a3a and
a64dc23bf1.
* `src/rtos/hwthread.c` -- between
ef3e61bebc and
436e6f1770.
* `src/target/target.c` and `.h` -- between
53ec10b61d and
e72733d590.
* `src/target/riscv/*` -- due to
957eb741a0 and
fec3b22421.
Resolved by:
* Changing the return type of `riscv_batch_get_dmi_read_op()` to
`uint32_t`.
* Using RISC-V OpenOCD's version in other cases.
Change-Id: Ia6e2129c6fddb1dec26adcd936506af2539412ef
`target`'s `state` and `debug_reason` should not be updated in
`deassert_reset` if sending reset acknowledgment fails.
Change-Id: I86136fe829e7a7c6b69f718f0cf32322e40341b0
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
There is no need to change if `dcsr.ebreak*` fields after a reset if a
user requested a configuration that will result `dcsr.ebreak*` field
values equal to reset values.
Change-Id: I2844d30aef8f735c7b37394ee422e9b3f04a2e3b
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Existing flags: 'enable_virtual' and 'enable_virt2phys' were
replaced with explicit translation drivers. Motivation:
(1) Having 'enable_virtual' and 'enable_virt2phys' flags set simultaneously
may cause double address translation which is unacceptable
(2) Flags were global for all targets which is wrong too
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
Change the prototype of riscv_batch_get_dmi_read_op().
Now that 'target->smp' is unsigned, drop the cast.
Change-Id: I2a54268ed1e4bf0ea884b62cceb73f5c7451da78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8484
Tested-by: jenkins
Conversion done with
checkpatch --fix-inplace -types UNSPECIFIED_INT
Ignore the cast as they could be better addressed.
Fix only minor additional checkpatch issue (spacing and line
length).
Change-Id: I11f10eddadc21e051c96eb3d4d4c0554a2cddd15
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8483
Tested-by: jenkins
If some other TAP is not in BYPASS, an IR scan is needed to select
BYPASS on that TAP.
Change-Id: Iae425a415109b1a853db3718762661877eea56e8
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
See https://github.com/riscv-collab/riscv-openocd/issues/1139
riscv013_invalidate_cached_progbuf() was failing to zeroize the final
buffer array element. Use memset() instead of a manual loop to zeroize
it in order to address this and simplify the code.
(1) Error code and 'skip_reason' string were replaced with memory access
status. It allows to specify whether OpenOCD should exit the access
early.
(2) Slightly refactored 'read_memory' and 'write_memory' functions.
Checkpatch-ignore: MACRO_ARG_PRECEDENCE, MULTISTATEMENT_MACRO_USE_DO_WHILE
Checkpatch-ignore: TRAILING_SEMICOLON
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
* removed `progbuf_size` field from `riscv_info`; added getter
* moved `impebreak` field from `riscv_info` to `riscv013_info`
as implementation dependent field; added getter
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
- src/jtag/drivers/ftdi.c:
```
++<<<<<<< HEAD
+ int i;
+ static const uint8_t zero;
++=======
+ uint8_t zero = 0;
++>>>>>>> ocd_upstream
```
Decided to choose the latter.
- src/target/riscv/riscv-013.c:
```
++<<<<<<< HEAD
+ int abs_chain_position;
+ /* The base address to access this DM on DMI */
+ uint32_t base;
++=======
+ unsigned int abs_chain_position;
+
++>>>>>>> ocd_upstream
```
Decided to choose the latter (abs_chain_position is unsigned now)
- src/target/riscv/batch.c:
```
++<<<<<<< HEAD
++=======
+ void dump_field(int idle, const struct scan_field *field)
+ {
...
+ }
++>>>>>>> ocd_upstream
```
dump_field function is not needed anymore
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Also avoid receiving data if the value is discarded on the call-site.
Change-Id: Ied87b551536a00d9fad469b9843cccae1976e6b6
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
* Register file examination is separated.
* Allow to access registers through cache as early as possible to re-use
general register access interface and propely track state of the
register.
* Reduces the number of operations: S0 and S1 are saved/restored only
when needed (targets without abstract CSR access).
Change-Id: I2e205ae4e88733a5c792f8a35cf30325c68d96b2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This patch modifies as little code as possible in order to simplify the
review. Data types that are affected by these changes will be addresses
in following patches.
While at it, apply coding style fixes if these are not too extensive.
Change-Id: Idcbbbbbea2705512201eb326c3e6cef110dbc674
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8413
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Eliminates the use of VLA, which is prohibited by `doc/manual
/style.txt`:
Link: c6bb902629/doc/manual/style.txt (L164-L166)
* Unifies DMI access interface.
* Reduces code duplication.
Change-Id: I2d7b0595f171e21062049ff61f76fb5a3c992d11
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reduces the number of JTAG queue flushes.
Change-Id: Id103f5da1a3ea3177447046711e0e62a22c98c75
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Farid Khaydari
Evgeniy Naydanov
Evgeniy Naydanov
Anatoly Parshintsev
Parshintsev Anatoly
Mark Zhuang
Antonio Borneo
Tommy Murphy
Marc Schink