Since writing a register can make some GPRs dirty (e.g. S0, S1), registers
should be flushed in reverse order, so GPRs are flushed last.
Change-Id: Ice352a4df4ae064619c0f9905db634a7b57e4711
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
* Multiple improvements to Spike smoke-test workflow
These changes have been made:
- use checkout action v3 (not v2) - silences a Github warning
- cache dependencies to speed-up the process (Spike + toolchain)
- reorder actions so that cached items are handled first
- move dependencies to /opt/riscv for easier caching
- archive logs from the tests (downloadable artifact)
- more descriptive names for some steps
- changed 'apt' to 'apt-get' to supress a warning
Change-Id: I5b8e9200c5d8cbaa3116bac565e009089bb6b36b
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
* Split cache for spike and toolchain
Change-Id: I423c4ba28e44ec5126786897135fb245e164c664
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
* Split cache for spike and toolchain - fix cache keys
Change-Id: I907bdb52f402b17a7829ea1d06cd395518de4cd3
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
* Empty commit to re-trigger the CI
Change-Id: I749d44d8f0dde09ce5adf6e2e1ab5a5324f4018f
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
---------
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Co-authored-by: Jan Matyas <jan.matyas@codasip.com>
In case in the future I have the same idea of optimizing progbuf writes
again.
Change-Id: Ie383487691cceeff75e2c22f4c85fc1fe4873937
Signed-off-by: Tim Newsome <tim@sifive.com>
Small cleanup in target.c to get rid of few upstream differences:
- removed a pointless check for `reg->exists` - already checked
few lines above
- unify one log message with what's in upstream
Change-Id: I3fd761157382670611fa90de84e2dfc90192f473
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Non-functional change: unused function removed that does not exist
in the OpenOCD upstream, either.
Change-Id: Ibeab5b41a24183673cc02ca919b2f7285309e6f4
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
* workflow: Run checkpatch against pull request only
Instead of arbitrarily picking 20 changes.
Change-Id: I5ec488aa4faa0b06056aa91d0432cda1674967b7
Signed-off-by: Tim Newsome <tim@sifive.com>
* Display FETCH_HEAD in the log
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
---------
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
* Preserve artifact of Linux build, too.
That can be handy to e-mail to people who don't have a build setup.
Change-Id: I7b7e2d6f0033edf71f53211168f74b80ada64b97
Signed-off-by: Tim Newsome <tim@sifive.com>
* workflow: Run Linux build on Ubuntu 20.04, which is LTS.
This makes the binaries more useful.
Change-Id: I0cf6df68f03c4161222baa222c466fe0004ea769
Signed-off-by: Tim Newsome <tim@sifive.com>
* Use checkoutv3
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
---------
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
If hart can't change pc (e.g. it is running), resume command should
fail.
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I14627366d574d806ea16262b7d305d8161f8bcc2
Since the deletion of `-rtos hwthread`, there is no need to treat harts
with `-rtos` specified differently on reset.
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I88a9129936b5172bb7479dfa1255e29ff460c054
No other attempt is made at doing anything hypervisor-specific. Are
other things necessary?
Change-Id: Ib65f114888840cf0878f9bfe028c9a42b436aa3f
Signed-off-by: Tim Newsome <tim@sifive.com>
The first part of the command should be only "riscv expose_csrs",
the $_TARGETNAME value is not necessarily "riscv", in fact it is
generally riscv.cpux.
Signed-off-by: Hang Xu <xuhang@eswincomputing.com>
Icount triggers don't have a maskmax field at all. This is a cut and
paste error.
Change-Id: I001b3d41bf683599706dba713f7be475e8dd1668
Signed-off-by: Tim Newsome <tim@sifive.com>
When permission bits R, W, and X in PTE all three are zero,
the PTE is a pointter to the next level of the page table;
otherwise, it is a leaf PTE. Here PTE_W is missed.
Change-Id: I82a4cc4e64280f0fcad75b20e51b617520aff29b
Signed-off-by: panciyan <panciyan@eswincomputing.com>
Evgeniy Naydanov
Jan Matyas
Tim Newsome
Jan Matyas
Parshintsev Anatoly
Mark Zhuang
Hang Xu
panciyan