The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
It also get useful to handle the reset on some problematic chip,
as in http://openocd.zylin.com/5489
Replace the warning about deprecation with a more light debug
message.
Change-Id: I52de6359475ba31014ae77e596a87fe88b252177
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5514
Tested-by: jenkins
Reviewed-by: Edward Fewell <efewell@ti.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.
Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.
The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().
Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5472
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
The usleep() function, and its associated useconds_t type
specifier, has been obsoleted by POSIX.1-2008.
OpenOCD has 28 call to usleep(), that should be migrated to the
replacement nanosleep(), but due to the different prototype
int nanosleep(const struct timespec *req, struct timespec *rem);
this can take some effort.
The type useconds_t is used in only one case, where it's used both
as parameter of usleep() and as value passed to LOG_DEBUG(). Due
to different implementation of useconds_t, there are cases that
trigger a compile warning in LOG_DEBUG() when useconds_t is more
than 32 bit.
E.g. with unistd.h in MinGW 4.x, useconds_t is defined as unsigned
long, thus being 32 or 64 bits depending on the target.
Replace the only instance of useconds_t.
Change-Id: I21724f8b06780abdb003a57222ff1d6840ff5419
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5544
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
In newlib, the argument of isalnum() and the similar functions in
ctype.h is checked to be either an int or an unsigned char.
Using a normal (signed) char triggers a compile time warning
warning: array subscript has type ‘char’ [-Wchar-subscripts]
Rewrite the function to separate the internal unsigned char
operations from the (signed) char parameter.
Change-Id: I5f19115f0b2de2b5b35dc07ef4b58a96161268ee
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Åke Rehnman <ake.rehnman@gmail.com>
Fixes: 5da746fa09 ("flash/nor/nrf5: detect newer devices without HWID table")
Reviewed-on: http://openocd.zylin.com/5545
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
Return bool value in functions that return bool.
Change return type to bool to function is_gpio_valid().
Change-Id: Ic2e62be737772b22e69881c034956549f659370b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5552
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
have been added - analogous to already existing events
TARGET_EVENT_RESUME_*.
This is an example of a concrete use case where having
these events is important:
In RISC-V processors without Debug Program Buffer, OpenOCD
cannot execute fence/fence.i when resuming or single-
stepping. With these events implemented, the user can
instead provide custom operations to achieve that same
effect prior to resuming the processor.
Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5551
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
On stm32h747 writing/erasing bank 1 didn't work. It was because the
flash register base was always set for bank 0.
Tested on STM32H747I-DISCO board.
Change-Id: I7e8c43ecdda9dc70b114905f5ec6a6753ca29d82
Signed-off-by: Sasha Kozaruk <alkhozar@gmail.com>
Reviewed-on: http://openocd.zylin.com/5534
Reviewed-by: Christopher Head <chead@zaber.com>
Tested-by: jenkins
While stlink v2 allows setting the jtag clock frequency till a max
of 18 MHz, the firmware seams unstable and not properly working.
Remove the entry for 18 MHz, at least until a fix get available.
Change-Id: I503e1b6a5709b5fbf1f1147fd3b5f34a0c5ee98c
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5465
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
stlink accepts a set of values for "adapter speed".
Fix the api khz() to return one of the allowed speed values.
Change-Id: Iac640b6f76935891ca25ac168cab3809707f19d9
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5464
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
when openocd fails to read armv8 register, the user is not informed
which register has caused the error.
for example, in AArch32 state ESR_EL3 read/write is not supported,
thus armv8_dpm_read_current_registers is always failing without mentioning
which register has caused the error.
Change-Id: I24c5abbda9fac24fb77a01777ed15261aeaaf800
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5516
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change the current message when a flash driver does not implement
the protect_check function to LOG_INFO() from LOG_WARNING(). The
user is still notified that the procedure isn't available, but
changes the tone to indicate this is expected with this flash
driver and not something that necessarily is a problem to fix.
Change-Id: If8a2e86a23c852d562346ca36734e5d02df4a851
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5539
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add more argument check for "add-reg" command.
Changes since first revision:
-Removed arguments limitation(50 maximum) for "arc_set_reg_exists".
Changes:
25.03:
Removed inconsistency in "add-reg" function. Actually
"-type" option is optional and if it is not set,
register type is "int".
Change-Id: Ia21e6baf4fbda162f7811cd0fe305fc86ddafcfd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5523
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This adds the ATmega256RFR2 to the list of know devices for flashing.
Change-Id: Ib24a508762aaa84ba08ba37409db2ae674b46288
Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5504
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The current method used for flash addressing uses 16 bit. Every access
to flash is 16 bit wide. With 16 address bits one can address 0x10000
unique locations á 16 bits thats 0x20000 bytes.
For flashes bigger than that avrs have an extended addressing with more
than 16 address bits. This is now implemented and used for flashs larger
than 0x20000 bytes.
Change-Id: Id8b6337dde3830fb3c56b9042872e040bb67c12d
Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5502
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The commit fafe6dfc9c ("adapter: add command "adapter [de]assert
srst|trst [[de]assert srst|trst]"") was proposed in gerrit well
before commit a61ec3c1d7 ("adi_v5_dapdirect: add support for
adapter drivers that provide DAP API") get merged, so it didn't
include a complete support for dap direct.
The merge upstream of the two commits lacks the support by command
"adapter [de]assert" for dap direct
Let command command "adapter [de]assert" handle dap direct.
Change-Id: I1a69f8ee877c8fd57598ed4ad9d71da61d15457c
Fixes: commit fafe6dfc9c ("adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The XDS110 supports alternate configurations, each of which has
a unique vid/pid:
0451/bef3 -- Standard (legacy) configuration
0451/bef4 -- Drag-n-Drop configuration
1cbe/02a5 -- CMSIS-DAP 2.0 on BULK interface configuration
It's not important to OpenOCD what the differences are except
that OpenOCD needs to know how to connect using the different
vid/pids and, in the case of the last one, use a different
interface for the debug connection.
Updated the XDS110 source to search for all possible
configurations, and updated the udev rules file to enable
user access to the alternate configuraitons.
For the curious, you can download the latest XDS emupack from
software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds_software_package_download.html
Install to an empty directory, and documentation for the
XDS110 is located in the .../ccs_base/common/uscif/xds110
of the installation.
Updated for comments in code review. Changed const variable
names to lower case. Reworked interface/endpoint setting
to use arrays suggestion.
Change-Id: Icc9d11c6618f43d87ae8171c78ebf238800d3ac2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5494
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Arrange all commands under a top level xds110 command. Fix
documentation to properly reflect the current functionality.
Also updated the links in the document to the new permanent
links for the XDS110 only support.
Patch updated for comments from code review. Return
ERROR_COMMAND_SYNTAX_ERROR for wrong number of args in
commands. Added deprecated commands to src/jtag/startup.tcl.
Change-Id: Ica45f65e1fdf7fa72866f4e28c4f6bce428d8ac9
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5495
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Starting with XDS110 firmware version 3.0.0.0, the peak TCK
frequency became 14,000 kHz. So the delay count calculation
in the current driver has been updated to use the new
formula for setting the TCK speed depending on which version
of the firmware is detected. And because of the changes, the
default TCK settings for the XDS110 based Launchpads can be
adjusted to take advantage of the higher TCK performance.
Note that the values used have been determined through
testing in the automated test labs to be the highest TCK
frequency with the XDS110 that are still reliable.
Different boards have a different peak TCK setting that
should be safe.
Change-Id: I4d66e90d8fac8272641ba4db4a3a510e3b444d86
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5493
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
STM32WB3x devices' flash are quite similar to STM32WB5x,
except the maximum flash size, which is 512K for WB3x and 1M for WB5x
Change-Id: I3098d7153a7429e0e72c75cec962c05768b0b018
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5475
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
STM32WLEx devices are based on arm Cortex-M4 running at 48MHz,
contains a single bank of maximum 256 Kbytes of flash memory.
there is 3 variants with different Flash/RAM sizes:
STM32WLE5JC : 256K/64K
STM32WLE5JB : 128K/48K
STM32WLE5J8 : 64K/20K
the work-area size is set to 20 kb to fit in STM32WLE5J8
Change-Id: Ie8e186fe4be97cbc25c53ef0ade4b4dbbcee6f66
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5450
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Old ST-LINK DFU returns an incorrect serial in the USB descriptor
example for the following serial "57FF72067265575742132067"
- the correct descriptor serial is:
0x32, 0x03, 0x35, 0x00, 0x37, 0x00, 0x46, 0x00, 0x46, 0x00 ...
this contains the length (0x32 = 50), the type (0x3 = DT_STRING)
and the serial in unicode format.
the serial part is: 0x0035, 0x0037, 0x0046, 0x0046 ... >> 57FF ...
this format could be read correctly by 'libusb_get_string_descriptor_ascii'
so this case is managed by libusb_helper::string_descriptor_equal
- the buggy DFU is not doing any unicode conversion and returns a raw
serial data in the descriptor:
0x1a, 0x03, 0x57, 0x00, 0xFF, 0x00, 0x72, 0x00 ...
>> 57 FF 72 ...
based on the length (0x1a = 26) we could easily decide if we have to fixup the serial
and then we have just to convert the raw data into printable characters using sprintf
example for an old ST-LINK/V2 standalone:
before : 'W?rreWWB g'
after : '57FF72067265575742132067'
=> same as the displayed value in STM32CubeProgrammer
tested using these commands
using the buggy serial
-c "hla_serial \x57\x3f\x72\x06\x72\x65\x57\x57\x42\x13\x20\x67"
using the computed serial
-c "hla_serial 57FF72067265575742132067"
Change-Id: I1213818257663eeb8e76f419087d3127d0524842
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5396
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
introduce a callback function that could be passed to jtag_libusb_open
to permit adapters to compute their custom/exotic serials.
the callback should return a non NULL value only when the serial could not
be retrieved by the standard 'libusb_get_string_descriptor_ascii'
Change-Id: Ib95d6bdfc4ee655eda538fba8becfa183c3b0059
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5496
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
+ minor changes in comments' alignment to please our eyes
Change-Id: Ifa35a1032afc4e9aee524f596c0298a9eea49c37
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5500
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
The memory leak can be reproduced by using an arbitrary RTOS
and valgrind:
$ valgrind --leak-check=full --show-leak-kinds=all
[...]
==9656== 224 (80 direct, 144 indirect) bytes in 1 blocks are definitely lost in loss record 3 of 3
==9656== at 0x483CD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
==9656== by 0x1C541A: os_alloc (rtos.c:79)
==9656== by 0x1C569E: os_alloc_create (rtos.c:111)
==9656== by 0x1C569E: rtos_create (rtos.c:153)
==9656== by 0x1AE332: target_configure (target.c:4899)
==9656== by 0x1AF228: jim_target_configure (target.c:4952)
==9656== by 0x1C9EF9: command_unknown (command.c:1066)
==9656== by 0x313284: JimInvokeCommand (jim.c:10364)
==9656== by 0x313FB6: Jim_EvalObj (jim.c:10814)
==9656== by 0x3154A3: Jim_EvalFile (jim.c:11207)
==9656== by 0x316015: Jim_SourceCoreCommand (jim.c:15230)
==9656== by 0x313284: JimInvokeCommand (jim.c:10364)
==9656== by 0x313B8B: JimEvalObjList (jim.c:10605)
[...]
Change-Id: I2cd41a154fb8570842601ff4e3e76502f5908f49
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5479
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
STM32G0 and G4 uses the same flash driver as the stm32l4x
Change-Id: Ic1c4be70aaee809536912e0390f07893efb9a082
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5482
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Flash module of STM32G0/G4 family is quite similar to the one of
STM32L4, so only minor changes are required, in particular
adaption of flash loader to Cortex-M0. Register addresses
passed to flash loader to simplify integration of L5.
Added re-probe after option byte load.
Added flash size override via cfg file.
WRPxxR mask now based on max. number of pages instead of fixed 0xFF,
as G4 devices fill up unused bits with '1'.
Sizes in stm32l4_probe changed to multiples of 1kB.
Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.
Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB.
This handling isn't optimal as the bank size includes the
size of the gap. WB not tested.
Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4807
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
TCK during nSRST assert/deassert code.
To support LPRF targets (CC13xx/CC26xx), TCK must be toggled
for 50 ms while nSRST is asserted and right after it is
released. This allows the core to halt in boot ROM before
code is run that might interfere with debug access.
The current routine has two issues. It shouldn't be run at
all if the target is using SWD. And the delay needs to
be a real-time 50 ms, so the number of TCK periods should
be calculated off the set speed.
Change-Id: If993031b84cf2a505ea67a6633602c4b01cd8e1e
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Hypervisor mode is present only if the optional virtualization
extensions are available. Moreover, virtualization extensions
require that also security extensions are implemented.
Add the required infrastructure for the shadowed registers in
hypervisor mode.
Make monitor shadowed registers visible in hypervisor mode too.
Make hypervisor shadowed registers visible in hypervisor mode
only.
Check during cortex_a examine if virtualization extensions are
present and then conditionally enable the visibility of both
hypervisor and monitor modes shadowed registers.
Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5261
Tested-by: jenkins
Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.
Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.
Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
The fields core_type and core_mode use the same enum arm_mode
but encode different information, making the code less immediate
to read.
Use a different enum arm_core_type for the field core_type.
The code behavior is not changed.
Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5258
Tested-by: jenkins
Commit 2efb1f14f6 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
"sp_mon" moved from index 37 to 39
"lr_mon" moved from index 38 to 40
"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].
Fix armv4_5_core_reg_map[].
Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 2efb1f14f6 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257
Tested-by: jenkins
The function ftdi_set_signal() does not propagate the pin change
until next call to mpsse_flush(). Current code does not toggles
immediately the reset pins if polling is turned off.
Call mpsse_flush() at the end of ftdi_reset().
While there, remove the duplicated LOG message.
Change-Id: I79eacfe4fc32b5cdf2dc1b78f3660d96988466bc
Fixes: 8850eb8f2c ("swd: get rid of jtag queue to assert/deassert srst")
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5431
Tested-by: jenkins
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.
OpenOCD commit 559d08c19e ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
[target current] arp_waitstate halted 1
Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().
Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The jtag API reset() is synchronous, but this was not highlighted
in the description.
Change-Id: I76ffb7eec97c8608cfbef0b9268ee18a5f50b221
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 8850eb8f2c ("swd: get rid of jtag queue to assert/deassert srst")
Reviewed-on: http://openocd.zylin.com/5471
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
note: this works only when the PE is in AArch64 state
Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5474
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.
Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.
This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.
Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105
Tested-by: jenkins
Reviewed-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
Writes to EDITR trigger the instruction to be executed if the PE
is in Debug state:
- If the PE is in AArch64 state, this is an A64 instruction.
- If the PE is in AArch32 state, this is a T32 instruction
But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.
Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.
Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.
In this change, we check the core_state and bkpt length to know the
correct opcode to use.
Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
length to 4 bytes, in order to set correctly the bpkt.
Change-Id: I8f3551124412c61d155eae87761767e9937f917d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.
by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.
Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
A configuration script may want to check the reason why examine fails
e.g. device has security lock engaged.
tcl/target/kx.cfg and klx.cfg is modified to use the new event
for testing of the security lock of Kinetis MCU
Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
the same semihosting handlers chain is declared twice:
1. in src/target/armv4_5.c
2. in src/target/riscv/riscv.c
to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c
Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5473
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Added fixes for issues found in additional code reviews.
Fixed host Endianness issues with using buffer reads
and writes instead of the *_u32 variants.
Changed code that tried to ID banks by hardcode
bank_number values to use instead the bank base
address. This fixes problems using configurations
with multiple devices.
Note that this replaces Change 4786 which has
been abandoned because of extensive changes to
the code to stop IDing banks by name. And I
think I really messed up a rebase/merge on the
document file.
Tested on MSP432P401R, MSP432P4111, and MSP432E401Y
Launchpads.
Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5481
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Adopted only fast algorithm for flash programming:
- write_word and write_byte methods have been removed.
- start and end write alignments have been defined.
Moved flash controller registers offsets in a common file
shared with the flash algorithm.
- the flash base address is passed to the flash algorithm
as a parameter.
Removed unused functions
Change-Id: I80aeab3994e477044bbcf02e66d9525dae0cb491
Signed-off-by: luca vinci <luca.vinci@st.com>
Reviewed-on: http://openocd.zylin.com/5393
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Michele Sardo <msmttchr@gmail.com>
Writing bits to an uninitialized buffer generated false warnings.
Zero buffers before setting them by buf_set_u32|64()
(do it only if bit-by-bit copy loop is used,
zeroed buffer is not necessary if a fast path write is used)
Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5383
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The aligning code generated a clang static analyzer warning and
imposed huge memory leak. This part of code was removed and
flash infrastructure to alignment is used instead.
Not tested on hw!
Change-Id: I7c71da87547e71d595a7e7071ae5adcc1cecc827
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5367
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Group device list based on the device family and add clear
device family names.
Change-Id: I7a2dab1d1c0c8d141df02656c1964cb2c3fcbcd1
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5423
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
The name 'common' does not make sense anymore. While at it,
remove some unnecessary #includes.
Change-Id: If9798a5cce179438d89428a598d8ca05c8e5f20c
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5434
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Supporting two libusb versions provides additional development challenges
without additional advantage. In most cases we need to patch libusb0_common and
libusb1_common without real ability to test libusb0_common.
Change-Id: Icbb19c6809b14533fe2acf7a877377b3be4cbd61
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/5432
Tested-by: jenkins
this new device has the following features:
- single core cortex-M7
- 2MB flash - dual bank
- page size 8k
- write protection grouped by 4 sectors
- write block size 128 bits (16 bytes)
the bit definition of FLASH_CR is different than STM32H74x,
that's why we introduced a helper to compute the FLASH_CR value
Change-Id: I4da10cde8dd215b1b0f2645f0efdba9d198038d1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5441
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch is an initial bump of ARC-specific code
which implements the ARCv2 target(EMSK board) initializing
routine and some basic remote connection/load/continue
functionality.
Changes:
03.12.2019:
-Add return value checks.
-Using static code analizer next fixes were made:
Mem leak in functions:
arc_jtag_read_memory,arc_jtag_read_memory,
arc_jtag_write_registers, arc_jtag_read_registers,
jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct,
arc_build_reg_cache, arc_mem_read.
Dead code in "arc_mem_read";
In arc_save_context, arc_restore_context correct arguments
in"memset" calls.
In "build_bcr_reg_cache", "arc_build_reg_cache" check
if list is not empty.
29.12.2019
-Moved code from arc_v2.c to arc.c
-Added checks of the result of calloc/malloc calls
-Reworked arc_cmd.c: replaced spagetty code with functions
-Moved to one style in if statements - to "if(!bla)"
-Changed Licence headers
22.01.2020
-Removed unused variables in arc_common
-Renamed register operation functions
-Introduced arc_deinit_target function
-Fixed interrupt handling in halt/resume:
* add irq_state field in arc_common
* fix irq enable/disable calls ( now STATUS32 register is used)
-Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32()
-Made some cleanup
30.01.2020
-Removed redundant arc_register struct, moved target link to arc_reg_desc
-Introduced link to BCR reg cache in arc_common for freeing memory.
-Now arc_deinit_target frees all arc-related allocated memory.
Valgrind shows no memory leaks.
-Inroduced arch description in arc.c
01.02.2020
-Remove small memory allocations in arc_init_reg. Instead created reg_value
and feature fields in arc_reg_desc.
-Add return value for arc_init_reg() func.
-Replaced some integer constants(61,62,63) with defines.
-Removed redundant conversions in arc_reg_get_field().
-Moved iccm/dccm configuration code from arc_configure()
to separate functions.
19.02.2020
-Change sizeof(struct) to sizeof(*ptr) in allocations
-Changed if/while(ptr != NULL) to if/while(ptr)
-Removed unused variables from struct arc_jtag
-Add additional structs to arc_reg_data_type
to reduce amount of memory allocations calls
and simplifying memory freeing.
-Add helper arc_reg_bitfield_t struct which includes
reg_data_type_bitfield object and char[] name. Reduces
memory allocations calls.
-Add limit for reg_type/reg_type_field names(20 symbols).
-Add in jim_arc_add_reg_type*() functions additional
argnument checks(amount of field/name size).
-In jim_arc_add_reg_type*() reduced amount of memory allocations.
-Cleanup of jim_arc_add_reg_type*() functions.
-For commands update ".usage" fields according docopt.
-Cleanup in arc_jtag.c
-Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*()
-Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs
during regiter r/w.
24.02:
-Change include guards in arc* files according coding style
-Remove _t suffix in struct arc_reg_bitfield_t
-Some cleanup
Change-Id: I6ab0e82b12e6ddb683c9d13dfb7dd6f49a30cb9f
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5332
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.
This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types POINTER_LOCATION --fix-inplace -f {} \;
then manually reviewed.
OpenOCD coding style does not mention the space around pointer's
asterisk, so no check is enforced. This patch only makes the style
uniform across the files.
The patch only changes amount and position of whitespace, thus
the following commands show empty diff
git diff -w
git log -w -p
git log -w --stat
Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5197
Tested-by: jenkins
The default log output is stderr. After the command "log_output"
has been used to set an output log file, it is possible to return
back to stderr only on *NIX hosts specifying a new log output file
as "/dev/stderr", but this is not intuitive, not documented and
not portable out of *NIX.
Make command "log_output" able to set back the default output to
stderr when the parameter is either "default" or is missing.
While there, add debug message to log the change and make the
command return error on incorrect syntax.
Change-Id: I8c7c929780f58e2c23936737c8e7274a96734786
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5233
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Deassert the reset only if connect under reset is not required;
otherwise, assert the reset.
This fix aligns the behavior of connect under reset in dapdirect
with the behavior in jtag and swd.
Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5415
Tested-by: jenkins
Change-Id: Ia212b1877abeda27f507de29a3aee2b171c1b8c6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5448
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Also add locking after option write, it was missing at all.
Change-Id: I0227c6a74866f0fe8e40aa58616f0b3115ad5af0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5361
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Report the 32-byte alignemnt requirement via the bank structure rather
than enforcing it ad-hoc in the write routine. This allows people to do
non-32-byte-aligned writes if they want, with the infrastructure fixing
up the addresses passed to the low-level driver.
Change-Id: I2c4f532f2000435954a900224dbc9f2c30d1cc94
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5388
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Without this, a failed attempt to change option bytes will silently
appear to succeed but without actually changing the option bytes
(confusingly, the option bytes will still read back as if they had been
changed until a reboot as well!).
Change-Id: Id529c6c384a8a16be75f5702310670d99d8fac79
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5418
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reuse the existing tracing functionality of HLA mode to support
tracing in DAP direct mode.
Change-Id: I75a01e88ba5d3e45717e4108b99697ac3225db9e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5409
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Commit 3799eded67 ("target/aarch64: add support for
multi-architecture gdb") passes the constant string "aarch64" as
architecture to gdb. This is not working if the core is running
in 32 bits mode; gdb reports:
Truncated register 8 in remote 'g' packet
then closes the connection with OpenOCD.
Make the architecture string dependant from the current state of
the core.
Change-Id: I16e1614ea02ba29bf87f450b3dfe25c83c9a3612
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5234
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
We have the macro ARRAY_SIZE() already available. Use it!
Issue identified by checkpatch script from Linux kernel v5.1 using
the command
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types ARRAY_SIZE -f {} \;
Change-Id: Ic7da9b710edf118eacb08f9e222f34208c580842
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5198
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Identified by checkpatch script from Linux kernel v5.1 using the
command
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types UNNECESSARY_PARENTHESES -f {} \;
then fixed manually.
Change-Id: Ia2d9a0953d9b89fc87dc1195aa05c7f63c068c48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5196
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The macro NDS32_COMMON_MAGIC was cast-ed to int to avoid compile
time error for comparison type mismatch while comparing it with
the field common_magic.
This is incorrect because the macro value is a 32 bit unsigned
value; better changing the type of the field common_magic to keep
the unsigned value.
Issue identified by checkpatch script from Linux kernel v5.1 using
the command
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types TYPECAST_INT_CONSTANT -f {} \;
Change-Id: Ib5924b6cecdffe70ab5c78d3b30a9c8e4deb7c7b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5193
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Command CMD_STOP_SIMU had been defined in jtag_vpi for a long time
(since the beginning?) but has not been utilized until now.
Its purpose is to signal to the jtag_vpi server (i.e. the RTL
simulation software) that the simulation shall be stopped.
This commit adds a TCL configuration command that selects whether
CMD_STOP_SIMU will be sent to the jtag_vpi server when OpenOCD is
about to exit. This functionality is off by default to maintain
identical behavior as in previous OpenOCD versions, unless the user
enables it explicitly.
Change-Id: If3894af6efa61038ccf6c9191f664e2128f2ef11
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5407
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
this is to avoid confusion with STM32 L4, L4+ and L5 families
also:
- a warning message is changed to error
- stm32l0x and stm32l1x aliases has been created to permit
the usage of either names
Change-Id: If3f16d2a3b7d1369959aa7407da37a9076ea91d7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5437
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This will enable us to use either name when calling flash driver commands.
For example the stm32wbx family use the same flash driver as the stm32l4x, so
the user has to use 'stm32l4x lock 0' which can be confusing.
Now the user can also use 'stm32wbx lock 0' with the same result.
Change-Id: Ic0d8da9afc202d7cc82d9b9949827e958a1cc824
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5436
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Replace "Instruction Register (DR)" with "Instruction Register (IR)",
that is sed "s@DR@IR@", which was likely a copy-paste error.
Change-Id: I3e625872c855d655485b3efa5f50fe1c00ecbf52
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5446
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
While ST internal documentation for STLINK-V3 reports that 8 bits
read/write commands handle 512 bytes of data, a firmware bug makes
it crashing on high data size.
This is fixed with firmware V3J6 (shipped together with V2J36).
Check for firmware version to use the proper data size.
Change-Id: Iaba6cd26bbe130097c1c19de610680e0e8b69bfc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/259/
Reviewed-on: http://openocd.zylin.com/5408
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
If the TLR sequence is sent as result of the command "adapter
assert trst" while polling is off, the TLR sequence is not sent out
until a following jtag operation.
Flush the jtag queue before return.
Change-Id: I20efd7137cb7b1d1c4f73c1362cbe4e57aeaae49
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5405
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The macro PCI_CFG_SPACE_EXP_SIZE is exposed to userspace from
Linux kernel v4.10, with commit cc10385b6fde ("PCI: Move config
space size macros to pci_regs.h")
http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cc10385b6fde
Define the macro in the driver code, if not already defined.
Change-Id: I610219a2587eff2c142102b9f7830e3da882af78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5435
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Add driver for the RPC block in HF mode on Renesas R-Car Gen3 SoCs.
This driver allows operating the on-SIP HF memory.
Note that HF is CFI compliant flash, but it is not memory mapped,
hence the need to replace all the memory accessors and read/write
functions. The write function is entirely replaced to increase
performance and is Spansion/AMD specific, since there is no known
SIP with other HF from another vendor.
Add the following two lines to board TCL file to bind the driver on
R-Car Gen3 SoC using HyperFlash:
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME rpchf 0x08000000 0x4000000 2 2 $_CHIPNAME.a57.0
Change-Id: Ie18729d017eeb46e1363333ffe002d010dfc5ead
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5149
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
The fallback provided for the jtag_reset command always fails with a
strange message: 'Error: invalid command name "de"'
This is caused by incorrect quoting inside the warning message.
Fixes: c07b774e8f ("jtag: replace command "jtag_reset" with "adapter [de]assert"")
Change-Id: Icd47fca2b5a7b33474bfb0040e88193a0968f301
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5416
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Replace in the code any reference to the deprecated commands.
Change-Id: I75d28064017d664990b4024967900f32e196230a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5282
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Antonio Borneo
Jan Matyas
Sasha Kozaruk
Laurent LEMELE
Tarek BOCHKATI
Marc Schink
Roman Elshin
Edward Fewell
Evgeniy Didin
Marc Schink
Lars Poeschel
Christopher Head
Andreas Bolsch
Matthias Welwarsky
Tomas Vanek
luca vinci
Oleksij Rempel
Michael Stoll
Marek Vasut
Frank Hunleth
Leonard Crestez